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de355530 1/*
6601e61a 2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
de355530 3 *
6601e61a 4 * @APPLE_LICENSE_HEADER_START@
de355530 5 *
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6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
8f6c56a5 11 *
6601e61a
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12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
6601e61a
A
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
8f6c56a5 19 *
6601e61a 20 * @APPLE_LICENSE_HEADER_END@
de355530 21 */
de355530 22
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23#include <sys/appleapiopts.h>
24#include <machine/cpu_capabilities.h>
25#include <machine/commpage.h>
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26#include <i386/asm.h>
27
28#include <assym.s>
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29
30 .text
31 .align 2, 0x90
32
33Lmach_absolute_time:
6601e61a 34
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35 int $0x3
36 ret
37
6601e61a 38 COMMPAGE_DESCRIPTOR(mach_absolute_time,_COMM_PAGE_ABSOLUTE_TIME,1,0)
c0fea474 39
5d5c5d0d 40
6601e61a 41Lnanotime:
89b3af67 42
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43 pushl %ebx
44 pushl %esi
45 pushl %edi
46 pushl %ebp
47 movl $(_COMM_PAGE_NANOTIME_INFO), %esi
48
49 /*
50 * The nanotime info consists of:
51 * - base_tsc 64-bit timestamp register value
52 * - base_ns 64-bit corresponding nanosecond uptime value
53 * - scale 32-bit current scale multiplier
54 * - shift 32-bit current shift divider
55 * - check_tsc 64-bit timestamp check value
56 *
57 * This enables an timestamp register's value, tsc, to be converted
58 * into a nanosecond nanotime value, ns:
59 *
60 * ns = base_ns + ((tsc - base_tsc) * scale >> shift)
61 *
62 * The kernel updates this every tick or whenever a performance
63 * speed-step changes the scaling. To avoid locking, a duplicated
64 * sequence counting scheme is used. The base_tsc value is updated
65 * whenever the info starts to be changed, and check_tsc is updated
66 * to the same value at the end of the update. The regularity of
67 * update ensures that (tsc - base_tsc) is a 32-bit quantity.
68 * When a conversion is performed, we read base_tsc before we start
69 * and check_tsc at the end -- if there's a mis-match we repeat.
70 * It's sufficient to compare only the low-order 32-bits.
71 */
4452a7af 72
91447636 731:
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74 //
75 // Read nanotime info and stash in registers.
76 //
77 movl NANOTIME_BASE_TSC(%esi), %ebx // ebx := lo(base_tsc)
78 movl NANOTIME_BASE_NS(%esi), %ebp
79 movl NANOTIME_BASE_NS+4(%esi), %edi // edi:ebp := base_ns
80 movl NANOTIME_SHIFT(%esi), %ecx // ecx := shift
81 //
82 // Read timestamp register (tsc) and calculate delta.
83 //
84 rdtsc // edx:eax := tsc
85 subl %ebx, %eax // eax := (tsc - base_tsc)
86 movl NANOTIME_SCALE(%esi), %edx // edx := shift
87 //
88 // Check for consistency and re-read if necessary.
89 //
90 cmpl NANOTIME_CHECK_TSC(%esi), %ebx
91447636 91 jne 1b
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92
93 //
94 // edx:eax := ((tsc - base_tsc) * scale)
95 //
96 mull %edx
97
98 //
99 // eax := ((tsc - base_tsc) * scale >> shift)
100 //
101 shrdl %cl, %edx, %eax
102 andb $32, %cl
103 cmovnel %edx, %eax // %eax := %edx if shift == 32
104 xorl %edx, %edx
105
106 //
107 // Add base_ns:
108 // edx:eax = (base_ns + ((tsc - base_tsc) * scale >> shift))
109 //
110 addl %ebp, %eax
111 adcl %edi, %edx
112
113 popl %ebp
114 popl %edi
115 popl %esi
116 popl %ebx
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117 ret
118
6601e61a 119 COMMPAGE_DESCRIPTOR(nanotime,_COMM_PAGE_NANOTIME,1,0)