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1c79356b 1/*
39236c6e 2 * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
1c79356b 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
8f6c56a5 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
8f6c56a5 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b
A
27 */
28/*
29 * @OSF_COPYRIGHT@
30 *
31 */
32
33#ifndef I386_CPU_DATA
34#define I386_CPU_DATA
35
1c79356b
A
36#include <mach_assert.h>
37
1c79356b
A
38#include <kern/assert.h>
39#include <kern/kern_types.h>
b0d623f7 40#include <kern/queue.h>
91447636 41#include <kern/processor.h>
0c530ab8 42#include <kern/pms.h>
55e303ae 43#include <pexpert/pexpert.h>
0c530ab8 44#include <mach/i386/thread_status.h>
b0d623f7 45#include <mach/i386/vm_param.h>
fe8ab488 46#include <i386/locks.h>
6d2010ae 47#include <i386/rtclock_protos.h>
0c530ab8 48#include <i386/pmCPU.h>
2d21ac55
A
49#include <i386/cpu_topology.h>
50
b0d623f7 51#if CONFIG_VMX
2d21ac55 52#include <i386/vmx/vmx_cpu.h>
b0d623f7 53#endif
91447636 54
6d2010ae
A
55#include <machine/pal_routines.h>
56
91447636
A
57/*
58 * Data structures referenced (anonymously) from per-cpu data:
59 */
91447636 60struct cpu_cons_buffer;
0c530ab8 61struct cpu_desc_table;
2d21ac55 62struct mca_state;
fe8ab488 63struct prngContext;
91447636 64
91447636
A
65/*
66 * Data structures embedded in per-cpu data:
67 */
68typedef struct rtclock_timer {
6d2010ae 69 mpqueue_head_t queue;
c910b4d9 70 uint64_t deadline;
6d2010ae 71 uint64_t when_set;
c910b4d9 72 boolean_t has_expired;
91447636
A
73} rtclock_timer_t;
74
2d21ac55 75
91447636 76typedef struct {
39236c6e 77 struct x86_64_tss *cdi_ktss;
b0d623f7
A
78 struct __attribute__((packed)) {
79 uint16_t size;
80 void *ptr;
81 } cdi_gdt, cdi_idt;
82 struct fake_descriptor *cdi_ldt;
39236c6e 83 vm_offset_t cdi_sstk;
b0d623f7
A
84} cpu_desc_index_t;
85
86typedef enum {
87 TASK_MAP_32BIT, /* 32-bit user, compatibility mode */
88 TASK_MAP_64BIT, /* 64-bit user thread, shared space */
89} task_map_t;
90
b0d623f7 91
0c530ab8
A
92/*
93 * This structure is used on entry into the (uber-)kernel on syscall from
94 * a 64-bit user. It contains the address of the machine state save area
95 * for the current thread and a temporary place to save the user's rsp
96 * before loading this address into rsp.
97 */
98typedef struct {
99 addr64_t cu_isf; /* thread->pcb->iss.isf */
100 uint64_t cu_tmp; /* temporary scratch */
6d2010ae 101 addr64_t cu_user_gs_base;
0c530ab8 102} cpu_uber_t;
91447636 103
6d2010ae
A
104typedef uint16_t pcid_t;
105typedef uint8_t pcid_ref_t;
bd504ef0
A
106
107#define CPU_RTIME_BINS (12)
108#define CPU_ITIME_BINS (CPU_RTIME_BINS)
109
39037602
A
110#define MAXPLFRAMES (32)
111typedef struct {
112 boolean_t pltype;
113 int plevel;
114 uint64_t plbt[MAXPLFRAMES];
115} plrecord_t;
116
91447636
A
117/*
118 * Per-cpu data.
119 *
120 * Each processor has a per-cpu data area which is dereferenced through the
121 * current_cpu_datap() macro. For speed, the %gs segment is based here, and
122 * using this, inlines provides single-instruction access to frequently used
123 * members - such as get_cpu_number()/cpu_number(), and get_active_thread()/
124 * current_thread().
125 *
126 * Cpu data owned by another processor can be accessed using the
127 * cpu_datap(cpu_number) macro which uses the cpu_data_ptr[] array of per-cpu
128 * pointers.
129 */
130typedef struct cpu_data
131{
6d2010ae
A
132 struct pal_cpu_data cpu_pal_data; /* PAL-specific data */
133#define cpu_pd cpu_pal_data /* convenience alias */
91447636
A
134 struct cpu_data *cpu_this; /* pointer to myself */
135 thread_t cpu_active_thread;
39236c6e
A
136 thread_t cpu_nthread;
137 volatile int cpu_preemption_level;
6d2010ae 138 int cpu_number; /* Logical CPU */
0c530ab8
A
139 void *cpu_int_state; /* interrupt state */
140 vm_offset_t cpu_active_stack; /* kernel stack base */
141 vm_offset_t cpu_kernel_stack; /* kernel stack top */
91447636 142 vm_offset_t cpu_int_stack_top;
91447636 143 int cpu_interrupt_level;
91447636
A
144 int cpu_phys_number; /* Physical CPU */
145 cpu_id_t cpu_id; /* Platform Expert */
39236c6e
A
146 volatile int cpu_signals; /* IPI events */
147 volatile int cpu_prior_signals; /* Last set of events,
060df5ea
A
148 * debugging
149 */
91447636 150 ast_t cpu_pending_ast;
bd504ef0
A
151 volatile int cpu_running;
152 boolean_t cpu_fixed_pmcs_enabled;
0c530ab8 153 rtclock_timer_t rtclock_timer;
6d2010ae
A
154 volatile addr64_t cpu_active_cr3 __attribute((aligned(64)));
155 union {
156 volatile uint32_t cpu_tlb_invalid;
157 struct {
158 volatile uint16_t cpu_tlb_invalid_local;
159 volatile uint16_t cpu_tlb_invalid_global;
160 };
161 };
162 volatile task_map_t cpu_task_map;
b0d623f7 163 volatile addr64_t cpu_task_cr3;
2d21ac55 164 addr64_t cpu_kernel_cr3;
39037602 165 boolean_t cpu_pagezero_mapped;
0c530ab8
A
166 cpu_uber_t cpu_uber;
167 void *cpu_chud;
6601e61a 168 void *cpu_console_buf;
2d21ac55 169 struct x86_lcpu lcpu;
91447636 170 struct processor *cpu_processor;
b0d623f7 171#if NCOPY_WINDOWS > 0
91447636 172 struct cpu_pmap *cpu_pmap;
b0d623f7 173#endif
0c530ab8
A
174 struct cpu_desc_table *cpu_desc_tablep;
175 struct fake_descriptor *cpu_ldtp;
91447636 176 cpu_desc_index_t cpu_desc_index;
0c530ab8 177 int cpu_ldt;
b0d623f7 178#if NCOPY_WINDOWS > 0
2d21ac55
A
179 vm_offset_t cpu_copywindow_base;
180 uint64_t *cpu_copywindow_pdp;
181
182 vm_offset_t cpu_physwindow_base;
183 uint64_t *cpu_physwindow_ptep;
b0d623f7
A
184#endif
185
6d2010ae
A
186#define HWINTCNT_SIZE 256
187 uint32_t cpu_hwIntCnt[HWINTCNT_SIZE]; /* Interrupt counts */
bd504ef0
A
188 uint64_t cpu_hwIntpexits[HWINTCNT_SIZE];
189 uint64_t cpu_hwIntcexits[HWINTCNT_SIZE];
0c530ab8 190 uint64_t cpu_dr7; /* debug control register */
2d21ac55 191 uint64_t cpu_int_event_time; /* intr entry/exit time */
6d2010ae 192 pal_rtc_nanotime_t *cpu_nanotime; /* Nanotime info */
39236c6e
A
193#if KPC
194 /* double-buffered performance counter data */
195 uint64_t *cpu_kpc_buf[2];
196 /* PMC shadow and reload value buffers */
197 uint64_t *cpu_kpc_shadow;
198 uint64_t *cpu_kpc_reload;
199#endif
6d2010ae
A
200 uint32_t cpu_pmap_pcid_enabled;
201 pcid_t cpu_active_pcid;
202 pcid_t cpu_last_pcid;
39037602 203 pcid_t cpu_kernel_pcid;
6d2010ae
A
204 volatile pcid_ref_t *cpu_pmap_pcid_coherentp;
205 volatile pcid_ref_t *cpu_pmap_pcid_coherentp_kernel;
206#define PMAP_PCID_MAX_PCID (0x1000)
207 pcid_t cpu_pcid_free_hint;
208 pcid_ref_t cpu_pcid_refcounts[PMAP_PCID_MAX_PCID];
209 pmap_t cpu_pcid_last_pmap_dispatched[PMAP_PCID_MAX_PCID];
210#ifdef PCID_STATS
211 uint64_t cpu_pmap_pcid_flushes;
212 uint64_t cpu_pmap_pcid_preserves;
213#endif
4b17d6b6
A
214 uint64_t cpu_aperf;
215 uint64_t cpu_mperf;
216 uint64_t cpu_c3res;
217 uint64_t cpu_c6res;
218 uint64_t cpu_c7res;
219 uint64_t cpu_itime_total;
220 uint64_t cpu_rtime_total;
4b17d6b6 221 uint64_t cpu_ixtime;
bd504ef0
A
222 uint64_t cpu_idle_exits;
223 uint64_t cpu_rtimes[CPU_RTIME_BINS];
224 uint64_t cpu_itimes[CPU_ITIME_BINS];
225 uint64_t cpu_cur_insns;
226 uint64_t cpu_cur_ucc;
227 uint64_t cpu_cur_urc;
a1c7dba1 228 uint64_t cpu_gpmcs[4];
6d2010ae
A
229 uint64_t cpu_max_observed_int_latency;
230 int cpu_max_observed_int_latency_vector;
39236c6e 231 volatile boolean_t cpu_NMI_acknowledged;
060df5ea 232 uint64_t debugger_entry_time;
bd504ef0 233 uint64_t debugger_ipi_time;
060df5ea
A
234 /* A separate nested interrupt stack flag, to account
235 * for non-nested interrupts arriving while on the interrupt stack
236 * Currently only occurs when AICPM enables interrupts on the
237 * interrupt stack during processor offlining.
238 */
239 uint32_t cpu_nested_istack;
240 uint32_t cpu_nested_istack_events;
6d2010ae
A
241 x86_saved_state64_t *cpu_fatal_trap_state;
242 x86_saved_state64_t *cpu_post_fatal_trap_state;
bd504ef0
A
243#if CONFIG_VMX
244 vmx_cpu_t cpu_vmx; /* wonderful world of virtualization */
245#endif
246#if CONFIG_MCA
247 struct mca_state *cpu_mca_state; /* State at MC fault */
248#endif
fe8ab488 249 struct prngContext *cpu_prng; /* PRNG's context */
bd504ef0
A
250 int cpu_type;
251 int cpu_subtype;
252 int cpu_threadtype;
253 boolean_t cpu_iflag;
254 boolean_t cpu_boot_complete;
39037602
A
255 int cpu_hibernate;
256#define MAX_PREEMPTION_RECORDS (128)
257#if DEVELOPMENT || DEBUG
258 int cpu_plri;
259 plrecord_t plrecords[MAX_PREEMPTION_RECORDS];
260#endif
55e303ae 261} cpu_data_t;
1c79356b 262
91447636 263extern cpu_data_t *cpu_data_ptr[];
9bccf70c 264
55e303ae 265/* Macro to generate inline bodies to retrieve per-cpu data fields. */
39236c6e
A
266#if defined(__clang__)
267#define GS_RELATIVE volatile __attribute__((address_space(256)))
268#ifndef offsetof
269#define offsetof(TYPE,MEMBER) __builtin_offsetof(TYPE,MEMBER)
270#endif
271
272#define CPU_DATA_GET(member,type) \
273 cpu_data_t GS_RELATIVE *cpu_data = \
274 (cpu_data_t GS_RELATIVE *)0UL; \
275 type ret; \
276 ret = cpu_data->member; \
277 return ret;
278
279#define CPU_DATA_GET_INDEX(member,index,type) \
280 cpu_data_t GS_RELATIVE *cpu_data = \
281 (cpu_data_t GS_RELATIVE *)0UL; \
282 type ret; \
283 ret = cpu_data->member[index]; \
284 return ret;
285
286#define CPU_DATA_SET(member,value) \
287 cpu_data_t GS_RELATIVE *cpu_data = \
288 (cpu_data_t GS_RELATIVE *)0UL; \
289 cpu_data->member = value;
290
291#define CPU_DATA_XCHG(member,value,type) \
292 cpu_data_t GS_RELATIVE *cpu_data = \
293 (cpu_data_t GS_RELATIVE *)0UL; \
294 type ret; \
295 ret = cpu_data->member; \
296 cpu_data->member = value; \
297 return ret;
298
299#else /* !defined(__clang__) */
300
2d21ac55 301#ifndef offsetof
55e303ae 302#define offsetof(TYPE,MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
2d21ac55 303#endif /* offsetof */
91447636 304#define CPU_DATA_GET(member,type) \
55e303ae 305 type ret; \
b0d623f7 306 __asm__ volatile ("mov %%gs:%P1,%0" \
55e303ae 307 : "=r" (ret) \
91447636 308 : "i" (offsetof(cpu_data_t,member))); \
55e303ae 309 return ret;
9bccf70c 310
6d2010ae
A
311#define CPU_DATA_GET_INDEX(member,index,type) \
312 type ret; \
313 __asm__ volatile ("mov %%gs:(%1),%0" \
314 : "=r" (ret) \
315 : "r" (offsetof(cpu_data_t,member[index]))); \
316 return ret;
317
318#define CPU_DATA_SET(member,value) \
319 __asm__ volatile ("mov %0,%%gs:%P1" \
320 : \
321 : "r" (value), "i" (offsetof(cpu_data_t,member)));
39236c6e 322
6d2010ae
A
323#define CPU_DATA_XCHG(member,value,type) \
324 type ret; \
325 __asm__ volatile ("xchg %0,%%gs:%P1" \
326 : "=r" (ret) \
327 : "i" (offsetof(cpu_data_t,member)), "0" (value)); \
328 return ret;
329
39236c6e
A
330#endif /* !defined(__clang__) */
331
1c79356b
A
332/*
333 * Everyone within the osfmk part of the kernel can use the fast
334 * inline versions of these routines. Everyone outside, must call
335 * the real thing,
336 */
91447636
A
337static inline thread_t
338get_active_thread(void)
1c79356b 339{
91447636 340 CPU_DATA_GET(cpu_active_thread,thread_t)
1c79356b 341}
91447636
A
342#define current_thread_fast() get_active_thread()
343#define current_thread() current_thread_fast()
1c79356b 344
b0d623f7 345#define cpu_mode_is64bit() TRUE
0c530ab8 346
91447636
A
347static inline int
348get_preemption_level(void)
1c79356b 349{
91447636 350 CPU_DATA_GET(cpu_preemption_level,int)
55e303ae 351}
91447636 352static inline int
91447636 353get_interrupt_level(void)
55e303ae 354{
91447636 355 CPU_DATA_GET(cpu_interrupt_level,int)
55e303ae 356}
91447636
A
357static inline int
358get_cpu_number(void)
55e303ae
A
359{
360 CPU_DATA_GET(cpu_number,int)
361}
91447636
A
362static inline int
363get_cpu_phys_number(void)
55e303ae
A
364{
365 CPU_DATA_GET(cpu_phys_number,int)
1c79356b 366}
1c79356b 367
39037602
A
368static inline cpu_data_t *
369current_cpu_datap(void) {
370 CPU_DATA_GET(cpu_this, cpu_data_t *);
371}
372
373/*
374 * Facility to diagnose preemption-level imbalances, which are otherwise
375 * challenging to debug. On each operation that enables or disables preemption,
376 * we record a backtrace into a per-CPU ring buffer, along with the current
377 * preemption level and operation type. Thus, if an imbalance is observed,
378 * one can examine these per-CPU records to determine which codepath failed
379 * to re-enable preemption, enabled premption without a corresponding
380 * disablement etc. The backtracer determines which stack is currently active,
381 * and uses that to perform bounds checks on unterminated stacks.
382 * To enable, sysctl -w machdep.pltrace=1 on DEVELOPMENT or DEBUG kernels (DRK '15)
383 * The bounds check currently doesn't account for non-default thread stack sizes.
384 */
385#if DEVELOPMENT || DEBUG
386static inline void pltrace_bt(uint64_t *rets, int maxframes, uint64_t stacklo, uint64_t stackhi) {
387 uint64_t *cfp = (uint64_t *) __builtin_frame_address(0);
388 int plbtf;
389
390 assert(stacklo !=0 && stackhi !=0);
391
392 for (plbtf = 0; plbtf < maxframes; plbtf++) {
393 if (((uint64_t)cfp == 0) || (((uint64_t)cfp < stacklo) || ((uint64_t)cfp > stackhi))) {
394 rets[plbtf] = 0;
395 continue;
396 }
397 rets[plbtf] = *(cfp + 1);
398 cfp = (uint64_t *) (*cfp);
399 }
400}
401
402
403extern uint32_t low_intstack[]; /* bottom */
404extern uint32_t low_eintstack[]; /* top */
405extern char mp_slave_stack[PAGE_SIZE];
406
407static inline void pltrace_internal(boolean_t enable) {
408 cpu_data_t *cdata = current_cpu_datap();
409 int cpli = cdata->cpu_preemption_level;
410 int cplrecord = cdata->cpu_plri;
411 uint64_t kstackb, kstackt, *plbts;
412
413 assert(cpli >= 0);
414
415 cdata->plrecords[cplrecord].pltype = enable;
416 cdata->plrecords[cplrecord].plevel = cpli;
417
418 plbts = &cdata->plrecords[cplrecord].plbt[0];
419
420 cplrecord++;
421
422 if (cplrecord >= MAX_PREEMPTION_RECORDS) {
423 cplrecord = 0;
424 }
425
426 cdata->cpu_plri = cplrecord;
427 /* Obtain the 'current' program counter, initial backtrace
428 * element. This will also indicate if we were unable to
429 * trace further up the stack for some reason
430 */
431 __asm__ volatile("leaq 1f(%%rip), %%rax; mov %%rax, %0\n1:"
432 : "=m" (plbts[0])
433 :
434 : "rax");
435
436
437 thread_t cplthread = cdata->cpu_active_thread;
438 if (cplthread) {
439 uintptr_t csp;
440 __asm__ __volatile__ ("movq %%rsp, %0": "=r" (csp):);
441 /* Determine which stack we're on to populate stack bounds.
442 * We don't need to trace across stack boundaries for this
443 * routine.
444 */
445 kstackb = cdata->cpu_active_stack;
446 kstackt = kstackb + KERNEL_STACK_SIZE;
447 if (csp < kstackb || csp > kstackt) {
448 kstackt = cdata->cpu_kernel_stack;
449 kstackb = kstackb - KERNEL_STACK_SIZE;
450 if (csp < kstackb || csp > kstackt) {
451 kstackt = cdata->cpu_int_stack_top;
452 kstackb = kstackt - INTSTACK_SIZE;
453 if (csp < kstackb || csp > kstackt) {
454 kstackt = (uintptr_t)low_eintstack;
455 kstackb = (uintptr_t)low_eintstack - INTSTACK_SIZE;
456 if (csp < kstackb || csp > kstackt) {
457 kstackb = (uintptr_t) mp_slave_stack;
458 kstackt = (uintptr_t) mp_slave_stack + PAGE_SIZE;
459 }
460 }
461 }
462 }
463
464 if (kstackb) {
465 pltrace_bt(&plbts[1], MAXPLFRAMES - 1, kstackb, kstackt);
466 }
467 }
468}
469
470extern int plctrace_enabled;
471#endif /* DEVELOPMENT || DEBUG */
472
473static inline void pltrace(boolean_t plenable) {
474#if DEVELOPMENT || DEBUG
475 if (__improbable(plctrace_enabled != 0)) {
476 pltrace_internal(plenable);
477 }
478#else
479 (void)plenable;
480#endif
481}
b0d623f7 482
91447636 483static inline void
39037602
A
484disable_preemption_internal(void) {
485 assert(get_preemption_level() >= 0);
486
39236c6e
A
487#if defined(__clang__)
488 cpu_data_t GS_RELATIVE *cpu_data = (cpu_data_t GS_RELATIVE *)0UL;
489 cpu_data->cpu_preemption_level++;
490#else
91447636 491 __asm__ volatile ("incl %%gs:%P0"
39037602
A
492 :
493 : "i" (offsetof(cpu_data_t, cpu_preemption_level)));
39236c6e 494#endif
39037602 495 pltrace(FALSE);
91447636 496}
1c79356b 497
91447636 498static inline void
39037602 499enable_preemption_internal(void) {
55e303ae 500 assert(get_preemption_level() > 0);
39037602 501 pltrace(TRUE);
39236c6e
A
502#if defined(__clang__)
503 cpu_data_t GS_RELATIVE *cpu_data = (cpu_data_t GS_RELATIVE *)0UL;
504 if (0 == --cpu_data->cpu_preemption_level)
505 kernel_preempt_check();
506#else
91447636
A
507 __asm__ volatile ("decl %%gs:%P0 \n\t"
508 "jne 1f \n\t"
509 "call _kernel_preempt_check \n\t"
510 "1:"
1c79356b 511 : /* no outputs */
91447636
A
512 : "i" (offsetof(cpu_data_t, cpu_preemption_level))
513 : "eax", "ecx", "edx", "cc", "memory");
39236c6e 514#endif
1c79356b
A
515}
516
91447636
A
517static inline void
518enable_preemption_no_check(void)
1c79356b 519{
1c79356b 520 assert(get_preemption_level() > 0);
1c79356b 521
39037602 522 pltrace(TRUE);
39236c6e
A
523#if defined(__clang__)
524 cpu_data_t GS_RELATIVE *cpu_data = (cpu_data_t GS_RELATIVE *)0UL;
525 cpu_data->cpu_preemption_level--;
526#else
91447636 527 __asm__ volatile ("decl %%gs:%P0"
1c79356b 528 : /* no outputs */
91447636 529 : "i" (offsetof(cpu_data_t, cpu_preemption_level))
1c79356b 530 : "cc", "memory");
39236c6e 531#endif
1c79356b
A
532}
533
39037602
A
534static inline void
535_enable_preemption_no_check(void) {
536 enable_preemption_no_check();
537}
538
91447636
A
539static inline void
540mp_disable_preemption(void)
1c79356b 541{
39037602 542 disable_preemption_internal();
1c79356b
A
543}
544
91447636 545static inline void
39037602 546_mp_disable_preemption(void)
1c79356b 547{
39037602 548 disable_preemption_internal();
1c79356b
A
549}
550
91447636 551static inline void
39037602 552mp_enable_preemption(void)
1c79356b 553{
39037602
A
554 enable_preemption_internal();
555}
556
557static inline void
558_mp_enable_preemption(void) {
559 enable_preemption_internal();
560}
561
562static inline void
563mp_enable_preemption_no_check(void) {
1c79356b 564 enable_preemption_no_check();
1c79356b
A
565}
566
39037602
A
567static inline void
568_mp_enable_preemption_no_check(void) {
569 enable_preemption_no_check();
91447636
A
570}
571
39037602
A
572#ifdef XNU_KERNEL_PRIVATE
573#define disable_preemption() disable_preemption_internal()
574#define enable_preemption() enable_preemption_internal()
575#define MACHINE_PREEMPTION_MACROS (1)
576#endif
577
578
91447636 579static inline cpu_data_t *
39037602 580cpu_datap(int cpu) {
91447636
A
581 return cpu_data_ptr[cpu];
582}
583
584extern cpu_data_t *cpu_data_alloc(boolean_t is_boot_cpu);
316670eb 585extern void cpu_data_realloc(void);
1c79356b 586
1c79356b 587#endif /* I386_CPU_DATA */