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0c530ab8 1/*
593a1d5f 2 * Copyright (c) 2005-2008 Apple Inc. All rights reserved.
0c530ab8 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
0c530ab8 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
0c530ab8 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
0c530ab8
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
0c530ab8 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
0c530ab8
A
27 */
28/*
29 * @OSF_FREE_COPYRIGHT@
30 */
31/*
32 * @APPLE_FREE_COPYRIGHT@
33 */
34
35/*
36 * Author: Bill Angell, Apple
37 * Date: 10/auht-five
38 *
316670eb 39 * Random diagnostics, augmented Derek Kumar 2011
0c530ab8 40 *
0c530ab8
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41 *
42 */
43
44
45#include <kern/machine.h>
46#include <kern/processor.h>
47#include <mach/machine.h>
48#include <mach/processor_info.h>
49#include <mach/mach_types.h>
50#include <mach/boolean.h>
51#include <kern/thread.h>
52#include <kern/task.h>
53#include <kern/ipc_kobject.h>
54#include <mach/vm_param.h>
55#include <ipc/port.h>
56#include <ipc/ipc_entry.h>
57#include <ipc/ipc_space.h>
58#include <ipc/ipc_object.h>
59#include <ipc/ipc_port.h>
60#include <vm/vm_kern.h>
61#include <vm/vm_map.h>
62#include <vm/vm_page.h>
63#include <vm/pmap.h>
64#include <pexpert/pexpert.h>
65#include <console/video_console.h>
66#include <i386/cpu_data.h>
67#include <i386/Diagnostics.h>
68#include <i386/mp.h>
69#include <i386/pmCPU.h>
70#include <i386/tsc.h>
0c530ab8 71#include <mach/i386/syscall_sw.h>
316670eb 72#include <kern/kalloc.h>
db609669 73#include <sys/kdebug.h>
0c530ab8
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74
75diagWork dgWork;
0c530ab8
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76uint64_t lastRuptClear = 0ULL;
77
4b17d6b6
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78void cpu_powerstats(void *);
79
80typedef struct {
81 uint64_t caperf;
82 uint64_t cmperf;
83 uint64_t ccres[3];
84 uint64_t crtimes[4];
85 uint64_t citimes[4];
86 uint64_t crtime_total;
87 uint64_t citime_total;
88} core_energy_stat_t;
89
90typedef struct {
91 uint64_t pkg_cres[2][4];
92 uint64_t pkg_power_unit;
93 uint64_t pkg_energy;
94 uint32_t ncpus;
95 core_energy_stat_t cest[];
96} pkg_energy_statistics_t;
97
db609669 98
0c530ab8 99int
2d21ac55 100diagCall64(x86_saved_state_t * state)
0c530ab8 101{
2d21ac55
A
102 uint64_t curpos, i, j;
103 uint64_t selector, data;
104 uint64_t currNap, durNap;
105 x86_saved_state64_t *regs;
db609669 106 boolean_t diagflag;
4b17d6b6 107 uint32_t rval = 0;
2d21ac55
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108
109 assert(is_saved_state64(state));
110 regs = saved_state64(state);
db609669 111 diagflag = ((dgWork.dgFlags & enaDiagSCs) != 0);
2d21ac55
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112 selector = regs->rdi;
113
114 switch (selector) { /* Select the routine */
115 case dgRuptStat: /* Suck Interruption statistics */
316670eb 116 (void) ml_set_interrupts_enabled(TRUE);
2d21ac55
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117 data = regs->rsi; /* Get the number of processors */
118
119 if (data == 0) { /* If no location is specified for data, clear all
120 * counts
121 */
122 for (i = 0; i < real_ncpus; i++) { /* Cycle through
123 * processors */
124 for (j = 0; j < 256; j++)
125 cpu_data_ptr[i]->cpu_hwIntCnt[j] = 0;
126 }
127
128 lastRuptClear = mach_absolute_time(); /* Get the time of clear */
4b17d6b6
A
129 rval = 1; /* Normal return */
130 break;
2d21ac55
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131 }
132
133 (void) copyout((char *) &real_ncpus, data, sizeof(real_ncpus)); /* Copy out number of
134 * processors */
135
136 currNap = mach_absolute_time(); /* Get the time now */
137 durNap = currNap - lastRuptClear; /* Get the last interval
138 * duration */
139 if (durNap == 0)
140 durNap = 1; /* This is a very short time, make it
141 * bigger */
142
143 curpos = data + sizeof(real_ncpus); /* Point to the next
144 * available spot */
145
146 for (i = 0; i < real_ncpus; i++) { /* Move 'em all out */
147 (void) copyout((char *) &durNap, curpos, 8); /* Copy out the time
148 * since last clear */
149 (void) copyout((char *) &cpu_data_ptr[i]->cpu_hwIntCnt, curpos + 8, 256 * sizeof(uint32_t)); /* Copy out interrupt
150 * data for this
151 * processor */
152 curpos = curpos + (256 * sizeof(uint32_t) + 8); /* Point to next out put
153 * slot */
154 }
4b17d6b6 155 rval = 1;
2d21ac55 156 break;
4b17d6b6
A
157 case dgPowerStat:
158 {
159 uint32_t c2l = 0, c2h = 0, c3l = 0, c3h = 0, c6l = 0, c6h = 0, c7l = 0, c7h = 0;
160 uint32_t pkg_unit_l = 0, pkg_unit_h = 0, pkg_ecl = 0, pkg_ech = 0;
161
162 pkg_energy_statistics_t pkes;
163 core_energy_stat_t cest;
164
165 bzero(&pkes, sizeof(pkes));
166 bzero(&cest, sizeof(cest));
167
168 rdmsr_carefully(MSR_IA32_PKG_C2_RESIDENCY, &c2l, &c2h);
169 rdmsr_carefully(MSR_IA32_PKG_C3_RESIDENCY, &c3l, &c3h);
170 rdmsr_carefully(MSR_IA32_PKG_C6_RESIDENCY, &c6l, &c6h);
171 rdmsr_carefully(MSR_IA32_PKG_C7_RESIDENCY, &c7l, &c7h);
172
173 pkes.pkg_cres[0][0] = ((uint64_t)c2h << 32) | c2l;
174 pkes.pkg_cres[0][1] = ((uint64_t)c3h << 32) | c3l;
175 pkes.pkg_cres[0][2] = ((uint64_t)c6h << 32) | c6l;
176 pkes.pkg_cres[0][3] = ((uint64_t)c7h << 32) | c7l;
177
178 rdmsr_carefully(MSR_IA32_PKG_POWER_SKU_UNIT, &pkg_unit_l, &pkg_unit_h);
179 rdmsr_carefully(MSR_IA32_PKG_ENERGY_STATUS, &pkg_ecl, &pkg_ech);
180
181 pkes.pkg_power_unit = ((uint64_t)pkg_unit_h << 32) | pkg_unit_l;
182 pkes.pkg_energy = ((uint64_t)pkg_ech << 32) | pkg_ecl;
183
184 pkes.ncpus = real_ncpus;
185
186 (void) ml_set_interrupts_enabled(TRUE);
187
188 copyout(&pkes, regs->rsi, sizeof(pkes));
189 curpos = regs->rsi + sizeof(pkes);
190
191 mp_cpus_call(CPUMASK_ALL, ASYNC, cpu_powerstats, NULL);
192
193 for (i = 0; i < real_ncpus; i++) {
194 cest.caperf = cpu_data_ptr[i]->cpu_aperf;
195 cest.cmperf = cpu_data_ptr[i]->cpu_mperf;
196 cest.ccres[0] = cpu_data_ptr[i]->cpu_c3res;
197 cest.ccres[1] = cpu_data_ptr[i]->cpu_c6res;
198 cest.ccres[2] = cpu_data_ptr[i]->cpu_c7res;
199
200 bcopy(&cpu_data_ptr[i]->cpu_rtimes[0], &cest.crtimes[0], sizeof(cest.crtimes));
201 bcopy(&cpu_data_ptr[i]->cpu_itimes[0], &cest.citimes[0], sizeof(cest.citimes));
202 cest.citime_total = cpu_data_ptr[i]->cpu_itime_total;
203 cest.crtime_total = cpu_data_ptr[i]->cpu_rtime_total;
204
205 copyout(&cest, curpos, sizeof(cest));
206 curpos += sizeof(cest);
207 }
208 rval = 1;
209 }
210 break;
211
316670eb
A
212#if DEBUG
213 case dgGzallocTest:
214 {
215 (void) ml_set_interrupts_enabled(TRUE);
db609669
A
216 if (diagflag == 0)
217 break;
218
316670eb
A
219 unsigned *ptr = (unsigned *)kalloc(1024);
220 kfree(ptr, 1024);
221 *ptr = 0x42;
2d21ac55 222 }
316670eb
A
223 break;
224#endif
2d21ac55 225
316670eb
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226#if defined(__x86_64__)
227 case dgPermCheck:
228 {
229 (void) ml_set_interrupts_enabled(TRUE);
db609669
A
230 if (diagflag == 0)
231 break;
232
4b17d6b6 233 rval = pmap_permissions_verify(kernel_pmap, kernel_map, 0, ~0ULL);
0c530ab8 234 }
316670eb
A
235 break;
236#endif /* __x86_64__*/
0c530ab8
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237
238 default: /* Handle invalid ones */
4b17d6b6 239 rval = 0; /* Return an exception */
0c530ab8
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240 }
241
4b17d6b6
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242 regs->rax = rval;
243
244 return rval; /* Normal non-ast check return */
245}
246
247void cpu_powerstats(__unused void *arg) {
248 cpu_data_t *cdp = current_cpu_datap();
249 int cnum = cdp->cpu_number;
250 uint32_t cl = 0, ch = 0, mpl = 0, mph = 0, apl = 0, aph = 0;
251
252 rdmsr_carefully(MSR_IA32_MPERF, &mpl, &mph);
253 rdmsr_carefully(MSR_IA32_APERF, &apl, &aph);
254
255 cdp->cpu_mperf = ((uint64_t)mph << 32) | mpl;
256 cdp->cpu_aperf = ((uint64_t)aph << 32) | apl;
257
258 if (cnum & 1)
259 return;
260
261 rdmsr_carefully(MSR_IA32_CORE_C3_RESIDENCY, &cl, &ch);
262 cdp->cpu_c3res = ((uint64_t)ch << 32) | cl;
263
264 rdmsr_carefully(MSR_IA32_CORE_C6_RESIDENCY, &cl, &ch);
265 cdp->cpu_c6res = ((uint64_t)ch << 32) | cl;
266
267 rdmsr_carefully(MSR_IA32_CORE_C7_RESIDENCY, &cl, &ch);
268 cdp->cpu_c7res = ((uint64_t)ch << 32) | cl;
0c530ab8 269}