[apple/xnu.git] / osfmk / i386 / fpu.h

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this
 * file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
/* 
 * Mach Operating System
 * Copyright (c) 1991 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon 
 * the rights to redistribute these changes.
 */

/*
 */

#ifndef	_I386_FPU_H_
#define	_I386_FPU_H_

/*
 * Macro definitions for routines to manipulate the
 * floating-point processor.
 */

#include <cpus.h>
#include <i386/proc_reg.h>
#include <i386/thread.h>
#include <kern/kern_types.h>
#include <mach/i386/kern_return.h>
#include <mach/i386/thread_status.h>

/*
 * FPU instructions.
 */
#define	fninit() \
	__asm__ volatile("fninit")

#define	fnstcw(control) \
	__asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))

#define	fldcw(control) \
	__asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )

extern unsigned short		fnstsw(void);

extern __inline__ unsigned short fnstsw(void)
{
	unsigned short status;
	__asm__ volatile("fnstsw %0" : "=ma" (status));
	return(status);
}

#define	fnclex() \
	__asm__ volatile("fnclex")

#define	fnsave(state)  \
	__asm__ volatile("fnsave %0" : "=m" (*state))

#define	frstor(state) \
	__asm__ volatile("frstor %0" : : "m" (state))

#define fwait() \
    	__asm__("fwait");

#define fxrstor(addr)           __asm("fxrstor %0" : : "m" (*(addr)))     
#define fxsave(addr)            __asm __volatile("fxsave %0" : "=m" (*(addr)))

#define FXSAFE() (fp_kind == FP_FXSR)

#define	fpu_load_context(pcb)

/*
 * Save thread`s FPU context.
 * If only one CPU, we just set the task-switched bit,
 * to keep the new thread from using the coprocessor.
 * If multiple CPUs, we save the entire state.
 * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
 * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
 */
#if	NCPUS > 1
#define	fpu_save_context(thread) \
    { \
	register struct i386_fpsave_state *ifps; \
	ifps = (thread)->top_act->mact.pcb->ims.ifps; \
	if (ifps != 0 && !ifps->fp_valid) { \
	    /* registers are in FPU - save to memory */ \
	    ifps->fp_valid = TRUE; \
            ifps->fp_save_flavor = FP_387; \
            if (FXSAFE()) { \
		fxsave(&ifps->fx_save_state); \
                ifps->fp_save_flavor = FP_FXSR; \
	    } \
            fnsave(&ifps->fp_save_state); \
	} \
	set_ts(); \
    }
	    
#else	/* NCPUS == 1 */
#define	fpu_save_context(thread) \
    { \
	    set_ts(); \
    }

#endif	/* NCPUS == 1 */


extern int	fp_kind;

extern void		init_fpu(void);
extern void		fpu_module_init(void);
extern void		fp_free(
				struct i386_fpsave_state	* fps);
extern kern_return_t	fpu_set_state(
				thread_act_t			thr_act,
				struct i386_float_state		* st);
extern kern_return_t	fpu_get_state(
				thread_act_t			thr_act,
				struct i386_float_state		* st);
/* extern kern_return_t	fpu_set_fxstate(
				thread_act_t			thr_act,
				struct i386_float_state		* st);
extern kern_return_t	fpu_get_fxstate(
				thread_act_t			thr_act,
				struct i386_float_state		* st); */
extern void		fpnoextflt(void);
extern void		fpextovrflt(void);
extern void		fpexterrflt(void);
extern void		fp_state_alloc(void);
extern void		fpintr(void);
extern void		fpflush(thread_act_t);

#endif	/* _I386_FPU_H_ */
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
43866e37	6	* Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
1c79356b	7	*
43866e37 A	8	* This file contains Original Code and/or Modifications of Original Code
	9	* as defined in and that are subject to the Apple Public Source License
	10	* Version 2.0 (the 'License'). You may not use this file except in
	11	* compliance with the License. Please obtain a copy of the License at
	12	* http://www.opensource.apple.com/apsl/ and read it before using this
	13	* file.
	14	*
	15	* The Original Code and all software distributed under the License are
	16	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	17	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	18	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
43866e37 A	19	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	20	* Please see the License for the specific language governing rights and
	21	* limitations under the License.
1c79356b A	22	*
	23	* @APPLE_LICENSE_HEADER_END@
	24	*/
	25	/*
	26	* @OSF_COPYRIGHT@
	27	*/
	28	/*
	29	* Mach Operating System
	30	* Copyright (c) 1991 Carnegie Mellon University
	31	* All Rights Reserved.
	32	*
	33	* Permission to use, copy, modify and distribute this software and its
	34	* documentation is hereby granted, provided that both the copyright
	35	* notice and this permission notice appear in all copies of the
	36	* software, derivative works or modified versions, and any portions
	37	* thereof, and that both notices appear in supporting documentation.
	38	*
	39	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	40	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	41	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	42	*
	43	* Carnegie Mellon requests users of this software to return to
	44	*
	45	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	46	* School of Computer Science
	47	* Carnegie Mellon University
	48	* Pittsburgh PA 15213-3890
	49	*
	50	* any improvements or extensions that they make and grant Carnegie Mellon
	51	* the rights to redistribute these changes.
	52	*/
	53
	54	/*
	55	*/
	56
	57	#ifndef _I386_FPU_H_
	58	#define _I386_FPU_H_
	59
	60	/*
	61	* Macro definitions for routines to manipulate the
	62	* floating-point processor.
	63	*/
	64
	65	#include <cpus.h>
	66	#include <i386/proc_reg.h>
	67	#include <i386/thread.h>
	68	#include <kern/kern_types.h>
	69	#include <mach/i386/kern_return.h>
	70	#include <mach/i386/thread_status.h>
	71
	72	/*
	73	* FPU instructions.
	74	*/
	75	#define fninit() \
	76	__asm__ volatile("fninit")
	77
	78	#define fnstcw(control) \
	79	__asm__("fnstcw %0" : "=m" ((unsigned short )(control)))
	80
	81	#define fldcw(control) \
	82	__asm__ volatile("fldcw %0" : : "m" ((unsigned short ) &(control)) )
	83
	84	extern unsigned short fnstsw(void);
	85
86	extern __inline__ unsigned short fnstsw(void)
87	{
88	unsigned short status;
89	__asm__ volatile("fnstsw %0" : "=ma" (status));
90	return(status);
91	}
92
93	#define fnclex() \
94	__asm__ volatile("fnclex")
95
55e303ae	96	#define fnsave(state) \
1c79356b A	97	__asm__ volatile("fnsave %0" : "=m" (*state))
	98
	99	#define frstor(state) \
	100	__asm__ volatile("frstor %0" : : "m" (state))
	101
	102	#define fwait() \
	103	__asm__("fwait");
	104
55e303ae A	105	#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
	106	#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
	107
	108	#define FXSAFE() (fp_kind == FP_FXSR)
1c79356b A	109
	110	#define fpu_load_context(pcb)
	111
	112	/*
	113	* Save thread`s FPU context.
	114	* If only one CPU, we just set the task-switched bit,
	115	* to keep the new thread from using the coprocessor.
	116	* If multiple CPUs, we save the entire state.
55e303ae A	117	* NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
55e303ae A	118	* FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
1c79356b A	119	*/
	120	#if NCPUS > 1
	121	#define fpu_save_context(thread) \
	122	{ \
	123	register struct i386_fpsave_state *ifps; \
	124	ifps = (thread)->top_act->mact.pcb->ims.ifps; \
	125	if (ifps != 0 && !ifps->fp_valid) { \
	126	/* registers are in FPU - save to memory */ \
	127	ifps->fp_valid = TRUE; \
55e303ae A	128	ifps->fp_save_flavor = FP_387; \
	129	if (FXSAFE()) { \
	130	fxsave(&ifps->fx_save_state); \
	131	ifps->fp_save_flavor = FP_FXSR; \
	132	} \
	133	fnsave(&ifps->fp_save_state); \
1c79356b A	134	} \
	135	set_ts(); \
	136	}
	137
	138	#else /* NCPUS == 1 */
	139	#define fpu_save_context(thread) \
	140	{ \
	141	set_ts(); \
	142	}
	143
	144	#endif /* NCPUS == 1 */
	145
	146
	147	extern int fp_kind;
	148
	149	extern void init_fpu(void);
	150	extern void fpu_module_init(void);
	151	extern void fp_free(
	152	struct i386_fpsave_state * fps);
	153	extern kern_return_t fpu_set_state(
	154	thread_act_t thr_act,
	155	struct i386_float_state * st);
	156	extern kern_return_t fpu_get_state(
	157	thread_act_t thr_act,
	158	struct i386_float_state * st);
55e303ae A	159	/* extern kern_return_t fpu_set_fxstate(
	160	thread_act_t thr_act,
	161	struct i386_float_state * st);
	162	extern kern_return_t fpu_get_fxstate(
	163	thread_act_t thr_act,
	164	struct i386_float_state * st); */
1c79356b A	165	extern void fpnoextflt(void);
	166	extern void fpextovrflt(void);
	167	extern void fpexterrflt(void);
	168	extern void fp_state_alloc(void);
	169	extern void fpintr(void);
	170	extern void fpflush(thread_act_t);
	171
	172	#endif /* _I386_FPU_H_ */