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de355530 1/*
4452a7af 2 * Copyright (c) 2003-2006 Apple Computer, Inc. All rights reserved.
de355530 3 *
8f6c56a5 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
de355530 5 *
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6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
8ad349bb 24 * limitations under the License.
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25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
de355530 27 */
de355530 28
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29#include <machine/cpu_capabilities.h>
30#include <machine/commpage.h>
31
32 .text
33 .align 2, 0x90
34
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35// void sysFlushDcache( void *p, size_t len );
36// 32-bit version
37
55e303ae 38Lsys_flush_dcache:
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39 movl 4(%esp),%ecx // get length
40 movl 8(%esp),%edx // get ptr
41 testl %ecx,%ecx // length 0?
42 jz 2f // yes
43 mfence // ensure previous stores make it to memory
441:
45 clflush (%edx) // flush a line
46 addl $64,%edx
47 subl $64,%ecx
48 jnc 1b
49 mfence // make sure memory is updated before we return
502:
51 ret
52
53 COMMPAGE_DESCRIPTOR(sys_flush_dcache,_COMM_PAGE_FLUSH_DCACHE,kCache64,0)
54
55
56// void sysFlushDcache( void *p, size_t len );
57// 64-bit version
58 .code64
59Lsys_flush_dcache_64: // %rdi = ptr, %rsi = length
60 testq %rsi,%rsi // length 0?
61 jz 2f // yes
62 mfence // ensure previous stores make it to memory
631:
64 clflush (%rdi) // flush a line
65 addq $64,%rdi
66 subq $64,%rsi
67 jnc 1b
68 mfence // make sure memory is updated before we return
692:
c0fea474 70 ret
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71 .code32
72 COMMPAGE_DESCRIPTOR(sys_flush_dcache_64,_COMM_PAGE_FLUSH_DCACHE,kCache64,0)
73
c0fea474 74
4452a7af 75// void sysIcacheInvalidate( void *p, size_t len );
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76
77Lsys_icache_invalidate:
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78 // This is a NOP on intel processors, since the intent of the API
79 // is to make data executable, and Intel L1Is are coherent with L1D.
80 // We can use same routine both in 32 and 64-bit mode, since it is
81 // just a RET instruction.
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82 ret
83
84 COMMPAGE_DESCRIPTOR(sys_icache_invalidate,_COMM_PAGE_FLUSH_ICACHE,0,0)