[apple/xnu.git] / osfmk / i386 / cpuid.c

/*
 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
#include <platforms.h>
#include <mach_kdb.h>
#include <vm/vm_page.h>
#include <pexpert/pexpert.h>

#include "cpuid.h"
#if MACH_KDB
#include <i386/db_machdep.h>
#include <ddb/db_aout.h>
#include <ddb/db_access.h>
#include <ddb/db_sym.h>
#include <ddb/db_variables.h>
#include <ddb/db_command.h>
#include <ddb/db_output.h>
#include <ddb/db_expr.h>
#endif

#define min(a,b) ((a) < (b) ? (a) : (b))
#define quad(hi,lo)	(((uint64_t)(hi)) << 32 | (lo))

#define bit(n)		(1UL << (n))
#define bitmask(h,l)	((bit(h)|(bit(h)-1)) & ~(bit(l)-1))
#define bitfield(x,h,l)	(((x) & bitmask(h,l)) >> l)

/*
 * CPU identification routines.
 */

static i386_cpu_info_t	*cpuid_cpu_infop = NULL;
static i386_cpu_info_t	cpuid_cpu_info;

/* this function is Intel-specific */
static void
cpuid_set_cache_info( i386_cpu_info_t * info_p )
{
	uint32_t	cpuid_result[4];
	uint32_t	reg[4];
	uint32_t	index;
	uint32_t	linesizes[LCACHE_MAX];
	unsigned int	i;
	unsigned int	j;
	boolean_t	cpuid_deterministic_supported = FALSE;

	bzero( linesizes, sizeof(linesizes) );

	/* Get processor cache descriptor info using leaf 2.  We don't use
	 * this internally, but must publish it for KEXTs.
	 */
	do_cpuid(2, cpuid_result);
	for (j = 0; j < 4; j++) {
		if ((cpuid_result[j] >> 31) == 1) 	/* bit31 is validity */
			continue;
		((uint32_t *) info_p->cache_info)[j] = cpuid_result[j];
	}
	/* first byte gives number of cpuid calls to get all descriptors */
	for (i = 1; i < info_p->cache_info[0]; i++) {
		if (i*16 > sizeof(info_p->cache_info))
			break;
		do_cpuid(2, cpuid_result);
		for (j = 0; j < 4; j++) {
			if ((cpuid_result[j] >> 31) == 1) 
				continue;
			((uint32_t *) info_p->cache_info)[4*i+j] =
				cpuid_result[j];
		}
	}

	/*
	 * Get cache info using leaf 4, the "deterministic cache parameters."
	 * Most processors Mac OS X supports implement this flavor of CPUID.
	 * Loop over each cache on the processor.
	 */
	do_cpuid(0, cpuid_result);
	if (cpuid_result[eax] >= 4)
		cpuid_deterministic_supported = TRUE;

	for (index = 0; cpuid_deterministic_supported; index++) {
		cache_type_t	type = Lnone;
		uint32_t	cache_type;
		uint32_t	cache_level;
		uint32_t	cache_sharing;
		uint32_t	cache_linesize;
		uint32_t	cache_sets;
		uint32_t	cache_associativity;
		uint32_t	cache_size;
		uint32_t	cache_partitions;
		uint32_t	colors;
		
		reg[eax] = 4;		/* cpuid request 4 */
		reg[ecx] = index;	/* index starting at 0 */
		cpuid(reg);
//kprintf("cpuid(4) index=%d eax=%p\n", index, reg[eax]);
		cache_type = bitfield(reg[eax], 4, 0);
		if (cache_type == 0)
			break;		/* no more caches */
		cache_level  		= bitfield(reg[eax],  7,  5);
		cache_sharing	 	= bitfield(reg[eax], 25, 14) + 1;
		info_p->cpuid_cores_per_package 
					= bitfield(reg[eax], 31, 26) + 1;
		cache_linesize		= bitfield(reg[ebx], 11,  0) + 1;
		cache_partitions	= bitfield(reg[ebx], 21, 12) + 1;
		cache_associativity	= bitfield(reg[ebx], 31, 22) + 1;
		cache_sets 		= bitfield(reg[ecx], 31,  0) + 1;
				
		/* Map type/levels returned by CPUID into cache_type_t */
		switch (cache_level) {
		case 1:
			type = cache_type == 1 ? L1D :
			       cache_type == 2 ? L1I :
						 Lnone;
			break;
		case 2:
			type = cache_type == 3 ? L2U :
						 Lnone;
			break;
		case 3:
			type = cache_type == 3 ? L3U :
						 Lnone;
			break;
		default:
			type = Lnone;
		}
		
		/* The total size of a cache is:
		 *	( linesize * sets * associativity )
		 */
		if (type != Lnone) {
			cache_size = cache_linesize * cache_sets * cache_associativity;
			info_p->cache_size[type] = cache_size;
			info_p->cache_sharing[type] = cache_sharing;
			info_p->cache_partitions[type] = cache_partitions;
			linesizes[type] = cache_linesize;
			
			/* Compute the number of page colors for this cache,
			 * which is:
			 *	( linesize * sets ) / page_size
			 *
			 * To help visualize this, consider two views of a
			 * physical address.  To the cache, it is composed
			 * of a line offset, a set selector, and a tag.
			 * To VM, it is composed of a page offset, a page
			 * color, and other bits in the pageframe number:
			 *
			 *           +-----------------+---------+--------+
			 *  cache:   |       tag       |   set   | offset |
			 *           +-----------------+---------+--------+
			 *
			 *           +-----------------+-------+----------+
			 *  VM:      |    don't care   | color | pg offset|
			 *           +-----------------+-------+----------+
			 *
			 * The color is those bits in (set+offset) not covered
			 * by the page offset.
			 */
			 colors = ( cache_linesize * cache_sets ) >> 12;
			 
			 if ( colors > vm_cache_geometry_colors )
				vm_cache_geometry_colors = colors;
		}
	} 
	
	/*
	 * If deterministic cache parameters are not available, use
	 * something else
	 */
	if (info_p->cpuid_cores_per_package == 0) {
		info_p->cpuid_cores_per_package = 1;

		/* cpuid define in 1024 quantities */
		info_p->cache_size[L2U] = info_p->cpuid_cache_size * 1024;
		info_p->cache_sharing[L2U] = 1;
		info_p->cache_partitions[L2U] = 1;

		linesizes[L2U] = info_p->cpuid_cache_linesize;
	}
	
	/*
	 * What linesize to publish?  We use the L2 linesize if any,
	 * else the L1D.
	 */
	if ( linesizes[L2U] )
		info_p->cache_linesize = linesizes[L2U];
	else if (linesizes[L1D])
		info_p->cache_linesize = linesizes[L1D];
	else panic("no linesize");
}

static void
cpuid_set_generic_info(i386_cpu_info_t *info_p)
{
	uint32_t	cpuid_reg[4];
	uint32_t	max_extid;
        char            str[128], *p;

	/* do cpuid 0 to get vendor */
	do_cpuid(0, cpuid_reg);
	bcopy((char *)&cpuid_reg[ebx], &info_p->cpuid_vendor[0], 4); /* ug */
	bcopy((char *)&cpuid_reg[ecx], &info_p->cpuid_vendor[8], 4);
	bcopy((char *)&cpuid_reg[edx], &info_p->cpuid_vendor[4], 4);
	info_p->cpuid_vendor[12] = 0;

	/* get extended cpuid results */
	do_cpuid(0x80000000, cpuid_reg);
	max_extid = cpuid_reg[eax];

	/* check to see if we can get brand string */
	if (max_extid >= 0x80000004) {
		/*
		 * The brand string 48 bytes (max), guaranteed to
		 * be NUL terminated.
		 */
		do_cpuid(0x80000002, cpuid_reg);
		bcopy((char *)cpuid_reg, &str[0], 16);
		do_cpuid(0x80000003, cpuid_reg);
		bcopy((char *)cpuid_reg, &str[16], 16);
		do_cpuid(0x80000004, cpuid_reg);
		bcopy((char *)cpuid_reg, &str[32], 16);
		for (p = str; *p != '\0'; p++) {
			if (*p != ' ') break;
		}
		strlcpy(info_p->cpuid_brand_string,
			p, sizeof(info_p->cpuid_brand_string));

                if (!strncmp(info_p->cpuid_brand_string, CPUID_STRING_UNKNOWN,
			     min(sizeof(info_p->cpuid_brand_string),
				 strlen(CPUID_STRING_UNKNOWN) + 1))) {
                    /*
                     * This string means we have a firmware-programmable brand string,
                     * and the firmware couldn't figure out what sort of CPU we have.
                     */
                    info_p->cpuid_brand_string[0] = '\0';
                }
	}
    
	/* Get cache and addressing info. */
	if (max_extid >= 0x80000006) {
		do_cpuid(0x80000006, cpuid_reg);
		info_p->cpuid_cache_linesize   = bitfield(cpuid_reg[ecx], 7, 0);
		info_p->cpuid_cache_L2_associativity =
						 bitfield(cpuid_reg[ecx],15,12);
		info_p->cpuid_cache_size       = bitfield(cpuid_reg[ecx],31,16);
		do_cpuid(0x80000008, cpuid_reg);
		info_p->cpuid_address_bits_physical =
						 bitfield(cpuid_reg[eax], 7, 0);
		info_p->cpuid_address_bits_virtual =
						 bitfield(cpuid_reg[eax],15, 8);
	}

	/* get processor signature and decode */
	do_cpuid(1, cpuid_reg);
	info_p->cpuid_signature = cpuid_reg[eax];
	info_p->cpuid_stepping  = bitfield(cpuid_reg[eax],  3,  0);
	info_p->cpuid_model     = bitfield(cpuid_reg[eax],  7,  4);
	info_p->cpuid_family    = bitfield(cpuid_reg[eax], 11,  8);
	info_p->cpuid_type      = bitfield(cpuid_reg[eax], 13, 12);
	info_p->cpuid_extmodel  = bitfield(cpuid_reg[eax], 19, 16);
	info_p->cpuid_extfamily = bitfield(cpuid_reg[eax], 27, 20);
	info_p->cpuid_brand     = bitfield(cpuid_reg[ebx],  7,  0);
	info_p->cpuid_features  = quad(cpuid_reg[ecx], cpuid_reg[edx]);

	/* Fold extensions into family/model */
	if (info_p->cpuid_family == 0x0f)
		info_p->cpuid_family += info_p->cpuid_extfamily;
	if (info_p->cpuid_family == 0x0f || info_p->cpuid_family== 0x06)
		info_p->cpuid_model += (info_p->cpuid_extmodel << 4);

	if (info_p->cpuid_features & CPUID_FEATURE_HTT)
		info_p->cpuid_logical_per_package =
				bitfield(cpuid_reg[ebx], 23, 16);
	else
		info_p->cpuid_logical_per_package = 1;

	if (max_extid >= 0x80000001) {
		do_cpuid(0x80000001, cpuid_reg);
		info_p->cpuid_extfeatures =
				quad(cpuid_reg[ecx], cpuid_reg[edx]);
	}

	if (info_p->cpuid_extfeatures && CPUID_FEATURE_MONITOR) {
		/*
		 * Extract the Monitor/Mwait Leaf info:
		 */
		do_cpuid(5, cpuid_reg);
		info_p->cpuid_mwait_linesize_min = cpuid_reg[eax];
		info_p->cpuid_mwait_linesize_max = cpuid_reg[ebx];
		info_p->cpuid_mwait_extensions   = cpuid_reg[ecx];
		info_p->cpuid_mwait_sub_Cstates  = cpuid_reg[edx];

		/*
		 * And the thermal and Power Leaf while we're at it:
		 */
		do_cpuid(6, cpuid_reg);
		info_p->cpuid_thermal_sensor =
					bitfield(cpuid_reg[eax], 0, 0);
		info_p->cpuid_thermal_dynamic_acceleration =
					bitfield(cpuid_reg[eax], 1, 1);
		info_p->cpuid_thermal_thresholds =
					bitfield(cpuid_reg[ebx], 3, 0);
		info_p->cpuid_thermal_ACNT_MCNT =
					bitfield(cpuid_reg[ecx], 0, 0);

		/*
		 * And the Architectural Performance Monitoring Leaf:
		 */
		do_cpuid(0xa, cpuid_reg);
		info_p->cpuid_arch_perf_version =
					bitfield(cpuid_reg[eax], 7, 0);
		info_p->cpuid_arch_perf_number =
					bitfield(cpuid_reg[eax],15, 8);
		info_p->cpuid_arch_perf_width =
					bitfield(cpuid_reg[eax],23,16);
		info_p->cpuid_arch_perf_events_number =
					bitfield(cpuid_reg[eax],31,24);
		info_p->cpuid_arch_perf_events =
					cpuid_reg[ebx];
		info_p->cpuid_arch_perf_fixed_number =
					bitfield(cpuid_reg[edx], 4, 0);
		info_p->cpuid_arch_perf_fixed_width =
					bitfield(cpuid_reg[edx],12, 5);

	}

	return;
}

void
cpuid_set_info(void)
{
	bzero((void *)&cpuid_cpu_info, sizeof(cpuid_cpu_info));

	cpuid_set_generic_info(&cpuid_cpu_info);

	/* verify we are running on a supported CPU */
	if ((strncmp(CPUID_VID_INTEL, cpuid_cpu_info.cpuid_vendor,
		     min(strlen(CPUID_STRING_UNKNOWN) + 1,
			 sizeof(cpuid_cpu_info.cpuid_vendor)))) ||
	   (cpuid_cpu_info.cpuid_family != 6) ||
	   (cpuid_cpu_info.cpuid_model < 13))
		panic("Unsupported CPU");

	cpuid_cpu_info.cpuid_cpu_type = CPU_TYPE_X86;
	cpuid_cpu_info.cpuid_cpu_subtype = CPU_SUBTYPE_X86_ARCH1;

	cpuid_set_cache_info(&cpuid_cpu_info);

	cpuid_cpu_info.cpuid_model_string = ""; /* deprecated */
}

static struct {
	uint64_t	mask;
	const char	*name;
} feature_map[] = {
	{CPUID_FEATURE_FPU,   "FPU",},
	{CPUID_FEATURE_VME,   "VME",},
	{CPUID_FEATURE_DE,    "DE",},
	{CPUID_FEATURE_PSE,   "PSE",},
	{CPUID_FEATURE_TSC,   "TSC",},
	{CPUID_FEATURE_MSR,   "MSR",},
	{CPUID_FEATURE_PAE,   "PAE",},
	{CPUID_FEATURE_MCE,   "MCE",},
	{CPUID_FEATURE_CX8,   "CX8",},
	{CPUID_FEATURE_APIC,  "APIC",},
	{CPUID_FEATURE_SEP,   "SEP",},
	{CPUID_FEATURE_MTRR,  "MTRR",},
	{CPUID_FEATURE_PGE,   "PGE",},
	{CPUID_FEATURE_MCA,   "MCA",},
	{CPUID_FEATURE_CMOV,  "CMOV",},
	{CPUID_FEATURE_PAT,   "PAT",},
	{CPUID_FEATURE_PSE36, "PSE36",},
	{CPUID_FEATURE_PSN,   "PSN",},
	{CPUID_FEATURE_CLFSH, "CLFSH",},
	{CPUID_FEATURE_DS,    "DS",},
	{CPUID_FEATURE_ACPI,  "ACPI",},
	{CPUID_FEATURE_MMX,   "MMX",},
	{CPUID_FEATURE_FXSR,  "FXSR",},
	{CPUID_FEATURE_SSE,   "SSE",},
	{CPUID_FEATURE_SSE2,  "SSE2",},
	{CPUID_FEATURE_SS,    "SS",},
	{CPUID_FEATURE_HTT,   "HTT",},
	{CPUID_FEATURE_TM,    "TM",},
	{CPUID_FEATURE_SSE3,    "SSE3"},
	{CPUID_FEATURE_MONITOR, "MON"},
	{CPUID_FEATURE_DSCPL,   "DSCPL"},
	{CPUID_FEATURE_VMX,     "VMX"},
	{CPUID_FEATURE_SMX,     "SMX"},
	{CPUID_FEATURE_EST,     "EST"},
	{CPUID_FEATURE_TM2,     "TM2"},
	{CPUID_FEATURE_SSSE3,   "SSSE3"},
	{CPUID_FEATURE_CID,     "CID"},
	{CPUID_FEATURE_CX16,    "CX16"},
	{CPUID_FEATURE_xTPR,    "TPR"},
	{CPUID_FEATURE_PDCM,    "PDCM"},
	{CPUID_FEATURE_SSE4_1,  "SSE4.1"},
	{CPUID_FEATURE_SSE4_2,  "SSE4.2"},
	{CPUID_FEATURE_POPCNT,  "POPCNT"},
	{0, 0}
},
extfeature_map[] = {
	{CPUID_EXTFEATURE_SYSCALL, "SYSCALL"},
	{CPUID_EXTFEATURE_XD,      "XD"},
	{CPUID_EXTFEATURE_EM64T,   "EM64T"},
	{CPUID_EXTFEATURE_LAHF,    "LAHF"},
	{0, 0}
};

i386_cpu_info_t	*
cpuid_info(void)
{
	/* Set-up the cpuid_indo stucture lazily */
	if (cpuid_cpu_infop == NULL) {
		cpuid_set_info();
		cpuid_cpu_infop = &cpuid_cpu_info;
	}
	return cpuid_cpu_infop;
}

char *
cpuid_get_feature_names(uint64_t features, char *buf, unsigned buf_len)
{
	int	len = -1;
	char	*p = buf;
	int	i;

	for (i = 0; feature_map[i].mask != 0; i++) {
		if ((features & feature_map[i].mask) == 0)
			continue;
		if (len > 0)
			*p++ = ' ';
		len = min(strlen(feature_map[i].name), (buf_len-1) - (p-buf));
		if (len == 0)
			break;
		bcopy(feature_map[i].name, p, len);
		p += len;
	}
	*p = '\0';
	return buf;
}

char *
cpuid_get_extfeature_names(uint64_t extfeatures, char *buf, unsigned buf_len)
{
	int	len = -1;
	char	*p = buf;
	int	i;

	for (i = 0; extfeature_map[i].mask != 0; i++) {
		if ((extfeatures & extfeature_map[i].mask) == 0)
			continue;
		if (len > 0)
			*p++ = ' ';
		len = min(strlen(extfeature_map[i].name), (buf_len-1)-(p-buf));
		if (len == 0)
			break;
		bcopy(extfeature_map[i].name, p, len);
		p += len;
	}
	*p = '\0';
	return buf;
}


#if CONFIG_NO_KPRINTF_STRINGS
void
cpuid_feature_display(
	__unused const char	*header)
{
}

void
cpuid_extfeature_display(
	__unused const char	*header)
{
}

void
cpuid_cpu_display(
	__unused const char	*header)
{
}
#else /* CONFIG_NO_KPRINTF_STRINGS */
void
cpuid_feature_display(
	const char	*header)
{
	char	buf[256];

	kprintf("%s: %s\n", header,
		  cpuid_get_feature_names(cpuid_features(),
						buf, sizeof(buf)));
	if (cpuid_features() & CPUID_FEATURE_HTT) {
#define s_if_plural(n)	((n > 1) ? "s" : "")
		kprintf("  HTT: %d core%s per package;"
			     " %d logical cpu%s per package\n",
			cpuid_cpu_info.cpuid_cores_per_package,
			s_if_plural(cpuid_cpu_info.cpuid_cores_per_package),
			cpuid_cpu_info.cpuid_logical_per_package,
			s_if_plural(cpuid_cpu_info.cpuid_logical_per_package));
	}
}

void
cpuid_extfeature_display(
	const char	*header)
{
	char	buf[256];

	kprintf("%s: %s\n", header,
		  cpuid_get_extfeature_names(cpuid_extfeatures(),
						buf, sizeof(buf)));
}

void
cpuid_cpu_display(
	const char	*header)
{
    if (cpuid_cpu_info.cpuid_brand_string[0] != '\0') {
	kprintf("%s: %s\n", header, cpuid_cpu_info.cpuid_brand_string);
    }
}
#endif /* !CONFIG_NO_KPRINTF_STRINGS */

unsigned int
cpuid_family(void)
{
	return cpuid_info()->cpuid_family;
}

cpu_type_t
cpuid_cputype(void)
{
	return cpuid_info()->cpuid_cpu_type;
}

cpu_subtype_t
cpuid_cpusubtype(void)
{
	return cpuid_info()->cpuid_cpu_subtype;
}

uint64_t
cpuid_features(void)
{
	static int checked = 0;
	char	fpu_arg[16] = { 0 };

	(void) cpuid_info();
	if (!checked) {
		    /* check for boot-time fpu limitations */
			if (PE_parse_boot_arg("_fpu", &fpu_arg[0])) {
				printf("limiting fpu features to: %s\n", fpu_arg);
				if (!strncmp("387", fpu_arg, sizeof("387")) || !strncmp("mmx", fpu_arg, sizeof("mmx"))) {
					printf("no sse or sse2\n");
					cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE | CPUID_FEATURE_SSE2 | CPUID_FEATURE_FXSR);
				} else if (!strncmp("sse", fpu_arg, sizeof("sse"))) {
					printf("no sse2\n");
					cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE2);
				}
			}
			checked = 1;
	}
	return cpuid_cpu_info.cpuid_features;
}

uint64_t
cpuid_extfeatures(void)
{
	return cpuid_info()->cpuid_extfeatures;
}
 

#if MACH_KDB

/*
 *	Display the cpuid
 * *		
 *	cp
 */
void 
db_cpuid(__unused db_expr_t addr,
	 __unused int have_addr,
	 __unused db_expr_t count,
	 __unused char *modif)
{

	uint32_t        i, mid;
	uint32_t        cpid[4];

	do_cpuid(0, cpid);	/* Get the first cpuid which is the number of
				 * basic ids */
	db_printf("%08X - %08X %08X %08X %08X\n",
		0, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);

	mid = cpid[eax];	/* Set the number */
	for (i = 1; i <= mid; i++) {	/* Dump 'em out */
		do_cpuid(i, cpid);	/* Get the next */
		db_printf("%08X - %08X %08X %08X %08X\n",
			i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	}
	db_printf("\n");

	do_cpuid(0x80000000, cpid);	/* Get the first extended cpuid which
					 * is the number of extended ids */
	db_printf("%08X - %08X %08X %08X %08X\n",
		0x80000000, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);

	mid = cpid[eax];	/* Set the number */
	for (i = 0x80000001; i <= mid; i++) {	/* Dump 'em out */
		do_cpuid(i, cpid);	/* Get the next */
		db_printf("%08X - %08X %08X %08X %08X\n",
			i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	}
}

#endif
Commit	Line	Data
1c79356b	1	/*
2d21ac55	2	* Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
0c530ab8 A	31	#include <platforms.h>
0c530ab8 A	32	#include <mach_kdb.h>
2d21ac55	33	#include <vm/vm_page.h>
91447636 A	34	#include <pexpert/pexpert.h>
91447636 A	35
55e303ae	36	#include "cpuid.h"
0c530ab8 A	37	#if MACH_KDB
	38	#include <i386/db_machdep.h>
	39	#include <ddb/db_aout.h>
	40	#include <ddb/db_access.h>
	41	#include <ddb/db_sym.h>
	42	#include <ddb/db_variables.h>
	43	#include <ddb/db_command.h>
	44	#include <ddb/db_output.h>
	45	#include <ddb/db_expr.h>
	46	#endif
1c79356b	47
55e303ae	48	#define min(a,b) ((a) < (b) ? (a) : (b))
0c530ab8 A	49	#define quad(hi,lo) (((uint64_t)(hi)) << 32 \| (lo))
	50
	51	#define bit(n) (1UL << (n))
	52	#define bitmask(h,l) ((bit(h)\|(bit(h)-1)) & ~(bit(l)-1))
	53	#define bitfield(x,h,l) (((x) & bitmask(h,l)) >> l)
1c79356b A	54
1c79356b A	55	/*
55e303ae	56	* CPU identification routines.
1c79356b	57	*/
1c79356b	58
0c530ab8	59	static i386_cpu_info_t *cpuid_cpu_infop = NULL;
55e303ae	60	static i386_cpu_info_t cpuid_cpu_info;
d7e50217	61
2d21ac55 A	62	/* this function is Intel-specific */
	63	static void
	64	cpuid_set_cache_info( i386_cpu_info_t * info_p )
91447636 A	65	{
91447636 A	66	uint32_t cpuid_result[4];
2d21ac55 A	67	uint32_t reg[4];
	68	uint32_t index;
	69	uint32_t linesizes[LCACHE_MAX];
91447636 A	70	unsigned int i;
91447636 A	71	unsigned int j;
2d21ac55	72	boolean_t cpuid_deterministic_supported = FALSE;
55e303ae	73
2d21ac55 A	74	bzero( linesizes, sizeof(linesizes) );
	75
	76	/* Get processor cache descriptor info using leaf 2. We don't use
	77	* this internally, but must publish it for KEXTs.
	78	*/
55e303ae A	79	do_cpuid(2, cpuid_result);
	80	for (j = 0; j < 4; j++) {
	81	if ((cpuid_result[j] >> 31) == 1) /* bit31 is validity */
	82	continue;
	83	((uint32_t *) info_p->cache_info)[j] = cpuid_result[j];
	84	}
	85	/* first byte gives number of cpuid calls to get all descriptors */
	86	for (i = 1; i < info_p->cache_info[0]; i++) {
	87	if (i*16 > sizeof(info_p->cache_info))
	88	break;
	89	do_cpuid(2, cpuid_result);
	90	for (j = 0; j < 4; j++) {
	91	if ((cpuid_result[j] >> 31) == 1)
	92	continue;
	93	((uint32_t ) info_p->cache_info)[4i+j] =
	94	cpuid_result[j];
	95	}
	96	}
	97
0c530ab8	98	/*
2d21ac55 A	99	* Get cache info using leaf 4, the "deterministic cache parameters."
	100	* Most processors Mac OS X supports implement this flavor of CPUID.
	101	* Loop over each cache on the processor.
0c530ab8 A	102	*/
0c530ab8 A	103	do_cpuid(0, cpuid_result);
2d21ac55 A	104	if (cpuid_result[eax] >= 4)
	105	cpuid_deterministic_supported = TRUE;
	106
	107	for (index = 0; cpuid_deterministic_supported; index++) {
	108	cache_type_t type = Lnone;
	109	uint32_t cache_type;
	110	uint32_t cache_level;
	111	uint32_t cache_sharing;
	112	uint32_t cache_linesize;
	113	uint32_t cache_sets;
	114	uint32_t cache_associativity;
	115	uint32_t cache_size;
	116	uint32_t cache_partitions;
	117	uint32_t colors;
	118
	119	reg[eax] = 4; /* cpuid request 4 */
	120	reg[ecx] = index; /* index starting at 0 */
	121	cpuid(reg);
0c530ab8	122	//kprintf("cpuid(4) index=%d eax=%p\n", index, reg[eax]);
2d21ac55 A	123	cache_type = bitfield(reg[eax], 4, 0);
	124	if (cache_type == 0)
	125	break; /* no more caches */
	126	cache_level = bitfield(reg[eax], 7, 5);
	127	cache_sharing = bitfield(reg[eax], 25, 14) + 1;
	128	info_p->cpuid_cores_per_package
	129	= bitfield(reg[eax], 31, 26) + 1;
	130	cache_linesize = bitfield(reg[ebx], 11, 0) + 1;
	131	cache_partitions = bitfield(reg[ebx], 21, 12) + 1;
	132	cache_associativity = bitfield(reg[ebx], 31, 22) + 1;
	133	cache_sets = bitfield(reg[ecx], 31, 0) + 1;
	134
	135	/* Map type/levels returned by CPUID into cache_type_t */
	136	switch (cache_level) {
	137	case 1:
	138	type = cache_type == 1 ? L1D :
	139	cache_type == 2 ? L1I :
	140	Lnone;
	141	break;
	142	case 2:
	143	type = cache_type == 3 ? L2U :
	144	Lnone;
	145	break;
	146	case 3:
	147	type = cache_type == 3 ? L3U :
	148	Lnone;
	149	break;
	150	default:
	151	type = Lnone;
	152	}
	153
	154	/* The total size of a cache is:
	155	* ( linesize * sets * associativity )
	156	*/
	157	if (type != Lnone) {
	158	cache_size = cache_linesize * cache_sets * cache_associativity;
	159	info_p->cache_size[type] = cache_size;
	160	info_p->cache_sharing[type] = cache_sharing;
	161	info_p->cache_partitions[type] = cache_partitions;
	162	linesizes[type] = cache_linesize;
	163
	164	/* Compute the number of page colors for this cache,
	165	* which is:
	166	* ( linesize * sets ) / page_size
	167	*
	168	* To help visualize this, consider two views of a
	169	* physical address. To the cache, it is composed
	170	* of a line offset, a set selector, and a tag.
	171	* To VM, it is composed of a page offset, a page
	172	* color, and other bits in the pageframe number:
	173	*
	174	* +-----------------+---------+--------+
	175	* cache: \| tag \| set \| offset \|
	176	* +-----------------+---------+--------+
	177	*
	178	* +-----------------+-------+----------+
	179	* VM: \| don't care \| color \| pg offset\|
	180	* +-----------------+-------+----------+
	181	*
	182	* The color is those bits in (set+offset) not covered
	183	* by the page offset.
	184	*/
	185	colors = ( cache_linesize * cache_sets ) >> 12;
	186
187	if ( colors > vm_cache_geometry_colors )
188	vm_cache_geometry_colors = colors;
189	}
190	}
191
192	/*
193	* If deterministic cache parameters are not available, use
194	* something else
195	*/
196	if (info_p->cpuid_cores_per_package == 0) {
197	info_p->cpuid_cores_per_package = 1;
91447636	198
2d21ac55 A	199	/* cpuid define in 1024 quantities */
	200	info_p->cache_size[L2U] = info_p->cpuid_cache_size * 1024;
	201	info_p->cache_sharing[L2U] = 1;
	202	info_p->cache_partitions[L2U] = 1;
91447636	203
2d21ac55 A	204	linesizes[L2U] = info_p->cpuid_cache_linesize;
	205	}
	206
	207	/*
	208	* What linesize to publish? We use the L2 linesize if any,
	209	* else the L1D.
	210	*/
	211	if ( linesizes[L2U] )
	212	info_p->cache_linesize = linesizes[L2U];
	213	else if (linesizes[L1D])
	214	info_p->cache_linesize = linesizes[L1D];
	215	else panic("no linesize");
91447636 A	216	}
	217
	218	static void
2d21ac55	219	cpuid_set_generic_info(i386_cpu_info_t *info_p)
91447636	220	{
2d21ac55	221	uint32_t cpuid_reg[4];
91447636 A	222	uint32_t max_extid;
	223	char str[128], *p;
	224
2d21ac55 A	225	/* do cpuid 0 to get vendor */
	226	do_cpuid(0, cpuid_reg);
	227	bcopy((char )&cpuid_reg[ebx], &info_p->cpuid_vendor[0], 4); / ug */
	228	bcopy((char *)&cpuid_reg[ecx], &info_p->cpuid_vendor[8], 4);
	229	bcopy((char *)&cpuid_reg[edx], &info_p->cpuid_vendor[4], 4);
	230	info_p->cpuid_vendor[12] = 0;
	231
91447636	232	/* get extended cpuid results */
2d21ac55 A	233	do_cpuid(0x80000000, cpuid_reg);
2d21ac55 A	234	max_extid = cpuid_reg[eax];
91447636 A	235
	236	/* check to see if we can get brand string */
	237	if (max_extid >= 0x80000004) {
	238	/*
	239	* The brand string 48 bytes (max), guaranteed to
	240	* be NUL terminated.
	241	*/
2d21ac55 A	242	do_cpuid(0x80000002, cpuid_reg);
	243	bcopy((char *)cpuid_reg, &str[0], 16);
	244	do_cpuid(0x80000003, cpuid_reg);
	245	bcopy((char *)cpuid_reg, &str[16], 16);
	246	do_cpuid(0x80000004, cpuid_reg);
	247	bcopy((char *)cpuid_reg, &str[32], 16);
91447636 A	248	for (p = str; *p != '\0'; p++) {
	249	if (*p != ' ') break;
	250	}
2d21ac55 A	251	strlcpy(info_p->cpuid_brand_string,
2d21ac55 A	252	p, sizeof(info_p->cpuid_brand_string));
91447636	253
2d21ac55 A	254	if (!strncmp(info_p->cpuid_brand_string, CPUID_STRING_UNKNOWN,
	255	min(sizeof(info_p->cpuid_brand_string),
	256	strlen(CPUID_STRING_UNKNOWN) + 1))) {
91447636	257	/*
2d21ac55 A	258	* This string means we have a firmware-programmable brand string,
2d21ac55 A	259	* and the firmware couldn't figure out what sort of CPU we have.
91447636 A	260	*/
	261	info_p->cpuid_brand_string[0] = '\0';
	262	}
	263	}
	264
2d21ac55 A	265	/* Get cache and addressing info. */
	266	if (max_extid >= 0x80000006) {
	267	do_cpuid(0x80000006, cpuid_reg);
	268	info_p->cpuid_cache_linesize = bitfield(cpuid_reg[ecx], 7, 0);
	269	info_p->cpuid_cache_L2_associativity =
	270	bitfield(cpuid_reg[ecx],15,12);
	271	info_p->cpuid_cache_size = bitfield(cpuid_reg[ecx],31,16);
	272	do_cpuid(0x80000008, cpuid_reg);
	273	info_p->cpuid_address_bits_physical =
	274	bitfield(cpuid_reg[eax], 7, 0);
	275	info_p->cpuid_address_bits_virtual =
	276	bitfield(cpuid_reg[eax],15, 8);
	277	}
	278
91447636	279	/* get processor signature and decode */
2d21ac55 A	280	do_cpuid(1, cpuid_reg);
	281	info_p->cpuid_signature = cpuid_reg[eax];
	282	info_p->cpuid_stepping = bitfield(cpuid_reg[eax], 3, 0);
	283	info_p->cpuid_model = bitfield(cpuid_reg[eax], 7, 4);
	284	info_p->cpuid_family = bitfield(cpuid_reg[eax], 11, 8);
	285	info_p->cpuid_type = bitfield(cpuid_reg[eax], 13, 12);
	286	info_p->cpuid_extmodel = bitfield(cpuid_reg[eax], 19, 16);
	287	info_p->cpuid_extfamily = bitfield(cpuid_reg[eax], 27, 20);
	288	info_p->cpuid_brand = bitfield(cpuid_reg[ebx], 7, 0);
	289	info_p->cpuid_features = quad(cpuid_reg[ecx], cpuid_reg[edx]);
	290
	291	/* Fold extensions into family/model */
	292	if (info_p->cpuid_family == 0x0f)
	293	info_p->cpuid_family += info_p->cpuid_extfamily;
	294	if (info_p->cpuid_family == 0x0f \|\| info_p->cpuid_family== 0x06)
	295	info_p->cpuid_model += (info_p->cpuid_extmodel << 4);
	296
	297	if (info_p->cpuid_features & CPUID_FEATURE_HTT)
	298	info_p->cpuid_logical_per_package =
	299	bitfield(cpuid_reg[ebx], 23, 16);
	300	else
	301	info_p->cpuid_logical_per_package = 1;
0c530ab8 A	302
0c530ab8 A	303	if (max_extid >= 0x80000001) {
2d21ac55	304	do_cpuid(0x80000001, cpuid_reg);
0c530ab8	305	info_p->cpuid_extfeatures =
2d21ac55 A	306	quad(cpuid_reg[ecx], cpuid_reg[edx]);
	307	}
	308
	309	if (info_p->cpuid_extfeatures && CPUID_FEATURE_MONITOR) {
	310	/*
	311	* Extract the Monitor/Mwait Leaf info:
	312	*/
	313	do_cpuid(5, cpuid_reg);
	314	info_p->cpuid_mwait_linesize_min = cpuid_reg[eax];
	315	info_p->cpuid_mwait_linesize_max = cpuid_reg[ebx];
	316	info_p->cpuid_mwait_extensions = cpuid_reg[ecx];
	317	info_p->cpuid_mwait_sub_Cstates = cpuid_reg[edx];
	318
	319	/*
	320	* And the thermal and Power Leaf while we're at it:
	321	*/
	322	do_cpuid(6, cpuid_reg);
	323	info_p->cpuid_thermal_sensor =
	324	bitfield(cpuid_reg[eax], 0, 0);
	325	info_p->cpuid_thermal_dynamic_acceleration =
	326	bitfield(cpuid_reg[eax], 1, 1);
	327	info_p->cpuid_thermal_thresholds =
	328	bitfield(cpuid_reg[ebx], 3, 0);
	329	info_p->cpuid_thermal_ACNT_MCNT =
	330	bitfield(cpuid_reg[ecx], 0, 0);
	331
	332	/*
	333	* And the Architectural Performance Monitoring Leaf:
	334	*/
	335	do_cpuid(0xa, cpuid_reg);
	336	info_p->cpuid_arch_perf_version =
	337	bitfield(cpuid_reg[eax], 7, 0);
	338	info_p->cpuid_arch_perf_number =
	339	bitfield(cpuid_reg[eax],15, 8);
	340	info_p->cpuid_arch_perf_width =
	341	bitfield(cpuid_reg[eax],23,16);
	342	info_p->cpuid_arch_perf_events_number =
	343	bitfield(cpuid_reg[eax],31,24);
	344	info_p->cpuid_arch_perf_events =
	345	cpuid_reg[ebx];
	346	info_p->cpuid_arch_perf_fixed_number =
	347	bitfield(cpuid_reg[edx], 4, 0);
	348	info_p->cpuid_arch_perf_fixed_width =
	349	bitfield(cpuid_reg[edx],12, 5);
	350
0c530ab8	351	}
55e303ae A	352
	353	return;
	354	}
	355
2d21ac55 A	356	void
2d21ac55 A	357	cpuid_set_info(void)
d7e50217	358	{
2d21ac55 A	359	bzero((void *)&cpuid_cpu_info, sizeof(cpuid_cpu_info));
	360
	361	cpuid_set_generic_info(&cpuid_cpu_info);
55e303ae	362
2d21ac55 A	363	/* verify we are running on a supported CPU */
	364	if ((strncmp(CPUID_VID_INTEL, cpuid_cpu_info.cpuid_vendor,
	365	min(strlen(CPUID_STRING_UNKNOWN) + 1,
	366	sizeof(cpuid_cpu_info.cpuid_vendor)))) \|\|
	367	(cpuid_cpu_info.cpuid_family != 6) \|\|
	368	(cpuid_cpu_info.cpuid_model < 13))
	369	panic("Unsupported CPU");
	370
	371	cpuid_cpu_info.cpuid_cpu_type = CPU_TYPE_X86;
	372	cpuid_cpu_info.cpuid_cpu_subtype = CPU_SUBTYPE_X86_ARCH1;
	373
	374	cpuid_set_cache_info(&cpuid_cpu_info);
	375
	376	cpuid_cpu_info.cpuid_model_string = ""; /* deprecated */
	377	}
55e303ae A	378
55e303ae A	379	static struct {
0c530ab8	380	uint64_t mask;
91447636	381	const char *name;
0c530ab8	382	} feature_map[] = {
55e303ae A	383	{CPUID_FEATURE_FPU, "FPU",},
	384	{CPUID_FEATURE_VME, "VME",},
	385	{CPUID_FEATURE_DE, "DE",},
	386	{CPUID_FEATURE_PSE, "PSE",},
	387	{CPUID_FEATURE_TSC, "TSC",},
	388	{CPUID_FEATURE_MSR, "MSR",},
	389	{CPUID_FEATURE_PAE, "PAE",},
	390	{CPUID_FEATURE_MCE, "MCE",},
	391	{CPUID_FEATURE_CX8, "CX8",},
	392	{CPUID_FEATURE_APIC, "APIC",},
	393	{CPUID_FEATURE_SEP, "SEP",},
	394	{CPUID_FEATURE_MTRR, "MTRR",},
	395	{CPUID_FEATURE_PGE, "PGE",},
	396	{CPUID_FEATURE_MCA, "MCA",},
	397	{CPUID_FEATURE_CMOV, "CMOV",},
	398	{CPUID_FEATURE_PAT, "PAT",},
	399	{CPUID_FEATURE_PSE36, "PSE36",},
	400	{CPUID_FEATURE_PSN, "PSN",},
	401	{CPUID_FEATURE_CLFSH, "CLFSH",},
	402	{CPUID_FEATURE_DS, "DS",},
	403	{CPUID_FEATURE_ACPI, "ACPI",},
	404	{CPUID_FEATURE_MMX, "MMX",},
	405	{CPUID_FEATURE_FXSR, "FXSR",},
	406	{CPUID_FEATURE_SSE, "SSE",},
	407	{CPUID_FEATURE_SSE2, "SSE2",},
	408	{CPUID_FEATURE_SS, "SS",},
	409	{CPUID_FEATURE_HTT, "HTT",},
	410	{CPUID_FEATURE_TM, "TM",},
0c530ab8 A	411	{CPUID_FEATURE_SSE3, "SSE3"},
	412	{CPUID_FEATURE_MONITOR, "MON"},
	413	{CPUID_FEATURE_DSCPL, "DSCPL"},
	414	{CPUID_FEATURE_VMX, "VMX"},
	415	{CPUID_FEATURE_SMX, "SMX"},
	416	{CPUID_FEATURE_EST, "EST"},
	417	{CPUID_FEATURE_TM2, "TM2"},
2d21ac55	418	{CPUID_FEATURE_SSSE3, "SSSE3"},
0c530ab8 A	419	{CPUID_FEATURE_CID, "CID"},
	420	{CPUID_FEATURE_CX16, "CX16"},
	421	{CPUID_FEATURE_xTPR, "TPR"},
	422	{CPUID_FEATURE_PDCM, "PDCM"},
0c530ab8 A	423	{CPUID_FEATURE_SSE4_1, "SSE4.1"},
	424	{CPUID_FEATURE_SSE4_2, "SSE4.2"},
	425	{CPUID_FEATURE_POPCNT, "POPCNT"},
	426	{0, 0}
	427	},
	428	extfeature_map[] = {
	429	{CPUID_EXTFEATURE_SYSCALL, "SYSCALL"},
	430	{CPUID_EXTFEATURE_XD, "XD"},
	431	{CPUID_EXTFEATURE_EM64T, "EM64T"},
	432	{CPUID_EXTFEATURE_LAHF, "LAHF"},
55e303ae A	433	{0, 0}
	434	};
	435
0c530ab8 A	436	i386_cpu_info_t *
	437	cpuid_info(void)
	438	{
	439	/* Set-up the cpuid_indo stucture lazily */
	440	if (cpuid_cpu_infop == NULL) {
2d21ac55	441	cpuid_set_info();
0c530ab8 A	442	cpuid_cpu_infop = &cpuid_cpu_info;
	443	}
	444	return cpuid_cpu_infop;
	445	}
	446
55e303ae	447	char *
0c530ab8	448	cpuid_get_feature_names(uint64_t features, char *buf, unsigned buf_len)
55e303ae	449	{
0c530ab8 A	450	int len = -1;
0c530ab8 A	451	char *p = buf;
55e303ae	452	int i;
0c530ab8 A	453
	454	for (i = 0; feature_map[i].mask != 0; i++) {
	455	if ((features & feature_map[i].mask) == 0)
	456	continue;
	457	if (len > 0)
	458	*p++ = ' ';
	459	len = min(strlen(feature_map[i].name), (buf_len-1) - (p-buf));
	460	if (len == 0)
	461	break;
	462	bcopy(feature_map[i].name, p, len);
	463	p += len;
	464	}
	465	*p = '\0';
	466	return buf;
	467	}
	468
	469	char *
	470	cpuid_get_extfeature_names(uint64_t extfeatures, char *buf, unsigned buf_len)
	471	{
	472	int len = -1;
55e303ae	473	char *p = buf;
0c530ab8	474	int i;
55e303ae	475
0c530ab8 A	476	for (i = 0; extfeature_map[i].mask != 0; i++) {
0c530ab8 A	477	if ((extfeatures & extfeature_map[i].mask) == 0)
55e303ae	478	continue;
0c530ab8	479	if (len > 0)
55e303ae	480	*p++ = ' ';
0c530ab8	481	len = min(strlen(extfeature_map[i].name), (buf_len-1)-(p-buf));
55e303ae A	482	if (len == 0)
55e303ae A	483	break;
0c530ab8	484	bcopy(extfeature_map[i].name, p, len);
55e303ae A	485	p += len;
	486	}
	487	*p = '\0';
	488	return buf;
	489	}
	490
2d21ac55 A	491
	492	#if CONFIG_NO_KPRINTF_STRINGS
	493	void
	494	cpuid_feature_display(
	495	__unused const char *header)
	496	{
	497	}
	498
	499	void
	500	cpuid_extfeature_display(
	501	__unused const char *header)
	502	{
	503	}
	504
	505	void
	506	cpuid_cpu_display(
	507	__unused const char *header)
	508	{
	509	}
	510	#else /* CONFIG_NO_KPRINTF_STRINGS */
55e303ae A	511	void
55e303ae A	512	cpuid_feature_display(
0c530ab8 A	513	const char *header)
	514	{
	515	char buf[256];
	516
	517	kprintf("%s: %s\n", header,
	518	cpuid_get_feature_names(cpuid_features(),
	519	buf, sizeof(buf)));
	520	if (cpuid_features() & CPUID_FEATURE_HTT) {
	521	#define s_if_plural(n) ((n > 1) ? "s" : "")
	522	kprintf(" HTT: %d core%s per package;"
	523	" %d logical cpu%s per package\n",
	524	cpuid_cpu_info.cpuid_cores_per_package,
	525	s_if_plural(cpuid_cpu_info.cpuid_cores_per_package),
	526	cpuid_cpu_info.cpuid_logical_per_package,
	527	s_if_plural(cpuid_cpu_info.cpuid_logical_per_package));
	528	}
	529	}
	530
	531	void
	532	cpuid_extfeature_display(
	533	const char *header)
c0fea474 A	534	{
	535	char buf[256];
	536
0c530ab8 A	537	kprintf("%s: %s\n", header,
	538	cpuid_get_extfeature_names(cpuid_extfeatures(),
	539	buf, sizeof(buf)));
1c79356b A	540	}
1c79356b A	541
1c79356b A	542	void
1c79356b A	543	cpuid_cpu_display(
0c530ab8	544	const char *header)
d7e50217	545	{
2d21ac55	546	if (cpuid_cpu_info.cpuid_brand_string[0] != '\0') {
0c530ab8	547	kprintf("%s: %s\n", header, cpuid_cpu_info.cpuid_brand_string);
91447636	548	}
d7e50217	549	}
2d21ac55	550	#endif /* !CONFIG_NO_KPRINTF_STRINGS */
d7e50217	551
55e303ae A	552	unsigned int
	553	cpuid_family(void)
	554	{
0c530ab8	555	return cpuid_info()->cpuid_family;
4452a7af A	556	}
4452a7af A	557
0c530ab8 A	558	cpu_type_t
	559	cpuid_cputype(void)
	560	{
	561	return cpuid_info()->cpuid_cpu_type;
	562	}
	563
	564	cpu_subtype_t
	565	cpuid_cpusubtype(void)
	566	{
	567	return cpuid_info()->cpuid_cpu_subtype;
	568	}
	569
	570	uint64_t
55e303ae A	571	cpuid_features(void)
55e303ae A	572	{
91447636 A	573	static int checked = 0;
91447636 A	574	char fpu_arg[16] = { 0 };
0c530ab8 A	575
0c530ab8 A	576	(void) cpuid_info();
91447636 A	577	if (!checked) {
	578	/* check for boot-time fpu limitations */
	579	if (PE_parse_boot_arg("_fpu", &fpu_arg[0])) {
	580	printf("limiting fpu features to: %s\n", fpu_arg);
2d21ac55	581	if (!strncmp("387", fpu_arg, sizeof("387")) \|\| !strncmp("mmx", fpu_arg, sizeof("mmx"))) {
91447636 A	582	printf("no sse or sse2\n");
91447636 A	583	cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE \| CPUID_FEATURE_SSE2 \| CPUID_FEATURE_FXSR);
2d21ac55	584	} else if (!strncmp("sse", fpu_arg, sizeof("sse"))) {
91447636 A	585	printf("no sse2\n");
	586	cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE2);
	587	}
	588	}
	589	checked = 1;
	590	}
55e303ae A	591	return cpuid_cpu_info.cpuid_features;
	592	}
	593
0c530ab8 A	594	uint64_t
0c530ab8 A	595	cpuid_extfeatures(void)
55e303ae	596	{
0c530ab8	597	return cpuid_info()->cpuid_extfeatures;
55e303ae	598	}
0c530ab8	599
55e303ae	600
0c530ab8 A	601	#if MACH_KDB
	602
	603	/*
	604	* Display the cpuid
	605	* *
	606	* cp
	607	*/
	608	void
	609	db_cpuid(__unused db_expr_t addr,
	610	__unused int have_addr,
	611	__unused db_expr_t count,
	612	__unused char *modif)
	613	{
	614
	615	uint32_t i, mid;
	616	uint32_t cpid[4];
	617
	618	do_cpuid(0, cpid); /* Get the first cpuid which is the number of
	619	* basic ids */
	620	db_printf("%08X - %08X %08X %08X %08X\n",
	621	0, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	622
	623	mid = cpid[eax]; /* Set the number */
	624	for (i = 1; i <= mid; i++) { /* Dump 'em out */
	625	do_cpuid(i, cpid); /* Get the next */
	626	db_printf("%08X - %08X %08X %08X %08X\n",
	627	i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	628	}
	629	db_printf("\n");
	630
	631	do_cpuid(0x80000000, cpid); /* Get the first extended cpuid which
	632	* is the number of extended ids */
	633	db_printf("%08X - %08X %08X %08X %08X\n",
	634	0x80000000, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	635
	636	mid = cpid[eax]; /* Set the number */
	637	for (i = 0x80000001; i <= mid; i++) { /* Dump 'em out */
	638	do_cpuid(i, cpid); /* Get the next */
	639	db_printf("%08X - %08X %08X %08X %08X\n",
	640	i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
	641	}
	642	}
	643
	644	#endif