projects / apple / xnu.git / blame
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|---|---|---|
| 5ba3f43e A |
1 | /* |
| 2 | * Copyright (c) 2017 Apple Inc. All rights reserved. | |
| 3 | * | |
| 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
| 5 | * | |
| 6 | * This file contains Original Code and/or Modifications of Original Code | |
| 7 | * as defined in and that are subject to the Apple Public Source License | |
| 8 | * Version 2.0 (the 'License'). You may not use this file except in | |
| 9 | * compliance with the License. The rights granted to you under the License | |
| 10 | * may not be used to create, or enable the creation or redistribution of, | |
| 11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
| 12 | * circumvent, violate, or enable the circumvention or violation of, any | |
| 13 | * terms of an Apple operating system software license agreement. | |
| 14 | * | |
| 15 | * Please obtain a copy of the License at | |
| 16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
| 17 | * | |
| 18 | * The Original Code and all software distributed under the License are | |
| 19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
| 20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
| 21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
| 22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
| 23 | * Please see the License for the specific language governing rights and | |
| 24 | * limitations under the License. | |
| 25 | * | |
| 26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
| 27 | */ | |
| 28 | #ifndef _ARM_MACHINE_CPUID_H_ | |
| 29 | #define _ARM_MACHINE_CPUID_H_ | |
| 30 | ||
| 31 | /* CPU feature identification */ | |
| 32 | ||
| 33 | typedef struct { | |
| 0a7de745 A |
34 | uint32_t arm_32bit_isa : 4, |
| 35 | arm_thumb_ver : 4, | |
| 36 | arm_jazelle : 4, | |
| 37 | arm_thumb2 : 4, | |
| 38 | reserved : 16; | |
| 5ba3f43e A |
39 | } arm_feature_bits_t; |
| 40 | ||
| 41 | typedef union { | |
| 0a7de745 A |
42 | arm_feature_bits_t field; |
| 43 | uint32_t value; | |
| 5ba3f43e A |
44 | } arm_feature0_reg_t; |
| 45 | ||
| 46 | // Register 0, subtype 21: Instruction Set Features #1 | |
| 0a7de745 A |
47 | typedef struct{ |
| 48 | uint32_t endianness_support : 4; | |
| 49 | uint32_t exception_1_support : 4; | |
| 50 | uint32_t exception_2_support : 4; | |
| 51 | uint32_t sign_zero_ext_support : 4; | |
| 52 | uint32_t if_then_support : 4; | |
| 53 | uint32_t immediate_support : 4; | |
| 54 | uint32_t interworking_support : 4; | |
| 55 | uint32_t jazelle_support : 4; | |
| 5ba3f43e A |
56 | } |
| 57 | syscp_ID_instructions_feat_1_reg; | |
| 58 | ||
| 59 | typedef union { | |
| 60 | uint32_t value; | |
| 61 | syscp_ID_instructions_feat_1_reg field; | |
| 62 | } arm_isa_feat1_reg; | |
| 63 | ||
| 64 | arm_isa_feat1_reg machine_read_isa_feat1(void); | |
| 65 | ||
| 66 | /* Debug identification */ | |
| 67 | ||
| 68 | /* ID_DFR0 */ | |
| 69 | typedef union { | |
| 70 | struct { | |
| 0a7de745 A |
71 | uint32_t coprocessor_core_debug : 4, |
| 72 | coprocessor_secure_debug : 4, | |
| 73 | memory_mapped_core_debug : 4, | |
| 74 | coprocessor_trace_debug : 4, | |
| 75 | memory_mapped_trace_debug : 4, | |
| 76 | microcontroller_debug : 4; | |
| 5ba3f43e A |
77 | } debug_feature; |
| 78 | uint32_t value; | |
| 79 | } arm_cpuid_id_dfr0; | |
| 80 | ||
| 81 | /* DBGDIDR */ | |
| 82 | typedef union { | |
| 83 | struct { | |
| 0a7de745 A |
84 | uint32_t revision : 4, |
| 85 | variant : 4, | |
| 86 | : 4, | |
| 87 | se_imp : 1, | |
| 88 | pcsr_imp : 1, | |
| 89 | nsuhd_imp : 1, | |
| 90 | : 1, | |
| 91 | version : 4, | |
| 92 | ctx_cmps : 4, | |
| 93 | brps : 4, | |
| 94 | wrps : 4; | |
| 5ba3f43e A |
95 | } debug_id; |
| 96 | uint32_t value; | |
| 97 | } arm_debug_dbgdidr; | |
| 98 | ||
| 99 | typedef struct { | |
| 0a7de745 A |
100 | boolean_t memory_mapped_core_debug; |
| 101 | boolean_t coprocessor_core_debug; | |
| 102 | uint32_t num_watchpoint_pairs; | |
| 103 | uint32_t num_breakpoint_pairs; | |
| 5ba3f43e A |
104 | } arm_debug_info_t; |
| 105 | ||
| 106 | #endif /* _ARM_MACHINE_CPUID_H_ */ |