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91447636 A |
1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
8f6c56a5 | 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
91447636 | 5 | * |
8f6c56a5 A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
8ad349bb | 24 | * limitations under the License. |
8f6c56a5 A |
25 | * |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
91447636 A |
27 | */ |
28 | ||
29 | #include <i386/misc_protos.h> | |
30 | #include <i386/proc_reg.h> | |
31 | #include <i386/pmap.h> | |
32 | #include <i386/mtrr.h> | |
33 | #include <i386/acpi.h> | |
34 | #include <i386/mp.h> | |
35 | ||
36 | #include <kern/cpu_data.h> | |
3a60a9f5 A |
37 | |
38 | #include <IOKit/IOHibernatePrivate.h> | |
91447636 A |
39 | #include <IOKit/IOPlatformExpert.h> |
40 | ||
41 | extern void acpi_sleep_cpu(acpi_sleep_callback, void * refcon); | |
42 | extern char acpi_wake_start[]; | |
43 | extern char acpi_wake_end[]; | |
44 | ||
45 | extern int serial_init(void); | |
46 | extern unsigned int disableSerialOuput; | |
47 | ||
48 | extern void set_kbd_leds(int leds); | |
49 | ||
50 | vm_offset_t | |
51 | acpi_install_wake_handler(void) | |
52 | { | |
53 | /* copy wake code to ACPI_WAKE_ADDR in low memory */ | |
21362eb3 | 54 | bcopy_phys((addr64_t) kvtophys((vm_offset_t)acpi_wake_start), |
91447636 A |
55 | (addr64_t) ACPI_WAKE_ADDR, |
56 | acpi_wake_end - acpi_wake_start); | |
57 | ||
58 | /* flush cache */ | |
59 | wbinvd(); | |
60 | ||
61 | /* return physical address of the wakeup code */ | |
62 | return ACPI_WAKE_ADDR; | |
63 | } | |
64 | ||
3a60a9f5 | 65 | typedef struct acpi_hibernate_callback_data { |
91447636 A |
66 | acpi_sleep_callback func; |
67 | void *refcon; | |
3a60a9f5 | 68 | } acpi_hibernate_callback_data; |
91447636 A |
69 | |
70 | static void | |
3a60a9f5 | 71 | acpi_hibernate(void *refcon) |
91447636 | 72 | { |
21362eb3 | 73 | boolean_t hib; |
3a60a9f5 A |
74 | |
75 | acpi_hibernate_callback_data *data = (acpi_hibernate_callback_data *)refcon; | |
91447636 | 76 | |
3a60a9f5 | 77 | if (current_cpu_datap()->cpu_hibernate) { |
21362eb3 | 78 | hib = hibernate_write_image(); |
3a60a9f5 | 79 | } |
91447636 A |
80 | |
81 | (data->func)(data->refcon); | |
82 | ||
83 | /* should never get here! */ | |
84 | } | |
85 | ||
86 | void | |
87 | acpi_sleep_kernel(acpi_sleep_callback func, void *refcon) | |
88 | { | |
3a60a9f5 A |
89 | acpi_hibernate_callback_data data; |
90 | boolean_t did_hibernate; | |
91447636 | 91 | |
21362eb3 A |
92 | /* shutdown local APIC before passing control to BIOS */ |
93 | lapic_shutdown(); | |
91447636 A |
94 | |
95 | data.func = func; | |
96 | data.refcon = refcon; | |
97 | ||
21362eb3 A |
98 | /* |
99 | * Save master CPU state and sleep platform. | |
100 | * Will not return until platform is woken up, | |
101 | * or if sleep failed. | |
102 | */ | |
3a60a9f5 | 103 | acpi_sleep_cpu(acpi_hibernate, &data); |
91447636 | 104 | |
21362eb3 A |
105 | /* reset UART if kprintf is enabled */ |
106 | if (FALSE == disableSerialOuput) | |
107 | serial_init(); | |
91447636 | 108 | |
3a60a9f5 | 109 | if (current_cpu_datap()->cpu_hibernate) { |
21362eb3 A |
110 | * (int *) CM1 = 0; |
111 | * (int *) CM2 = 0; | |
112 | * (int *) CM3 = 0; | |
3a60a9f5 | 113 | |
21362eb3 | 114 | current_cpu_datap()->cpu_hibernate = 0; |
3a60a9f5 | 115 | |
21362eb3 | 116 | did_hibernate = TRUE; |
3a60a9f5 | 117 | } else { |
21362eb3 | 118 | did_hibernate = FALSE; |
3a60a9f5 | 119 | } |
91447636 | 120 | |
21362eb3 A |
121 | /* restore MTRR settings */ |
122 | mtrr_update_cpu(); | |
91447636 | 123 | |
21362eb3 A |
124 | /* set up PAT following boot processor power up */ |
125 | pat_init(); | |
91447636 | 126 | |
3a60a9f5 A |
127 | if (did_hibernate) { |
128 | hibernate_machine_init(); | |
129 | } | |
130 | ||
21362eb3 A |
131 | /* re-enable and re-init local apic */ |
132 | if (lapic_probe()) | |
133 | lapic_init(); | |
91447636 | 134 | |
21362eb3 A |
135 | /* let the realtime clock reset */ |
136 | rtc_sleep_wakeup(); | |
91447636 | 137 | |
3a60a9f5 A |
138 | if (did_hibernate) { |
139 | enable_preemption(); | |
140 | } | |
91447636 | 141 | } |