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6d2010ae 1/*
39236c6e 2 * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
6d2010ae
A
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56
57#include <mach_rt.h>
58#include <mach_debug.h>
59#include <mach_ldebug.h>
60
61#include <sys/kdebug.h>
62
63#include <mach/kern_return.h>
64#include <mach/thread_status.h>
65#include <mach/vm_param.h>
66
67#include <kern/counters.h>
68#include <kern/kalloc.h>
69#include <kern/mach_param.h>
70#include <kern/processor.h>
71#include <kern/cpu_data.h>
72#include <kern/cpu_number.h>
73#include <kern/task.h>
74#include <kern/thread.h>
75#include <kern/sched_prim.h>
76#include <kern/misc_protos.h>
77#include <kern/assert.h>
78#include <kern/spl.h>
79#include <kern/machine.h>
80#include <ipc/ipc_port.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_map.h>
83#include <vm/pmap.h>
84#include <vm/vm_protos.h>
85
86#include <i386/commpage/commpage.h>
87#include <i386/cpu_data.h>
88#include <i386/cpu_number.h>
89#include <i386/eflags.h>
90#include <i386/proc_reg.h>
91#include <i386/tss.h>
92#include <i386/user_ldt.h>
93#include <i386/fpu.h>
94#include <i386/mp_desc.h>
95#include <i386/misc_protos.h>
96#include <i386/thread.h>
6d2010ae
A
97#include <i386/seg.h>
98#include <i386/machine_routines.h>
99
100#define ASSERT_IS_16BYTE_MULTIPLE_SIZEOF(_type_) \
101extern char assert_is_16byte_multiple_sizeof_ ## _type_ \
102 [(sizeof(_type_) % 16) == 0 ? 1 : -1]
103
104/* Compile-time checks for vital save area sizing: */
105ASSERT_IS_16BYTE_MULTIPLE_SIZEOF(x86_64_intr_stack_frame_t);
6d2010ae
A
106ASSERT_IS_16BYTE_MULTIPLE_SIZEOF(x86_saved_state_t);
107
108#define DIRECTION_FLAG_DEBUG (DEBUG | DEVELOPMENT)
109
110extern zone_t iss_zone; /* zone for saved_state area */
111extern zone_t ids_zone; /* zone for debug_state area */
112
113extern void *get_bsduthreadarg(thread_t);
114void
115act_machine_switch_pcb(__unused thread_t old, thread_t new)
116{
117 pcb_t pcb = THREAD_TO_PCB(new);
118 cpu_data_t *cdp = current_cpu_datap();
119 struct real_descriptor *ldtp;
120 mach_vm_offset_t pcb_stack_top;
121
122 assert(new->kernel_stack != 0);
123 assert(ml_get_interrupts_enabled() == FALSE);
124#ifdef DIRECTION_FLAG_DEBUG
125 if (x86_get_flags() & EFL_DF) {
126 panic("Direction flag detected: 0x%lx", x86_get_flags());
127 }
128#endif
129
6d2010ae
A
130 /*
131 * Clear segment state
132 * unconditionally for DS/ES/FS but more carefully for GS whose
133 * cached state we track.
134 */
135 set_ds(NULL_SEG);
136 set_es(NULL_SEG);
137 set_fs(NULL_SEG);
138 if (get_gs() != NULL_SEG) {
139 swapgs(); /* switch to user's GS context */
140 set_gs(NULL_SEG);
141 swapgs(); /* and back to kernel */
142
143 /* record the active machine state lost */
144 cdp->cpu_uber.cu_user_gs_base = 0;
145 }
146
39236c6e 147 vm_offset_t isf;
6d2010ae 148
39236c6e
A
149 /*
150 * Set pointer to PCB's interrupt stack frame in cpu data.
151 * Used by syscall and double-fault trap handlers.
152 */
153 isf = (vm_offset_t) &pcb->iss->ss_64.isf;
154 cdp->cpu_uber.cu_isf = isf;
155 pcb_stack_top = (vm_offset_t) (pcb->iss + 1);
156 /* require 16-byte alignment */
157 assert((pcb_stack_top & 0xF) == 0);
6d2010ae 158
39236c6e
A
159 /* Interrupt stack is pcb */
160 current_ktss64()->rsp0 = pcb_stack_top;
6d2010ae 161
39236c6e
A
162 /*
163 * Top of temporary sysenter stack points to pcb stack.
164 * Although this is not normally used by 64-bit users,
165 * it needs to be set in case a sysenter is attempted.
166 */
167 *current_sstk64() = pcb_stack_top;
168
169 if (is_saved_state64(pcb->iss)) {
6d2010ae
A
170
171 cdp->cpu_task_map = new->map->pmap->pm_task_map;
172
173 /*
174 * Enable the 64-bit user code segment, USER64_CS.
175 * Disable the 32-bit user code segment, USER_CS.
176 */
177 ldt_desc_p(USER64_CS)->access |= ACC_PL_U;
178 ldt_desc_p(USER_CS)->access &= ~ACC_PL_U;
179
180 /*
181 * Switch user's GS base if necessary
182 * by setting the Kernel's GS base MSR
183 * - this will become the user's on the swapgs when
184 * returning to user-space. Avoid this for
185 * kernel threads (no user TLS support required)
186 * and verify the memory shadow of the segment base
187 * in the event it was altered in user space.
188 */
189 if ((pcb->cthread_self != 0) || (new->task != kernel_task)) {
190 if ((cdp->cpu_uber.cu_user_gs_base != pcb->cthread_self) || (pcb->cthread_self != rdmsr64(MSR_IA32_KERNEL_GS_BASE))) {
191 cdp->cpu_uber.cu_user_gs_base = pcb->cthread_self;
192 wrmsr64(MSR_IA32_KERNEL_GS_BASE, pcb->cthread_self);
193 }
194 }
6d2010ae 195
39236c6e 196 } else {
6d2010ae
A
197
198 cdp->cpu_task_map = TASK_MAP_32BIT;
6d2010ae
A
199
200 /*
201 * Disable USER64_CS
202 * Enable USER_CS
203 */
204 ldt_desc_p(USER64_CS)->access &= ~ACC_PL_U;
205 ldt_desc_p(USER_CS)->access |= ACC_PL_U;
206
207 /*
208 * Set the thread`s cthread (a.k.a pthread)
209 * For 32-bit user this involves setting the USER_CTHREAD
210 * descriptor in the LDT to point to the cthread data.
211 * The involves copying in the pre-initialized descriptor.
212 */
213 ldtp = (struct real_descriptor *)current_ldt();
214 ldtp[sel_idx(USER_CTHREAD)] = pcb->cthread_desc;
215 if (pcb->uldt_selector != 0)
216 ldtp[sel_idx(pcb->uldt_selector)] = pcb->uldt_desc;
217 cdp->cpu_uber.cu_user_gs_base = pcb->cthread_self;
218
219 /*
220 * Set the thread`s LDT or LDT entry.
221 */
222 if (new->task == TASK_NULL || new->task->i386_ldt == 0) {
223 /*
224 * Use system LDT.
225 */
226 ml_cpu_set_ldt(KERNEL_LDT);
227 } else {
228 /*
229 * Task has its own LDT.
230 */
231 user_ldt_set(new);
232 }
233 }
234
6d2010ae
A
235 /*
236 * Bump the scheduler generation count in the commpage.
237 * This can be read by user code to detect its preemption.
238 */
239 commpage_sched_gen_inc();
240}
39236c6e
A
241
242kern_return_t
6d2010ae
A
243thread_set_wq_state32(thread_t thread, thread_state_t tstate)
244{
245 x86_thread_state32_t *state;
246 x86_saved_state32_t *saved_state;
247 thread_t curth = current_thread();
248 spl_t s=0;
249
250 pal_register_cache_state(thread, DIRTY);
251
252 saved_state = USER_REGS32(thread);
253
254 state = (x86_thread_state32_t *)tstate;
255
256 if (curth != thread) {
257 s = splsched();
258 thread_lock(thread);
259 }
260
261 saved_state->ebp = 0;
262 saved_state->eip = state->eip;
263 saved_state->eax = state->eax;
264 saved_state->ebx = state->ebx;
265 saved_state->ecx = state->ecx;
266 saved_state->edx = state->edx;
267 saved_state->edi = state->edi;
268 saved_state->esi = state->esi;
269 saved_state->uesp = state->esp;
270 saved_state->efl = EFL_USER_SET;
271
272 saved_state->cs = USER_CS;
273 saved_state->ss = USER_DS;
274 saved_state->ds = USER_DS;
275 saved_state->es = USER_DS;
276
277 if (curth != thread) {
278 thread_unlock(thread);
279 splx(s);
280 }
39236c6e
A
281
282 return KERN_SUCCESS;
6d2010ae
A
283}
284
285
39236c6e 286kern_return_t
6d2010ae
A
287thread_set_wq_state64(thread_t thread, thread_state_t tstate)
288{
289 x86_thread_state64_t *state;
290 x86_saved_state64_t *saved_state;
291 thread_t curth = current_thread();
292 spl_t s=0;
293
6d2010ae
A
294 saved_state = USER_REGS64(thread);
295 state = (x86_thread_state64_t *)tstate;
296
39236c6e
A
297 /* Disallow setting non-canonical PC or stack */
298 if (!IS_USERADDR64_CANONICAL(state->rsp) ||
299 !IS_USERADDR64_CANONICAL(state->rip)) {
300 return KERN_FAILURE;
301 }
302
303 pal_register_cache_state(thread, DIRTY);
304
6d2010ae
A
305 if (curth != thread) {
306 s = splsched();
307 thread_lock(thread);
308 }
309
310 saved_state->rbp = 0;
311 saved_state->rdi = state->rdi;
312 saved_state->rsi = state->rsi;
313 saved_state->rdx = state->rdx;
314 saved_state->rcx = state->rcx;
315 saved_state->r8 = state->r8;
316 saved_state->r9 = state->r9;
317
318 saved_state->isf.rip = state->rip;
319 saved_state->isf.rsp = state->rsp;
320 saved_state->isf.cs = USER64_CS;
321 saved_state->isf.rflags = EFL_USER_SET;
322
323 if (curth != thread) {
324 thread_unlock(thread);
325 splx(s);
326 }
39236c6e
A
327
328 return KERN_SUCCESS;
6d2010ae
A
329}
330
331/*
332 * Initialize the machine-dependent state for a new thread.
333 */
334kern_return_t
335machine_thread_create(
336 thread_t thread,
337 task_t task)
338{
339 pcb_t pcb = THREAD_TO_PCB(thread);
6d2010ae
A
340
341#if NCOPY_WINDOWS > 0
342 inval_copy_windows(thread);
343
344 thread->machine.physwindow_pte = 0;
345 thread->machine.physwindow_busy = 0;
346#endif
347
348 /*
349 * Allocate save frame only if required.
350 */
39236c6e 351 if (pcb->iss == NULL) {
6d2010ae 352 assert((get_preemption_level() == 0));
39236c6e
A
353 pcb->iss = (x86_saved_state_t *) zalloc(iss_zone);
354 if (pcb->iss == NULL)
6d2010ae
A
355 panic("iss_zone");
356 }
357
39236c6e
A
358 /*
359 * Assure that the synthesized 32-bit state including
360 * the 64-bit interrupt state can be acommodated in the
361 * 64-bit state we allocate for both 32-bit and 64-bit threads.
362 */
363 assert(sizeof(pcb->iss->ss_32) + sizeof(pcb->iss->ss_64.isf) <=
364 sizeof(pcb->iss->ss_64));
6d2010ae 365
39236c6e 366 bzero((char *)pcb->iss, sizeof(x86_saved_state_t));
6d2010ae 367
39236c6e
A
368 if (task_has_64BitAddr(task)) {
369 pcb->iss->flavor = x86_SAVED_STATE64;
6d2010ae 370
39236c6e
A
371 pcb->iss->ss_64.isf.cs = USER64_CS;
372 pcb->iss->ss_64.isf.ss = USER_DS;
373 pcb->iss->ss_64.fs = USER_DS;
374 pcb->iss->ss_64.gs = USER_DS;
375 pcb->iss->ss_64.isf.rflags = EFL_USER_SET;
6d2010ae 376 } else {
39236c6e
A
377 pcb->iss->flavor = x86_SAVED_STATE32;
378
379 pcb->iss->ss_32.cs = USER_CS;
380 pcb->iss->ss_32.ss = USER_DS;
381 pcb->iss->ss_32.ds = USER_DS;
382 pcb->iss->ss_32.es = USER_DS;
383 pcb->iss->ss_32.fs = USER_DS;
384 pcb->iss->ss_32.gs = USER_DS;
385 pcb->iss->ss_32.efl = EFL_USER_SET;
6d2010ae 386 }
6d2010ae
A
387
388 simple_lock_init(&pcb->lock, 0);
389
6d2010ae
A
390 pcb->cthread_self = 0;
391 pcb->uldt_selector = 0;
392
393 /* Ensure that the "cthread" descriptor describes a valid
394 * segment.
395 */
396 if ((pcb->cthread_desc.access & ACC_P) == 0) {
397 struct real_descriptor *ldtp;
398 ldtp = (struct real_descriptor *)current_ldt();
399 pcb->cthread_desc = ldtp[sel_idx(USER_DS)];
400 }
401
402 return(KERN_SUCCESS);
403}
404
405/*
406 * Machine-dependent cleanup prior to destroying a thread
407 */
408void
409machine_thread_destroy(
410 thread_t thread)
411{
412 register pcb_t pcb = THREAD_TO_PCB(thread);
413
414 if (pcb->ifps != 0)
415 fpu_free(pcb->ifps);
39236c6e
A
416 if (pcb->iss != 0) {
417 zfree(iss_zone, pcb->iss);
418 pcb->iss = 0;
6d2010ae
A
419 }
420 if (pcb->ids) {
421 zfree(ids_zone, pcb->ids);
422 pcb->ids = NULL;
423 }
424}