]> git.saurik.com Git - apple/xnu.git/blame - osfmk/ppc/hw_perfmon.h
xnu-792.6.76.tar.gz
[apple/xnu.git] / osfmk / ppc / hw_perfmon.h
CommitLineData
55e303ae
A
1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
37839358
A
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
55e303ae 11 *
37839358
A
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
55e303ae
A
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
37839358
A
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
55e303ae
A
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22#ifndef _HW_PERFMON_H_
23#define _HW_PERFMON_H_
24
25#ifndef __ppc__
26#error This file is only useful on PowerPC.
27#endif
28
29#define MAX_CPUPMC_COUNT 8
30
31#define PMC_1 0
32#define PMC_2 1
33#define PMC_3 2
34#define PMC_4 3
35#define PMC_5 4
36#define PMC_6 5
37#define PMC_7 6
38#define PMC_8 7
39
40/* these actions can be combined and simultaneously performed with a single call to perfmon_control() */
41typedef enum {
42 PPC_PERFMON_CLEAR_COUNTERS = 0x0002,
43 PPC_PERFMON_START_COUNTERS = 0x0004,
44 PPC_PERFMON_STOP_COUNTERS = 0x0008,
45 PPC_PERFMON_READ_COUNTERS = 0x0010,
46 PPC_PERFMON_WRITE_COUNTERS = 0x0020
47} perfmon_multi_action_t;
48
49/* these actions can not be combined and each requires a separate call to perfmon_control() */
50typedef enum {
51 PPC_PERFMON_ENABLE = 0x00010000,
52 PPC_PERFMON_DISABLE = 0x00020000,
53 PPC_PERFMON_SET_EVENT = 0x00030000,
54 PPC_PERFMON_SET_THRESHOLD = 0x00040000,
55 PPC_PERFMON_SET_TBSEL = 0x00050000,
56 PPC_PERFMON_SET_EVENT_FUNC = 0x00060000,
57 PPC_PERFMON_ENABLE_PMI_BRKPT = 0x00070000
58} perfmon_single_action_t;
59
60/* used to select byte lane and speculative events (currently 970 only) */
61typedef enum { /* SPECSEL[0:1] TD_CP_DBGxSEL[0:1] TTM3SEL[0:1] TTM1SEL[0:1] TTM0SEL[0:1] */
62 PPC_PERFMON_FUNC_FPU = 0, /* 00 00 00 00 00 */
63 PPC_PERFMON_FUNC_ISU = 1, /* 00 00 00 00 01 */
64 PPC_PERFMON_FUNC_IFU = 2, /* 00 00 00 00 10 */
65 PPC_PERFMON_FUNC_VMX = 3, /* 00 00 00 00 11 */
66 PPC_PERFMON_FUNC_IDU = 64, /* 00 01 00 00 00 */
67 PPC_PERFMON_FUNC_GPS = 76, /* 00 01 00 11 00 */
68 PPC_PERFMON_FUNC_LSU0 = 128, /* 00 10 00 00 00 */
69 PPC_PERFMON_FUNC_LSU1A = 192, /* 00 11 00 00 00 */
70 PPC_PERFMON_FUNC_LSU1B = 240, /* 00 11 11 00 00 */
71 PPC_PERFMON_FUNC_SPECA = 256, /* 01 00 00 00 00 */
72 PPC_PERFMON_FUNC_SPECB = 512, /* 10 00 00 00 00 */
73 PPC_PERFMON_FUNC_SPECC = 768, /* 11 00 00 00 00 */
74} perfmon_functional_unit_t;
75
76#ifdef MACH_KERNEL_PRIVATE
77int perfmon_acquire_facility(task_t task);
78int perfmon_release_facility(task_t task);
79
91447636 80extern int perfmon_disable(thread_t thr_act);
55e303ae
A
81extern int perfmon_init(void);
82extern int perfmon_control(struct savearea *save);
83extern int perfmon_handle_pmi(struct savearea *ssp);
84
85/* perfmonFlags */
86#define PERFMONFLAG_BREAKPOINT_FOR_PMI 0x1
87
88#endif /* MACH_KERNEL_PRIVATE */
89
90/*
91 * From user space:
92 *
93 * int perfmon_control(thread_t thread, perfmon_action_t action, int pmc, u_int32_t val, u_int64_t *pmcs);
94 *
95 * r3: thread
96 * r4: action
97 * r5: pmc
98 * r6: event/threshold/tbsel/count
99 * r7: pointer to space for PMC counts: uint64_t[MAX_CPUPMC_COUNT]
100 *
101 * perfmon_control(thread, PPC_PERFMON_CLEAR_COUNTERS, 0, 0, NULL);
102 * perfmon_control(thread, PPC_PERFMON_START_COUNTERS, 0, 0, NULL);
103 * perfmon_control(thread, PPC_PERFMON_STOP_COUNTERS, 0, 0, NULL);
104 * perfmon_control(thread, PPC_PERFMON_READ_COUNTERS, 0, 0, uint64_t *pmcs);
105 * perfmon_control(thread, PPC_PERFMON_WRITE_COUNTERS, 0, 0, uint64_t *pmcs);
106 * perfmon_control(thread, PPC_PERFMON_ENABLE, 0, 0, NULL);
107 * perfmon_control(thread, PPC_PERFMON_DISABLE, 0, 0, NULL);
108 * perfmon_control(thread, PPC_PERFMON_SET_EVENT, int pmc, int event, NULL);
109 * perfmon_control(thread, PPC_PERFMON_SET_THRESHOLD, 0, int threshold, NULL);
110 * perfmon_control(thread, PPC_PERFMON_SET_TBSEL, 0, int tbsel, NULL);
111 * perfmon_control(thread, PPC_PERFMON_SET_EVENT_FUNC, 0, perfmon_functional_unit_t func, NULL);
112 * perfmon_control(thread, PPC_PERFMON_ENABLE_PMI_BRKPT, 0, boolean_t enable, NULL);
113 *
114 */
115
116#endif /* _HW_PERFMON_H_ */