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43866e37 1/*
0c530ab8 2 * Copyright (c) 2003-2006 Apple Computer, Inc. All rights reserved.
43866e37 3 *
6601e61a 4 * @APPLE_LICENSE_HEADER_START@
43866e37 5 *
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6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
8f6c56a5 11 *
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12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
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14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
6601e61a
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16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
8f6c56a5 19 *
6601e61a 20 * @APPLE_LICENSE_HEADER_END@
43866e37 21 */
91447636 22#ifdef PRIVATE
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23
24#ifndef _PPC_CPU_CAPABILITIES_H
25#define _PPC_CPU_CAPABILITIES_H
26
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27/* _cpu_capabilities
28 *
29 * This is the authoritative way to determine from user mode what
30 * implementation-specific processor features are available.
91447636 31 * This API is only supported for Apple internal use.
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32 */
33
34#ifndef __ASSEMBLER__
35
36extern int _cpu_capabilities;
37
38#endif /* __ASSEMBLER__ */
39
40/* Bit definitions for _cpu_capabilities: */
41
42#define kHasAltivec 0x00000001
43#define k64Bit 0x00000002 // 64-bit GPRs
44#define kCache32 0x00000004 // cache line size is 32 bytes
45#define kCache64 0x00000008
46#define kCache128 0x00000010
47#define kDcbaRecommended 0x00000020 // PPC: dcba is available and recommended
91447636 48#define kDcbaAvailable 0x00000040 // PPC: dcba is available (but may or may not be recommended)
43866e37 49#define kDataStreamsRecommended 0x00000080 // PPC: dst, dstt, dstst, dss, and dssall instructions available and recommended
91447636 50#define kDataStreamsAvailable 0x00000100 // PPC: dst, dstt, dstst, dss, and dssall instructions available (may or may not be rec'd)
43866e37 51#define kDcbtStreamsRecommended 0x00000200 // PPC: enhanced dcbt instruction available and recommended
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52#define kDcbtStreamsAvailable 0x00000400 // PPC: enhanced dcbt instruction available (but may or may not be recommended)
53#define kFastThreadLocalStorage 0x00000800 // TLS ptr is kept in a user-mode-readable register
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54
55#define kUP 0x00008000 // set if (kNumCPUs == 1)
56#define kNumCPUs 0x00FF0000 // number of CPUs (see _NumCPUs() below)
57
58#define kNumCPUsShift 16 // see _NumCPUs() below
59
60#define kHasGraphicsOps 0x08000000 // PPC: has fres, frsqrte, and fsel instructions
61#define kHasStfiwx 0x10000000 // PPC: has stfiwx instruction
62#define kHasFsqrt 0x20000000 // PPC: has fsqrt and fsqrts instructions
63
64#ifndef __ASSEMBLER__
65
66static __inline__ int _NumCPUs( void ) { return (_cpu_capabilities & kNumCPUs) >> kNumCPUsShift; }
67
68#endif /* __ASSEMBLER__ */
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69
70
71/*
72 * The shared kernel/user "comm page(s)":
73 *
74 * The last eight pages of every address space are reserved for the kernel/user
75 * "comm area". Because they can be addressed via a sign-extended 16-bit field,
76 * it is particularly efficient to access code or data in the comm area with
77 * absolute branches (ba, bla, bca) or absolute load/stores ("lwz r0,-4096(0)").
78 * Because the comm area can be reached from anywhere, dyld is not needed.
79 * Although eight pages are reserved, presently only two are populated and mapped.
80 *
81 * Routines on the comm page(s) can be thought of as the firmware for extended processor
82 * instructions, whose opcodes are special forms of "bla". Ie, they are cpu
83 * capabilities. During system initialization, the kernel populates the comm page with
84 * code customized for the particular processor and platform.
85 *
86 * Because Mach VM cannot map the last page of an address space, the max length of
87 * the comm area is seven pages.
88 */
89
90#define _COMM_PAGE_BASE_ADDRESS (-8*4096) // start at page -8, ie 0xFFFF8000
91#define _COMM_PAGE_AREA_LENGTH ( 7*4096) // reserved length of entire comm area
92#define _COMM_PAGE_AREA_USED ( 2*4096) // we use two pages so far
91447636 93
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94/* The following set of definitions are used in the kernel, which needs to distinguish between
95 * the 32 and 64-bit commpage addresses and lengths. On PPC they are the same, but on Imtel
96 * they are not.
97 */
98#define _COMM_PAGE32_BASE_ADDRESS ( _COMM_PAGE_BASE_ADDRESS )
99#define _COMM_PAGE64_BASE_ADDRESS ( _COMM_PAGE_BASE_ADDRESS )
100#define _COMM_PAGE32_AREA_LENGTH ( _COMM_PAGE_AREA_LENGTH )
101#define _COMM_PAGE64_AREA_LENGTH ( _COMM_PAGE_AREA_LENGTH )
102#define _COMM_PAGE32_AREA_USED ( _COMM_PAGE_AREA_USED )
103#define _COMM_PAGE64_AREA_USED ( _COMM_PAGE_AREA_USED )
104
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105/* The Objective-C runtime fixed address page to optimize message dispatch */
106#define _OBJC_PAGE_BASE_ADDRESS (-20*4096) // start at page -20, ie 0xFFFEC000
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107
108/* data in the comm page */
109
110#define _COMM_PAGE_SIGNATURE (_COMM_PAGE_BASE_ADDRESS+0x000) // first few bytes are a signature
111#define _COMM_PAGE_VERSION (_COMM_PAGE_BASE_ADDRESS+0x01E) // 16-bit version#
91447636 112#define _COMM_PAGE_THIS_VERSION 2 // this is version 2 of the commarea format
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113
114#define _COMM_PAGE_CPU_CAPABILITIES (_COMM_PAGE_BASE_ADDRESS+0x020) // mirror of extern int _cpu_capabilities
115#define _COMM_PAGE_NCPUS (_COMM_PAGE_BASE_ADDRESS+0x021) // number of configured CPUs
116#define _COMM_PAGE_ALTIVEC (_COMM_PAGE_BASE_ADDRESS+0x024) // nonzero if Altivec available
117#define _COMM_PAGE_64_BIT (_COMM_PAGE_BASE_ADDRESS+0x025) // nonzero if 64-bit processor
118#define _COMM_PAGE_CACHE_LINESIZE (_COMM_PAGE_BASE_ADDRESS+0x026) // cache line size (16-bit field)
119
91447636 120#define _COMM_PAGE_UNUSED1 (_COMM_PAGE_BASE_ADDRESS+0x028) // 24 unused bytes
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121
122#define _COMM_PAGE_2_TO_52 (_COMM_PAGE_BASE_ADDRESS+0x040) // double float constant 2**52
123#define _COMM_PAGE_10_TO_6 (_COMM_PAGE_BASE_ADDRESS+0x048) // double float constant 10**6
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124#define _COMM_PAGE_MAGIC_FE (_COMM_PAGE_BASE_ADDRESS+0x050) // magic constant 0xFEFEFEFEFEFEFEFF (to find 0s)
125#define _COMM_PAGE_MAGIC_80 (_COMM_PAGE_BASE_ADDRESS+0x058) // magic constant 0x8080808080808080 (to find 0s)
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126
127#define _COMM_PAGE_TIMEBASE (_COMM_PAGE_BASE_ADDRESS+0x060) // used by gettimeofday()
128#define _COMM_PAGE_TIMESTAMP (_COMM_PAGE_BASE_ADDRESS+0x068) // used by gettimeofday()
129#define _COMM_PAGE_SEC_PER_TICK (_COMM_PAGE_BASE_ADDRESS+0x070) // used by gettimeofday()
130
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131 /* jump table (bla to this address, which may be a branch to the actual code somewhere else) */
132 /* When new jump table entries are added, corresponding symbols should be added below */
133
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134#define _COMM_PAGE_COMPARE_AND_SWAP32 (_COMM_PAGE_BASE_ADDRESS+0x080) // compare-and-swap word, no barrier
135#define _COMM_PAGE_COMPARE_AND_SWAP64 (_COMM_PAGE_BASE_ADDRESS+0x0c0) // compare-and-swap doubleword, no barrier
136#define _COMM_PAGE_ENQUEUE (_COMM_PAGE_BASE_ADDRESS+0x100) // enqueue
137#define _COMM_PAGE_DEQUEUE (_COMM_PAGE_BASE_ADDRESS+0x140) // dequeue
138#define _COMM_PAGE_MEMORY_BARRIER (_COMM_PAGE_BASE_ADDRESS+0x180) // memory barrier
139#define _COMM_PAGE_ATOMIC_ADD32 (_COMM_PAGE_BASE_ADDRESS+0x1a0) // add atomic word
140#define _COMM_PAGE_ATOMIC_ADD64 (_COMM_PAGE_BASE_ADDRESS+0x1c0) // add atomic doubleword
141
142#define _COMM_PAGE_UNUSED3 (_COMM_PAGE_BASE_ADDRESS+0x1e0) // 32 unused bytes
143
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144#define _COMM_PAGE_ABSOLUTE_TIME (_COMM_PAGE_BASE_ADDRESS+0x200) // mach_absolute_time()
145#define _COMM_PAGE_SPINLOCK_TRY (_COMM_PAGE_BASE_ADDRESS+0x220) // spinlock_try()
146#define _COMM_PAGE_SPINLOCK_LOCK (_COMM_PAGE_BASE_ADDRESS+0x260) // spinlock_lock()
147#define _COMM_PAGE_SPINLOCK_UNLOCK (_COMM_PAGE_BASE_ADDRESS+0x2a0) // spinlock_unlock()
148#define _COMM_PAGE_PTHREAD_GETSPECIFIC (_COMM_PAGE_BASE_ADDRESS+0x2c0) // pthread_getspecific()
149#define _COMM_PAGE_GETTIMEOFDAY (_COMM_PAGE_BASE_ADDRESS+0x2e0) // used by gettimeofday()
150#define _COMM_PAGE_FLUSH_DCACHE (_COMM_PAGE_BASE_ADDRESS+0x4e0) // sys_dcache_flush()
151#define _COMM_PAGE_FLUSH_ICACHE (_COMM_PAGE_BASE_ADDRESS+0x520) // sys_icache_invalidate()
152#define _COMM_PAGE_PTHREAD_SELF (_COMM_PAGE_BASE_ADDRESS+0x580) // pthread_self()
91447636 153
55e303ae 154#define _COMM_PAGE_UNUSED4 (_COMM_PAGE_BASE_ADDRESS+0x5a0) // 32 unused bytes
91447636 155
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156#define _COMM_PAGE_RELINQUISH (_COMM_PAGE_BASE_ADDRESS+0x5c0) // used by spinlocks
157
158#define _COMM_PAGE_UNUSED5 (_COMM_PAGE_BASE_ADDRESS+0x5e0) // 32 unused bytes
159
160#define _COMM_PAGE_BZERO (_COMM_PAGE_BASE_ADDRESS+0x600) // bzero()
161#define _COMM_PAGE_BCOPY (_COMM_PAGE_BASE_ADDRESS+0x780) // bcopy()
162#define _COMM_PAGE_MEMCPY (_COMM_PAGE_BASE_ADDRESS+0x7a0) // memcpy()
163#define _COMM_PAGE_MEMMOVE (_COMM_PAGE_BASE_ADDRESS+0x7a0) // memmove()
164
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165#define _COMM_PAGE_COMPARE_AND_SWAP32B (_COMM_PAGE_BASE_ADDRESS+0xf80) // compare-and-swap word w barrier
166#define _COMM_PAGE_COMPARE_AND_SWAP64B (_COMM_PAGE_BASE_ADDRESS+0xfc0) // compare-and-swap doubleword w barrier
55e303ae 167
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168#define _COMM_PAGE_MEMSET_PATTERN (_COMM_PAGE_BASE_ADDRESS+0x1000)// used by nonzero memset()
169#define _COMM_PAGE_BIGCOPY (_COMM_PAGE_BASE_ADDRESS+0x1140)// very-long-operand copies
55e303ae 170
91447636 171#define _COMM_PAGE_END (_COMM_PAGE_BASE_ADDRESS+0x1700)// end of commpage area
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172
173#ifdef __ASSEMBLER__
174#ifdef __COMM_PAGE_SYMBOLS
175
176#define CREATE_COMM_PAGE_SYMBOL(symbol_name, symbol_address) \
177 .org (symbol_address - _COMM_PAGE_BASE_ADDRESS) @\
178symbol_name: nop
179
180 .text // Required to make a well behaved symbol file
181
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182 CREATE_COMM_PAGE_SYMBOL(___compare_and_swap32, _COMM_PAGE_COMPARE_AND_SWAP32)
183 CREATE_COMM_PAGE_SYMBOL(___compare_and_swap64, _COMM_PAGE_COMPARE_AND_SWAP64)
184 CREATE_COMM_PAGE_SYMBOL(___atomic_enqueue, _COMM_PAGE_ENQUEUE)
185 CREATE_COMM_PAGE_SYMBOL(___atomic_dequeue, _COMM_PAGE_DEQUEUE)
186 CREATE_COMM_PAGE_SYMBOL(___memory_barrier, _COMM_PAGE_MEMORY_BARRIER)
187 CREATE_COMM_PAGE_SYMBOL(___atomic_add32, _COMM_PAGE_ATOMIC_ADD32)
188 CREATE_COMM_PAGE_SYMBOL(___atomic_add64, _COMM_PAGE_ATOMIC_ADD64)
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189 CREATE_COMM_PAGE_SYMBOL(___mach_absolute_time, _COMM_PAGE_ABSOLUTE_TIME)
190 CREATE_COMM_PAGE_SYMBOL(___spin_lock_try, _COMM_PAGE_SPINLOCK_TRY)
191 CREATE_COMM_PAGE_SYMBOL(___spin_lock, _COMM_PAGE_SPINLOCK_LOCK)
192 CREATE_COMM_PAGE_SYMBOL(___spin_unlock, _COMM_PAGE_SPINLOCK_UNLOCK)
193 CREATE_COMM_PAGE_SYMBOL(___pthread_getspecific, _COMM_PAGE_PTHREAD_GETSPECIFIC)
194 CREATE_COMM_PAGE_SYMBOL(___gettimeofday, _COMM_PAGE_GETTIMEOFDAY)
195 CREATE_COMM_PAGE_SYMBOL(___sys_dcache_flush, _COMM_PAGE_FLUSH_DCACHE)
196 CREATE_COMM_PAGE_SYMBOL(___sys_icache_invalidate, _COMM_PAGE_FLUSH_ICACHE)
197 CREATE_COMM_PAGE_SYMBOL(___pthread_self, _COMM_PAGE_PTHREAD_SELF)
198 CREATE_COMM_PAGE_SYMBOL(___spin_lock_relinquish, _COMM_PAGE_RELINQUISH)
199 CREATE_COMM_PAGE_SYMBOL(___bzero, _COMM_PAGE_BZERO)
200 CREATE_COMM_PAGE_SYMBOL(___bcopy, _COMM_PAGE_BCOPY)
201 CREATE_COMM_PAGE_SYMBOL(___memcpy, _COMM_PAGE_MEMCPY)
202// CREATE_COMM_PAGE_SYMBOL(___memmove, _COMM_PAGE_MEMMOVE)
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203 CREATE_COMM_PAGE_SYMBOL(___compare_and_swap32b, _COMM_PAGE_COMPARE_AND_SWAP32B)
204 CREATE_COMM_PAGE_SYMBOL(___compare_and_swap64b, _COMM_PAGE_COMPARE_AND_SWAP64B)
205 CREATE_COMM_PAGE_SYMBOL(___memset_pattern, _COMM_PAGE_MEMSET_PATTERN)
55e303ae 206 CREATE_COMM_PAGE_SYMBOL(___bigcopy, _COMM_PAGE_BIGCOPY)
91447636 207
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208 CREATE_COMM_PAGE_SYMBOL(___end_comm_page, _COMM_PAGE_END)
209
210 .data // Required to make a well behaved symbol file
211 .long 0 // Required to make a well behaved symbol file
212
213#endif /* __COMM_PAGE_SYMBOLS */
214#endif /* __ASSEMBLER__ */
215
43866e37 216#endif /* _PPC_CPU_CAPABILITIES_H */
91447636 217#endif /* PRIVATE */