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5ba3f43e A |
1 | /* |
2 | * Copyright (c) 2007 Apple Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | /* | |
29 | * FILE_ID: thread_status.h | |
30 | */ | |
31 | ||
32 | ||
33 | #ifndef _ARM_THREAD_STATUS_H_ | |
34 | #define _ARM_THREAD_STATUS_H_ | |
35 | ||
36 | #include <mach/machine/_structs.h> | |
37 | #include <mach/message.h> | |
38 | #include <mach/arm/thread_state.h> | |
39 | ||
40 | /* | |
41 | * Support for determining the state of a thread | |
42 | */ | |
43 | ||
44 | ||
45 | /* | |
46 | * Flavors | |
47 | */ | |
48 | ||
0a7de745 | 49 | #define ARM_THREAD_STATE 1 |
5ba3f43e | 50 | #define ARM_UNIFIED_THREAD_STATE ARM_THREAD_STATE |
0a7de745 A |
51 | #define ARM_VFP_STATE 2 |
52 | #define ARM_EXCEPTION_STATE 3 | |
53 | #define ARM_DEBUG_STATE 4 /* pre-armv8 */ | |
54 | #define THREAD_STATE_NONE 5 | |
55 | #define ARM_THREAD_STATE64 6 | |
56 | #define ARM_EXCEPTION_STATE64 7 | |
5ba3f43e | 57 | // ARM_THREAD_STATE_LAST (legacy) 8 |
0a7de745 | 58 | #define ARM_THREAD_STATE32 9 |
5ba3f43e A |
59 | |
60 | /* API */ | |
0a7de745 A |
61 | #define ARM_DEBUG_STATE32 14 |
62 | #define ARM_DEBUG_STATE64 15 | |
63 | #define ARM_NEON_STATE 16 | |
64 | #define ARM_NEON_STATE64 17 | |
65 | #define ARM_CPMU_STATE64 18 | |
5ba3f43e A |
66 | |
67 | #ifdef XNU_KERNEL_PRIVATE | |
68 | /* For kernel use */ | |
0a7de745 A |
69 | #define ARM_SAVED_STATE32 20 |
70 | #define ARM_SAVED_STATE64 21 | |
71 | #define ARM_NEON_SAVED_STATE32 22 | |
72 | #define ARM_NEON_SAVED_STATE64 23 | |
5ba3f43e A |
73 | #endif /* XNU_KERNEL_PRIVATE */ |
74 | ||
0a7de745 A |
75 | #define VALID_THREAD_STATE_FLAVOR(x) \ |
76 | ((x == ARM_THREAD_STATE) || \ | |
77 | (x == ARM_VFP_STATE) || \ | |
78 | (x == ARM_EXCEPTION_STATE) || \ | |
79 | (x == ARM_DEBUG_STATE) || \ | |
5ba3f43e | 80 | (x == THREAD_STATE_NONE) || \ |
0a7de745 A |
81 | (x == ARM_THREAD_STATE32) || \ |
82 | (x == ARM_THREAD_STATE64) || \ | |
83 | (x == ARM_EXCEPTION_STATE64) || \ | |
84 | (x == ARM_NEON_STATE) || \ | |
85 | (x == ARM_NEON_STATE64) || \ | |
86 | (x == ARM_DEBUG_STATE32) || \ | |
5ba3f43e A |
87 | (x == ARM_DEBUG_STATE64)) |
88 | ||
89 | struct arm_state_hdr { | |
0a7de745 A |
90 | uint32_t flavor; |
91 | uint32_t count; | |
5ba3f43e A |
92 | }; |
93 | typedef struct arm_state_hdr arm_state_hdr_t; | |
94 | ||
0a7de745 A |
95 | typedef _STRUCT_ARM_THREAD_STATE arm_thread_state_t; |
96 | typedef _STRUCT_ARM_THREAD_STATE arm_thread_state32_t; | |
97 | typedef _STRUCT_ARM_THREAD_STATE64 arm_thread_state64_t; | |
5ba3f43e | 98 | |
d9a64523 A |
99 | #if !defined(KERNEL) |
100 | #if __DARWIN_C_LEVEL >= __DARWIN_C_FULL && defined(__arm64__) | |
101 | #define arm_thread_state64_get_pc(ts) \ | |
0a7de745 | 102 | __darwin_arm_thread_state64_get_pc(ts) |
d9a64523 | 103 | #define arm_thread_state64_get_pc_fptr(ts) \ |
0a7de745 | 104 | __darwin_arm_thread_state64_get_pc_fptr(ts) |
d9a64523 | 105 | #define arm_thread_state64_set_pc_fptr(ts, fptr) \ |
0a7de745 | 106 | __darwin_arm_thread_state64_set_pc_fptr(ts, fptr) |
d9a64523 | 107 | #define arm_thread_state64_get_lr(ts) \ |
0a7de745 | 108 | __darwin_arm_thread_state64_get_lr(ts) |
d9a64523 | 109 | #define arm_thread_state64_get_lr_fptr(ts) \ |
0a7de745 | 110 | __darwin_arm_thread_state64_get_lr_fptr(ts) |
d9a64523 | 111 | #define arm_thread_state64_set_lr_fptr(ts, fptr) \ |
0a7de745 | 112 | __darwin_arm_thread_state64_set_lr_fptr(ts, fptr) |
d9a64523 | 113 | #define arm_thread_state64_get_sp(ts) \ |
0a7de745 | 114 | __darwin_arm_thread_state64_get_sp(ts) |
d9a64523 | 115 | #define arm_thread_state64_set_sp(ts, ptr) \ |
0a7de745 | 116 | __darwin_arm_thread_state64_set_sp(ts, ptr) |
d9a64523 | 117 | #define arm_thread_state64_get_fp(ts) \ |
0a7de745 | 118 | __darwin_arm_thread_state64_get_fp(ts) |
d9a64523 | 119 | #define arm_thread_state64_set_fp(ts, ptr) \ |
0a7de745 | 120 | __darwin_arm_thread_state64_set_fp(ts, ptr) |
d9a64523 A |
121 | #endif /* __DARWIN_C_LEVEL >= __DARWIN_C_FULL && defined(__arm64__) */ |
122 | #endif /* !defined(KERNEL) */ | |
123 | ||
5ba3f43e A |
124 | struct arm_unified_thread_state { |
125 | arm_state_hdr_t ash; | |
126 | union { | |
127 | arm_thread_state32_t ts_32; | |
128 | arm_thread_state64_t ts_64; | |
129 | } uts; | |
130 | }; | |
0a7de745 A |
131 | #define ts_32 uts.ts_32 |
132 | #define ts_64 uts.ts_64 | |
5ba3f43e A |
133 | typedef struct arm_unified_thread_state arm_unified_thread_state_t; |
134 | ||
135 | #define ARM_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ | |
136 | (sizeof (arm_thread_state_t)/sizeof(uint32_t))) | |
137 | #define ARM_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \ | |
138 | (sizeof (arm_thread_state32_t)/sizeof(uint32_t))) | |
139 | #define ARM_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \ | |
140 | (sizeof (arm_thread_state64_t)/sizeof(uint32_t))) | |
141 | #define ARM_UNIFIED_THREAD_STATE_COUNT ((mach_msg_type_number_t) \ | |
142 | (sizeof (arm_unified_thread_state_t)/sizeof(uint32_t))) | |
143 | ||
144 | ||
0a7de745 A |
145 | typedef _STRUCT_ARM_VFP_STATE arm_vfp_state_t; |
146 | typedef _STRUCT_ARM_NEON_STATE arm_neon_state_t; | |
147 | typedef _STRUCT_ARM_NEON_STATE arm_neon_state32_t; | |
148 | typedef _STRUCT_ARM_NEON_STATE64 arm_neon_state64_t; | |
5ba3f43e | 149 | |
0a7de745 A |
150 | typedef _STRUCT_ARM_EXCEPTION_STATE arm_exception_state_t; |
151 | typedef _STRUCT_ARM_EXCEPTION_STATE arm_exception_state32_t; | |
152 | typedef _STRUCT_ARM_EXCEPTION_STATE64 arm_exception_state64_t; | |
5ba3f43e | 153 | |
0a7de745 A |
154 | typedef _STRUCT_ARM_DEBUG_STATE32 arm_debug_state32_t; |
155 | typedef _STRUCT_ARM_DEBUG_STATE64 arm_debug_state64_t; | |
5ba3f43e A |
156 | |
157 | #if defined(XNU_KERNEL_PRIVATE) && defined(__arm64__) | |
158 | /* See below for ARM64 kernel structure definition for arm_debug_state. */ | |
159 | #else | |
160 | /* | |
161 | * Otherwise not ARM64 kernel and we must preserve legacy ARM definitions of | |
162 | * arm_debug_state for binary compatability of userland consumers of this file. | |
163 | */ | |
164 | #if defined(__arm__) | |
0a7de745 | 165 | typedef _STRUCT_ARM_DEBUG_STATE arm_debug_state_t; |
5ba3f43e | 166 | #elif defined(__arm64__) |
0a7de745 | 167 | typedef _STRUCT_ARM_LEGACY_DEBUG_STATE arm_debug_state_t; |
5ba3f43e A |
168 | #else |
169 | #error Undefined architecture | |
170 | #endif | |
171 | #endif | |
172 | ||
173 | #define ARM_VFP_STATE_COUNT ((mach_msg_type_number_t) \ | |
174 | (sizeof (arm_vfp_state_t)/sizeof(uint32_t))) | |
175 | ||
176 | #define ARM_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \ | |
177 | (sizeof (arm_exception_state_t)/sizeof(uint32_t))) | |
178 | ||
179 | #define ARM_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \ | |
180 | (sizeof (arm_exception_state64_t)/sizeof(uint32_t))) | |
181 | ||
182 | #define ARM_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \ | |
183 | (sizeof (arm_debug_state_t)/sizeof(uint32_t))) | |
184 | ||
185 | #define ARM_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \ | |
186 | (sizeof (arm_debug_state32_t)/sizeof(uint32_t))) | |
187 | ||
188 | #define ARM_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \ | |
189 | (sizeof (arm_debug_state64_t)/sizeof(uint32_t))) | |
190 | ||
191 | #define ARM_NEON_STATE_COUNT ((mach_msg_type_number_t) \ | |
192 | (sizeof (arm_neon_state_t)/sizeof(uint32_t))) | |
193 | ||
194 | #define ARM_NEON_STATE64_COUNT ((mach_msg_type_number_t) \ | |
195 | (sizeof (arm_neon_state64_t)/sizeof(uint32_t))) | |
196 | ||
0a7de745 A |
197 | #define MACHINE_THREAD_STATE ARM_THREAD_STATE |
198 | #define MACHINE_THREAD_STATE_COUNT ARM_UNIFIED_THREAD_STATE_COUNT | |
5ba3f43e A |
199 | |
200 | /* | |
201 | * Largest state on this machine: | |
202 | */ | |
0a7de745 | 203 | #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX |
5ba3f43e A |
204 | |
205 | #ifdef XNU_KERNEL_PRIVATE | |
206 | ||
207 | static inline boolean_t | |
208 | is_thread_state32(const arm_unified_thread_state_t *its) | |
209 | { | |
0a7de745 | 210 | return its->ash.flavor == ARM_THREAD_STATE32; |
5ba3f43e A |
211 | } |
212 | ||
213 | static inline boolean_t | |
214 | is_thread_state64(const arm_unified_thread_state_t *its) | |
215 | { | |
0a7de745 | 216 | return its->ash.flavor == ARM_THREAD_STATE64; |
5ba3f43e A |
217 | } |
218 | ||
219 | static inline arm_thread_state32_t* | |
220 | thread_state32(arm_unified_thread_state_t *its) | |
221 | { | |
222 | return &its->ts_32; | |
223 | } | |
224 | ||
225 | static inline arm_thread_state64_t* | |
226 | thread_state64(arm_unified_thread_state_t *its) | |
227 | { | |
228 | return &its->ts_64; | |
229 | } | |
230 | ||
231 | static inline const arm_thread_state32_t* | |
232 | const_thread_state32(const arm_unified_thread_state_t *its) | |
233 | { | |
234 | return &its->ts_32; | |
235 | } | |
236 | ||
237 | static inline const arm_thread_state64_t* | |
238 | const_thread_state64(const arm_unified_thread_state_t *its) | |
239 | { | |
240 | return &its->ts_64; | |
241 | } | |
242 | ||
243 | #if defined(__arm__) | |
244 | #include <arm/proc_reg.h> | |
245 | ||
0a7de745 | 246 | #define ARM_SAVED_STATE THREAD_STATE_NONE + 1 |
5ba3f43e A |
247 | |
248 | struct arm_saved_state { | |
0a7de745 A |
249 | uint32_t r[13]; /* General purpose register r0-r12 */ |
250 | uint32_t sp; /* Stack pointer r13 */ | |
251 | uint32_t lr; /* Link register r14 */ | |
252 | uint32_t pc; /* Program counter r15 */ | |
253 | uint32_t cpsr; /* Current program status register */ | |
254 | uint32_t fsr; /* Fault status */ | |
255 | uint32_t far; /* Virtual Fault Address */ | |
256 | uint32_t exception;/* exception number */ | |
5ba3f43e A |
257 | }; |
258 | typedef struct arm_saved_state arm_saved_state_t; | |
259 | ||
260 | /* | |
261 | * Just for coexistence with AArch64 code. | |
262 | */ | |
263 | typedef struct arm_saved_state arm_saved_state32_t; | |
264 | ||
265 | static inline arm_saved_state32_t* | |
266 | saved_state32(arm_saved_state_t *iss) | |
267 | { | |
0a7de745 | 268 | return iss; |
5ba3f43e A |
269 | } |
270 | ||
271 | static inline boolean_t | |
272 | is_saved_state32(const arm_saved_state_t *iss __unused) | |
273 | { | |
0a7de745 | 274 | return TRUE; |
5ba3f43e A |
275 | } |
276 | ||
277 | ||
278 | struct arm_saved_state_tagged { | |
0a7de745 A |
279 | uint32_t tag; |
280 | struct arm_saved_state state; | |
5ba3f43e A |
281 | }; |
282 | typedef struct arm_saved_state_tagged arm_saved_state_tagged_t; | |
283 | ||
284 | #define ARM_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \ | |
0a7de745 | 285 | (sizeof (arm_saved_state_t)/sizeof(unsigned int))) |
5ba3f43e A |
286 | |
287 | ||
288 | static inline register_t | |
289 | get_saved_state_pc(const arm_saved_state_t *iss) | |
290 | { | |
291 | return iss->pc; | |
292 | } | |
293 | ||
294 | static inline void | |
295 | set_saved_state_pc(arm_saved_state_t *iss, register_t pc) | |
296 | { | |
297 | iss->pc = pc; | |
298 | } | |
299 | ||
300 | static inline register_t | |
301 | get_saved_state_sp(const arm_saved_state_t *iss) | |
302 | { | |
303 | return iss->sp; | |
304 | } | |
305 | ||
306 | static inline void | |
307 | set_saved_state_sp(arm_saved_state_t *iss, register_t sp) | |
308 | { | |
309 | iss->sp = sp; | |
310 | } | |
311 | ||
312 | static inline register_t | |
313 | get_saved_state_fp(const arm_saved_state_t *iss) | |
314 | { | |
315 | return iss->r[7]; | |
316 | } | |
317 | ||
318 | static inline void | |
319 | set_saved_state_fp(arm_saved_state_t *iss, register_t fp) | |
320 | { | |
321 | iss->r[7] = fp; | |
322 | } | |
323 | ||
324 | static inline register_t | |
325 | get_saved_state_lr(const arm_saved_state_t *iss) | |
326 | { | |
327 | return iss->lr; | |
328 | } | |
329 | ||
330 | static inline void | |
331 | set_saved_state_lr(arm_saved_state_t *iss, register_t lr) | |
332 | { | |
333 | iss->lr = lr; | |
334 | } | |
335 | ||
336 | static inline register_t | |
337 | get_saved_state_cpsr(const arm_saved_state_t *iss) | |
338 | { | |
339 | return iss->cpsr; | |
340 | } | |
341 | ||
342 | static inline void | |
343 | set_saved_state_cpsr(arm_saved_state_t *iss, register_t cpsr) | |
344 | { | |
345 | iss->cpsr = cpsr; | |
346 | } | |
347 | ||
348 | static inline register_t | |
349 | get_saved_state_reg(const arm_saved_state_t *iss, unsigned regno) | |
350 | { | |
351 | return iss->r[regno]; | |
352 | } | |
353 | ||
354 | static inline void | |
355 | set_saved_state_reg(arm_saved_state_t *iss, unsigned regno, register_t val) | |
356 | { | |
357 | iss->r[regno] = val; | |
358 | } | |
359 | ||
360 | #elif defined(__arm64__) | |
361 | ||
362 | #include <kern/assert.h> | |
363 | #include <arm64/proc_reg.h> | |
364 | #define CAST_ASSERT_SAFE(type, val) (assert((val) == ((type)(val))), (type)(val)) | |
365 | ||
366 | /* | |
367 | * GPR context | |
368 | */ | |
369 | ||
370 | struct arm_saved_state32 { | |
0a7de745 A |
371 | uint32_t r[13]; /* General purpose register r0-r12 */ |
372 | uint32_t sp; /* Stack pointer r13 */ | |
373 | uint32_t lr; /* Link register r14 */ | |
374 | uint32_t pc; /* Program counter r15 */ | |
375 | uint32_t cpsr; /* Current program status register */ | |
376 | uint32_t far; /* Virtual fault address */ | |
377 | uint32_t esr; /* Exception syndrome register */ | |
378 | uint32_t exception; /* Exception number */ | |
5ba3f43e A |
379 | }; |
380 | typedef struct arm_saved_state32 arm_saved_state32_t; | |
381 | ||
382 | struct arm_saved_state32_tagged { | |
0a7de745 A |
383 | uint32_t tag; |
384 | struct arm_saved_state32 state; | |
5ba3f43e A |
385 | }; |
386 | typedef struct arm_saved_state32_tagged arm_saved_state32_tagged_t; | |
387 | ||
388 | #define ARM_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \ | |
0a7de745 | 389 | (sizeof (arm_saved_state32_t)/sizeof(unsigned int))) |
5ba3f43e A |
390 | |
391 | struct arm_saved_state64 { | |
0a7de745 A |
392 | uint64_t x[29]; /* General purpose registers x0-x28 */ |
393 | uint64_t fp; /* Frame pointer x29 */ | |
394 | uint64_t lr; /* Link register x30 */ | |
395 | uint64_t sp; /* Stack pointer x31 */ | |
396 | uint64_t pc; /* Program counter */ | |
397 | uint32_t cpsr; /* Current program status register */ | |
398 | uint32_t reserved; /* Reserved padding */ | |
399 | uint64_t far; /* Virtual fault address */ | |
400 | uint32_t esr; /* Exception syndrome register */ | |
401 | uint32_t exception; /* Exception number */ | |
5ba3f43e A |
402 | }; |
403 | typedef struct arm_saved_state64 arm_saved_state64_t; | |
404 | ||
405 | #define ARM_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \ | |
0a7de745 | 406 | (sizeof (arm_saved_state64_t)/sizeof(unsigned int))) |
5ba3f43e A |
407 | |
408 | struct arm_saved_state64_tagged { | |
0a7de745 A |
409 | uint32_t tag; |
410 | struct arm_saved_state64 state; | |
5ba3f43e A |
411 | }; |
412 | typedef struct arm_saved_state64_tagged arm_saved_state64_tagged_t; | |
413 | ||
414 | struct arm_saved_state { | |
415 | arm_state_hdr_t ash; | |
416 | union { | |
417 | struct arm_saved_state32 ss_32; | |
418 | struct arm_saved_state64 ss_64; | |
419 | } uss; | |
420 | } __attribute__((aligned(16))); | |
0a7de745 A |
421 | #define ss_32 uss.ss_32 |
422 | #define ss_64 uss.ss_64 | |
5ba3f43e A |
423 | |
424 | typedef struct arm_saved_state arm_saved_state_t; | |
425 | ||
426 | ||
427 | static inline boolean_t | |
428 | is_saved_state32(const arm_saved_state_t *iss) | |
429 | { | |
0a7de745 | 430 | return iss->ash.flavor == ARM_SAVED_STATE32; |
5ba3f43e A |
431 | } |
432 | ||
433 | static inline boolean_t | |
434 | is_saved_state64(const arm_saved_state_t *iss) | |
435 | { | |
0a7de745 | 436 | return iss->ash.flavor == ARM_SAVED_STATE64; |
5ba3f43e A |
437 | } |
438 | ||
439 | static inline arm_saved_state32_t* | |
440 | saved_state32(arm_saved_state_t *iss) | |
441 | { | |
442 | return &iss->ss_32; | |
443 | } | |
444 | ||
445 | static inline const arm_saved_state32_t* | |
446 | const_saved_state32(const arm_saved_state_t *iss) | |
447 | { | |
448 | return &iss->ss_32; | |
449 | } | |
450 | ||
451 | static inline arm_saved_state64_t* | |
452 | saved_state64(arm_saved_state_t *iss) | |
453 | { | |
454 | return &iss->ss_64; | |
455 | } | |
456 | ||
457 | static inline const arm_saved_state64_t* | |
458 | const_saved_state64(const arm_saved_state_t *iss) | |
459 | { | |
460 | return &iss->ss_64; | |
461 | } | |
462 | ||
463 | static inline register_t | |
464 | get_saved_state_pc(const arm_saved_state_t *iss) | |
465 | { | |
0a7de745 | 466 | return is_saved_state32(iss) ? const_saved_state32(iss)->pc : const_saved_state64(iss)->pc; |
5ba3f43e A |
467 | } |
468 | ||
469 | static inline void | |
470 | set_saved_state_pc(arm_saved_state_t *iss, register_t pc) | |
471 | { | |
472 | if (is_saved_state32(iss)) { | |
473 | saved_state32(iss)->pc = CAST_ASSERT_SAFE(uint32_t, pc); | |
474 | } else { | |
475 | saved_state64(iss)->pc = pc; | |
476 | } | |
477 | } | |
478 | ||
479 | static inline register_t | |
480 | get_saved_state_sp(const arm_saved_state_t *iss) | |
481 | { | |
0a7de745 | 482 | return is_saved_state32(iss) ? const_saved_state32(iss)->sp : const_saved_state64(iss)->sp; |
5ba3f43e A |
483 | } |
484 | ||
485 | static inline void | |
486 | set_saved_state_sp(arm_saved_state_t *iss, register_t sp) | |
487 | { | |
488 | if (is_saved_state32(iss)) { | |
489 | saved_state32(iss)->sp = CAST_ASSERT_SAFE(uint32_t, sp); | |
490 | } else { | |
491 | saved_state64(iss)->sp = sp; | |
492 | } | |
493 | } | |
494 | ||
495 | static inline register_t | |
496 | get_saved_state_lr(const arm_saved_state_t *iss) | |
497 | { | |
0a7de745 | 498 | return is_saved_state32(iss) ? const_saved_state32(iss)->lr : const_saved_state64(iss)->lr; |
5ba3f43e A |
499 | } |
500 | ||
501 | static inline void | |
502 | set_saved_state_lr(arm_saved_state_t *iss, register_t lr) | |
503 | { | |
504 | if (is_saved_state32(iss)) { | |
505 | saved_state32(iss)->lr = CAST_ASSERT_SAFE(uint32_t, lr); | |
506 | } else { | |
507 | saved_state64(iss)->lr = lr; | |
508 | } | |
509 | } | |
510 | ||
511 | static inline register_t | |
512 | get_saved_state_fp(const arm_saved_state_t *iss) | |
513 | { | |
0a7de745 | 514 | return is_saved_state32(iss) ? const_saved_state32(iss)->r[7] : const_saved_state64(iss)->fp; |
5ba3f43e A |
515 | } |
516 | ||
517 | static inline void | |
518 | set_saved_state_fp(arm_saved_state_t *iss, register_t fp) | |
519 | { | |
520 | if (is_saved_state32(iss)) { | |
521 | saved_state32(iss)->r[7] = CAST_ASSERT_SAFE(uint32_t, fp); | |
522 | } else { | |
523 | saved_state64(iss)->fp = fp; | |
524 | } | |
525 | } | |
526 | ||
527 | static inline int | |
0a7de745 | 528 | check_saved_state_reglimit(const arm_saved_state_t *iss, unsigned reg) |
5ba3f43e | 529 | { |
0a7de745 | 530 | return is_saved_state32(iss) ? (reg < ARM_SAVED_STATE32_COUNT) : (reg < ARM_SAVED_STATE64_COUNT); |
5ba3f43e A |
531 | } |
532 | ||
533 | static inline register_t | |
534 | get_saved_state_reg(const arm_saved_state_t *iss, unsigned reg) | |
535 | { | |
0a7de745 A |
536 | if (!check_saved_state_reglimit(iss, reg)) { |
537 | return 0; | |
538 | } | |
5ba3f43e | 539 | |
0a7de745 | 540 | return is_saved_state32(iss) ? (const_saved_state32(iss)->r[reg]) : (const_saved_state64(iss)->x[reg]); |
5ba3f43e A |
541 | } |
542 | ||
543 | static inline void | |
544 | set_saved_state_reg(arm_saved_state_t *iss, unsigned reg, register_t value) | |
545 | { | |
0a7de745 A |
546 | if (!check_saved_state_reglimit(iss, reg)) { |
547 | return; | |
548 | } | |
5ba3f43e A |
549 | |
550 | if (is_saved_state32(iss)) { | |
551 | saved_state32(iss)->r[reg] = CAST_ASSERT_SAFE(uint32_t, value); | |
552 | } else { | |
553 | saved_state64(iss)->x[reg] = value; | |
554 | } | |
555 | } | |
556 | ||
557 | static inline uint32_t | |
558 | get_saved_state_cpsr(const arm_saved_state_t *iss) | |
559 | { | |
0a7de745 | 560 | return is_saved_state32(iss) ? const_saved_state32(iss)->cpsr : const_saved_state64(iss)->cpsr; |
5ba3f43e A |
561 | } |
562 | ||
563 | static inline void | |
564 | set_saved_state_cpsr(arm_saved_state_t *iss, uint32_t cpsr) | |
565 | { | |
566 | if (is_saved_state32(iss)) { | |
567 | saved_state32(iss)->cpsr = cpsr; | |
568 | } else { | |
569 | saved_state64(iss)->cpsr = cpsr; | |
570 | } | |
571 | } | |
572 | ||
573 | static inline register_t | |
574 | get_saved_state_far(const arm_saved_state_t *iss) | |
575 | { | |
0a7de745 | 576 | return is_saved_state32(iss) ? const_saved_state32(iss)->far : const_saved_state64(iss)->far; |
5ba3f43e A |
577 | } |
578 | ||
579 | static inline void | |
580 | set_saved_state_far(arm_saved_state_t *iss, register_t far) | |
581 | { | |
582 | if (is_saved_state32(iss)) { | |
583 | saved_state32(iss)->far = CAST_ASSERT_SAFE(uint32_t, far); | |
584 | } else { | |
585 | saved_state64(iss)->far = far; | |
586 | } | |
587 | } | |
588 | ||
589 | static inline uint32_t | |
590 | get_saved_state_esr(const arm_saved_state_t *iss) | |
591 | { | |
0a7de745 | 592 | return is_saved_state32(iss) ? const_saved_state32(iss)->esr : const_saved_state64(iss)->esr; |
5ba3f43e A |
593 | } |
594 | ||
595 | static inline void | |
596 | set_saved_state_esr(arm_saved_state_t *iss, uint32_t esr) | |
597 | { | |
598 | if (is_saved_state32(iss)) { | |
599 | saved_state32(iss)->esr = esr; | |
600 | } else { | |
601 | saved_state64(iss)->esr = esr; | |
602 | } | |
603 | } | |
604 | ||
605 | static inline uint32_t | |
606 | get_saved_state_exc(const arm_saved_state_t *iss) | |
607 | { | |
0a7de745 | 608 | return is_saved_state32(iss) ? const_saved_state32(iss)->exception : const_saved_state64(iss)->exception; |
5ba3f43e A |
609 | } |
610 | ||
611 | static inline void | |
612 | set_saved_state_exc(arm_saved_state_t *iss, uint32_t exc) | |
613 | { | |
614 | if (is_saved_state32(iss)) { | |
615 | saved_state32(iss)->exception = exc; | |
616 | } else { | |
617 | saved_state64(iss)->exception = exc; | |
618 | } | |
619 | } | |
620 | ||
621 | extern void panic_unimplemented(void); | |
622 | ||
623 | static inline int | |
0a7de745 | 624 | get_saved_state_svc_number(const arm_saved_state_t *iss) |
5ba3f43e | 625 | { |
0a7de745 | 626 | return is_saved_state32(iss) ? (int)const_saved_state32(iss)->r[12] : (int)const_saved_state64(iss)->x[ARM64_SYSCALL_CODE_REG_NUM]; /* Only first word counts here */ |
5ba3f43e A |
627 | } |
628 | ||
0a7de745 | 629 | typedef _STRUCT_ARM_LEGACY_DEBUG_STATE arm_legacy_debug_state_t; |
5ba3f43e A |
630 | |
631 | struct arm_debug_aggregate_state { | |
0a7de745 A |
632 | arm_state_hdr_t dsh; |
633 | union { | |
634 | arm_debug_state32_t ds32; | |
635 | arm_debug_state64_t ds64; | |
636 | } uds; | |
5ba3f43e A |
637 | } __attribute__((aligned(16))); |
638 | ||
639 | typedef struct arm_debug_aggregate_state arm_debug_state_t; | |
640 | ||
641 | #define ARM_LEGACY_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \ | |
642 | (sizeof (arm_legacy_debug_state_t)/sizeof(uint32_t))) | |
643 | ||
644 | /* | |
645 | * NEON context | |
646 | */ | |
647 | typedef __uint128_t uint128_t; | |
648 | typedef uint64_t uint64x2_t __attribute__((ext_vector_type(2))); | |
649 | typedef uint32_t uint32x4_t __attribute__((ext_vector_type(4))); | |
650 | ||
651 | struct arm_neon_saved_state32 { | |
652 | union { | |
0a7de745 A |
653 | uint128_t q[16]; |
654 | uint64_t d[32]; | |
655 | uint32_t s[32]; | |
5ba3f43e | 656 | } v; |
0a7de745 A |
657 | uint32_t fpsr; |
658 | uint32_t fpcr; | |
5ba3f43e A |
659 | }; |
660 | typedef struct arm_neon_saved_state32 arm_neon_saved_state32_t; | |
661 | ||
662 | #define ARM_NEON_SAVED_STATE32_COUNT ((mach_msg_type_number_t) \ | |
0a7de745 | 663 | (sizeof (arm_neon_saved_state32_t)/sizeof(unsigned int))) |
5ba3f43e A |
664 | |
665 | struct arm_neon_saved_state64 { | |
666 | union { | |
0a7de745 A |
667 | uint128_t q[32]; |
668 | uint64x2_t d[32]; | |
669 | uint32x4_t s[32]; | |
5ba3f43e | 670 | } v; |
0a7de745 A |
671 | uint32_t fpsr; |
672 | uint32_t fpcr; | |
5ba3f43e A |
673 | }; |
674 | typedef struct arm_neon_saved_state64 arm_neon_saved_state64_t; | |
675 | ||
676 | #define ARM_NEON_SAVED_STATE64_COUNT ((mach_msg_type_number_t) \ | |
0a7de745 | 677 | (sizeof (arm_neon_saved_state64_t)/sizeof(unsigned int))) |
5ba3f43e A |
678 | |
679 | struct arm_neon_saved_state { | |
680 | arm_state_hdr_t nsh; | |
681 | union { | |
682 | struct arm_neon_saved_state32 ns_32; | |
683 | struct arm_neon_saved_state64 ns_64; | |
684 | } uns; | |
685 | }; | |
686 | typedef struct arm_neon_saved_state arm_neon_saved_state_t; | |
0a7de745 A |
687 | #define ns_32 uns.ns_32 |
688 | #define ns_64 uns.ns_64 | |
5ba3f43e A |
689 | |
690 | static inline boolean_t | |
691 | is_neon_saved_state32(const arm_neon_saved_state_t *state) | |
692 | { | |
0a7de745 | 693 | return state->nsh.flavor == ARM_NEON_SAVED_STATE32; |
5ba3f43e A |
694 | } |
695 | ||
696 | static inline boolean_t | |
697 | is_neon_saved_state64(const arm_neon_saved_state_t *state) | |
698 | { | |
0a7de745 | 699 | return state->nsh.flavor == ARM_NEON_SAVED_STATE64; |
5ba3f43e A |
700 | } |
701 | ||
702 | static inline arm_neon_saved_state32_t * | |
703 | neon_state32(arm_neon_saved_state_t *state) | |
704 | { | |
705 | return &state->ns_32; | |
706 | } | |
707 | ||
708 | static inline arm_neon_saved_state64_t * | |
709 | neon_state64(arm_neon_saved_state_t *state) | |
710 | { | |
711 | return &state->ns_64; | |
712 | } | |
713 | ||
714 | ||
715 | /* | |
716 | * Aggregated context | |
717 | */ | |
718 | ||
719 | struct arm_context { | |
720 | struct arm_saved_state ss; | |
721 | struct arm_neon_saved_state ns; | |
722 | }; | |
723 | typedef struct arm_context arm_context_t; | |
724 | ||
725 | extern void saved_state_to_thread_state64(const arm_saved_state_t*, arm_thread_state64_t*); | |
726 | extern void thread_state64_to_saved_state(const arm_thread_state64_t*, arm_saved_state_t*); | |
727 | ||
728 | #else | |
729 | #error Unknown arch | |
730 | #endif | |
731 | ||
732 | extern void saved_state_to_thread_state32(const arm_saved_state_t*, arm_thread_state32_t*); | |
733 | extern void thread_state32_to_saved_state(const arm_thread_state32_t*, arm_saved_state_t*); | |
734 | ||
735 | #endif /* XNU_KERNEL_PRIVATE */ | |
736 | ||
737 | #endif /* _ARM_THREAD_STATUS_H_ */ |