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1c79356b | 1 | /* |
c910b4d9 | 2 | * Copyright (c) 2000-2008 Apple Inc. All rights reserved. |
1c79356b | 3 | * |
2d21ac55 | 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
1c79356b | 5 | * |
2d21ac55 A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
8f6c56a5 | 14 | * |
2d21ac55 A |
15 | * Please obtain a copy of the License at |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
8f6c56a5 A |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
2d21ac55 A |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
8f6c56a5 | 25 | * |
2d21ac55 | 26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ |
1c79356b A |
27 | */ |
28 | /* | |
29 | * @OSF_COPYRIGHT@ | |
30 | */ | |
31 | /* | |
32 | * @APPLE_FREE_COPYRIGHT@ | |
33 | */ | |
34 | /* | |
35 | * File: rtclock.c | |
36 | * Purpose: Routines for handling the machine dependent | |
37 | * real-time clock. | |
38 | */ | |
39 | ||
40 | #include <mach/mach_types.h> | |
41 | ||
42 | #include <kern/clock.h> | |
43 | #include <kern/thread.h> | |
0c530ab8 | 44 | #include <kern/processor.h> |
1c79356b A |
45 | #include <kern/macro_help.h> |
46 | #include <kern/spl.h> | |
2d21ac55 | 47 | #include <kern/pms.h> |
1c79356b | 48 | |
55e303ae | 49 | #include <machine/commpage.h> |
ab86ba33 | 50 | #include <machine/machine_routines.h> |
a3d08fcd | 51 | #include <ppc/exception.h> |
1c79356b | 52 | #include <ppc/proc_reg.h> |
3a60a9f5 | 53 | #include <ppc/rtclock.h> |
1c79356b | 54 | |
1c79356b A |
55 | #include <sys/kdebug.h> |
56 | ||
0c530ab8 | 57 | int rtclock_config(void); |
6601e61a | 58 | |
0c530ab8 | 59 | int rtclock_init(void); |
1c79356b | 60 | |
91447636 | 61 | #define NSEC_PER_HZ (NSEC_PER_SEC / 100) |
1c79356b | 62 | |
55e303ae | 63 | static uint32_t rtclock_sec_divisor; |
1c79356b | 64 | |
55e303ae | 65 | static mach_timebase_info_data_t rtclock_timebase_const; |
1c79356b | 66 | |
55e303ae A |
67 | static boolean_t rtclock_timebase_initialized; |
68 | ||
55e303ae A |
69 | decl_simple_lock_data(static,rtclock_lock) |
70 | ||
1c79356b A |
71 | /* |
72 | * Macros to lock/unlock real-time clock device. | |
73 | */ | |
74 | #define LOCK_RTC(s) \ | |
75 | MACRO_BEGIN \ | |
76 | (s) = splclock(); \ | |
55e303ae | 77 | simple_lock(&rtclock_lock); \ |
1c79356b A |
78 | MACRO_END |
79 | ||
80 | #define UNLOCK_RTC(s) \ | |
81 | MACRO_BEGIN \ | |
55e303ae | 82 | simple_unlock(&rtclock_lock); \ |
1c79356b A |
83 | splx(s); \ |
84 | MACRO_END | |
85 | ||
86 | static void | |
87 | timebase_callback( | |
88 | struct timebase_freq_t *freq) | |
89 | { | |
55e303ae | 90 | uint32_t numer, denom; |
1c79356b A |
91 | spl_t s; |
92 | ||
55e303ae A |
93 | if ( freq->timebase_den < 1 || freq->timebase_den > 4 || |
94 | freq->timebase_num < freq->timebase_den ) | |
2d21ac55 | 95 | panic("rtclock timebase_callback: invalid constant %lu / %lu", |
55e303ae | 96 | freq->timebase_num, freq->timebase_den); |
1c79356b | 97 | |
55e303ae A |
98 | denom = freq->timebase_num; |
99 | numer = freq->timebase_den * NSEC_PER_SEC; | |
1c79356b A |
100 | |
101 | LOCK_RTC(s); | |
55e303ae | 102 | if (!rtclock_timebase_initialized) { |
0c530ab8 | 103 | commpage_set_timestamp(0,0,0); |
55e303ae A |
104 | |
105 | rtclock_timebase_const.numer = numer; | |
106 | rtclock_timebase_const.denom = denom; | |
107 | rtclock_sec_divisor = freq->timebase_num / freq->timebase_den; | |
108 | ||
ab86ba33 | 109 | ml_init_lock_timeout(); |
55e303ae A |
110 | } |
111 | else { | |
112 | UNLOCK_RTC(s); | |
91447636 | 113 | printf("rtclock timebase_callback: late old %d / %d new %d / %d\n", |
55e303ae A |
114 | rtclock_timebase_const.numer, rtclock_timebase_const.denom, |
115 | numer, denom); | |
116 | return; | |
117 | } | |
1c79356b | 118 | UNLOCK_RTC(s); |
55e303ae A |
119 | |
120 | clock_timebase_init(); | |
1c79356b A |
121 | } |
122 | ||
123 | /* | |
0c530ab8 | 124 | * Configure the system clock device. |
1c79356b A |
125 | */ |
126 | int | |
0c530ab8 | 127 | rtclock_config(void) |
1c79356b | 128 | { |
91447636 | 129 | simple_lock_init(&rtclock_lock, 0); |
1c79356b A |
130 | |
131 | PE_register_timebase_callback(timebase_callback); | |
132 | ||
133 | return (1); | |
134 | } | |
135 | ||
136 | /* | |
137 | * Initialize the system clock device. | |
138 | */ | |
139 | int | |
0c530ab8 | 140 | rtclock_init(void) |
1c79356b | 141 | { |
0c530ab8 | 142 | etimer_resync_deadlines(); /* Start the timers going */ |
1c79356b A |
143 | |
144 | return (1); | |
145 | } | |
146 | ||
55e303ae A |
147 | void |
148 | clock_get_system_microtime( | |
149 | uint32_t *secs, | |
150 | uint32_t *microsecs) | |
1c79356b | 151 | { |
55e303ae A |
152 | uint64_t now, t64; |
153 | uint32_t divisor; | |
1c79356b | 154 | |
55e303ae | 155 | now = mach_absolute_time(); |
1c79356b | 156 | |
55e303ae A |
157 | *secs = t64 = now / (divisor = rtclock_sec_divisor); |
158 | now -= (t64 * divisor); | |
159 | *microsecs = (now * USEC_PER_SEC) / divisor; | |
160 | } | |
1c79356b | 161 | |
55e303ae A |
162 | void |
163 | clock_get_system_nanotime( | |
164 | uint32_t *secs, | |
165 | uint32_t *nanosecs) | |
166 | { | |
167 | uint64_t now, t64; | |
168 | uint32_t divisor; | |
1c79356b | 169 | |
55e303ae | 170 | now = mach_absolute_time(); |
1c79356b | 171 | |
55e303ae A |
172 | *secs = t64 = now / (divisor = rtclock_sec_divisor); |
173 | now -= (t64 * divisor); | |
174 | *nanosecs = (now * NSEC_PER_SEC) / divisor; | |
1c79356b A |
175 | } |
176 | ||
6601e61a | 177 | void |
0c530ab8 A |
178 | clock_gettimeofday_set_commpage( |
179 | uint64_t abstime, | |
180 | uint64_t epoch, | |
181 | uint64_t offset, | |
182 | uint32_t *secs, | |
183 | uint32_t *microsecs) | |
6601e61a | 184 | { |
0c530ab8 | 185 | uint64_t t64, now = abstime; |
6601e61a A |
186 | |
187 | simple_lock(&rtclock_lock); | |
188 | ||
0c530ab8 | 189 | now += offset; |
6601e61a | 190 | |
0c530ab8 A |
191 | *secs = t64 = now / rtclock_sec_divisor; |
192 | now -= (t64 * rtclock_sec_divisor); | |
193 | *microsecs = (now * USEC_PER_SEC) / rtclock_sec_divisor; | |
6601e61a | 194 | |
0c530ab8 | 195 | *secs += epoch; |
6601e61a | 196 | |
0c530ab8 | 197 | commpage_set_timestamp(abstime - now, *secs, rtclock_sec_divisor); |
91447636 | 198 | |
91447636 | 199 | simple_unlock(&rtclock_lock); |
91447636 A |
200 | } |
201 | ||
1c79356b A |
202 | void |
203 | clock_timebase_info( | |
204 | mach_timebase_info_t info) | |
205 | { | |
55e303ae | 206 | spl_t s; |
1c79356b A |
207 | |
208 | LOCK_RTC(s); | |
6601e61a | 209 | *info = rtclock_timebase_const; |
0c530ab8 | 210 | rtclock_timebase_initialized = TRUE; |
1c79356b A |
211 | UNLOCK_RTC(s); |
212 | } | |
213 | ||
1c79356b | 214 | void |
0c530ab8 A |
215 | clock_interval_to_absolutetime_interval( |
216 | uint32_t interval, | |
217 | uint32_t scale_factor, | |
55e303ae | 218 | uint64_t *result) |
1c79356b | 219 | { |
0c530ab8 A |
220 | uint64_t nanosecs = (uint64_t)interval * scale_factor; |
221 | uint64_t t64; | |
222 | uint32_t divisor; | |
91447636 | 223 | |
0c530ab8 A |
224 | *result = (t64 = nanosecs / NSEC_PER_SEC) * |
225 | (divisor = rtclock_sec_divisor); | |
226 | nanosecs -= (t64 * NSEC_PER_SEC); | |
227 | *result += (nanosecs * divisor) / NSEC_PER_SEC; | |
91447636 A |
228 | } |
229 | ||
230 | void | |
231 | absolutetime_to_microtime( | |
232 | uint64_t abstime, | |
233 | uint32_t *secs, | |
234 | uint32_t *microsecs) | |
235 | { | |
236 | uint64_t t64; | |
55e303ae | 237 | uint32_t divisor; |
1c79356b | 238 | |
91447636 A |
239 | *secs = t64 = abstime / (divisor = rtclock_sec_divisor); |
240 | abstime -= (t64 * divisor); | |
241 | *microsecs = (abstime * USEC_PER_SEC) / divisor; | |
1c79356b A |
242 | } |
243 | ||
244 | void | |
0c530ab8 A |
245 | absolutetime_to_nanotime( |
246 | uint64_t abstime, | |
247 | uint32_t *secs, | |
248 | uint32_t *nanosecs) | |
21362eb3 | 249 | { |
0c530ab8 A |
250 | uint64_t t64; |
251 | uint32_t divisor; | |
21362eb3 | 252 | |
0c530ab8 A |
253 | *secs = t64 = abstime / (divisor = rtclock_sec_divisor); |
254 | abstime -= (t64 * divisor); | |
255 | *nanosecs = (abstime * NSEC_PER_SEC) / divisor; | |
6601e61a A |
256 | } |
257 | ||
258 | void | |
0c530ab8 A |
259 | nanotime_to_absolutetime( |
260 | uint32_t secs, | |
261 | uint32_t nanosecs, | |
6601e61a A |
262 | uint64_t *result) |
263 | { | |
0c530ab8 | 264 | uint32_t divisor = rtclock_sec_divisor; |
6601e61a | 265 | |
0c530ab8 A |
266 | *result = ((uint64_t)secs * divisor) + |
267 | ((uint64_t)nanosecs * divisor) / NSEC_PER_SEC; | |
1c79356b A |
268 | } |
269 | ||
270 | void | |
271 | absolutetime_to_nanoseconds( | |
0b4e3aa0 A |
272 | uint64_t abstime, |
273 | uint64_t *result) | |
1c79356b | 274 | { |
55e303ae A |
275 | uint64_t t64; |
276 | uint32_t divisor; | |
1c79356b | 277 | |
55e303ae A |
278 | *result = (t64 = abstime / (divisor = rtclock_sec_divisor)) * NSEC_PER_SEC; |
279 | abstime -= (t64 * divisor); | |
280 | *result += (abstime * NSEC_PER_SEC) / divisor; | |
1c79356b A |
281 | } |
282 | ||
283 | void | |
284 | nanoseconds_to_absolutetime( | |
55e303ae | 285 | uint64_t nanosecs, |
0b4e3aa0 | 286 | uint64_t *result) |
1c79356b | 287 | { |
55e303ae A |
288 | uint64_t t64; |
289 | uint32_t divisor; | |
1c79356b | 290 | |
55e303ae A |
291 | *result = (t64 = nanosecs / NSEC_PER_SEC) * |
292 | (divisor = rtclock_sec_divisor); | |
293 | nanosecs -= (t64 * NSEC_PER_SEC); | |
294 | *result += (nanosecs * divisor) / NSEC_PER_SEC; | |
1c79356b A |
295 | } |
296 | ||
1c79356b | 297 | void |
91447636 | 298 | machine_delay_until( |
0b4e3aa0 | 299 | uint64_t deadline) |
1c79356b | 300 | { |
0b4e3aa0 | 301 | uint64_t now; |
1c79356b A |
302 | |
303 | do { | |
55e303ae | 304 | now = mach_absolute_time(); |
0b4e3aa0 | 305 | } while (now < deadline); |
1c79356b | 306 | } |