[apple/objc4.git] / runtime / arm64-asm.h

/*
 * @APPLE_LICENSE_HEADER_START@
 * 
 * Copyright (c) 2018 Apple Inc.  All Rights Reserved.
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this
 * file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/********************************************************************
 * 
 *  arm64-asm.h - asm tools for arm64/arm64_32 and ROP/JOP
 *
 ********************************************************************/

#if __arm64__

#include "objc-config.h"

#if __LP64__
// true arm64

#define SUPPORT_TAGGED_POINTERS 1
#define PTR .quad
#define PTRSIZE 8
#define PTRSHIFT 3  // 1<<PTRSHIFT == PTRSIZE
// "p" registers are pointer-sized
#define UXTP UXTX
#define p0  x0
#define p1  x1
#define p2  x2
#define p3  x3
#define p4  x4
#define p5  x5
#define p6  x6
#define p7  x7
#define p8  x8
#define p9  x9
#define p10 x10
#define p11 x11
#define p12 x12
#define p13 x13
#define p14 x14
#define p15 x15
#define p16 x16
#define p17 x17

// true arm64
#else
// arm64_32

#define SUPPORT_TAGGED_POINTERS 0
#define PTR .long
#define PTRSIZE 4
#define PTRSHIFT 2  // 1<<PTRSHIFT == PTRSIZE
// "p" registers are pointer-sized
#define UXTP UXTW
#define p0  w0
#define p1  w1
#define p2  w2
#define p3  w3
#define p4  w4
#define p5  w5
#define p6  w6
#define p7  w7
#define p8  w8
#define p9  w9
#define p10 w10
#define p11 w11
#define p12 w12
#define p13 w13
#define p14 w14
#define p15 w15
#define p16 w16
#define p17 w17

// arm64_32
#endif


#if __has_feature(ptrauth_returns)
// ROP
#   define SignLR pacibsp
#   define AuthenticateLR autibsp
#else
// not ROP
#   define SignLR
#   define AuthenticateLR
#endif

#if __has_feature(ptrauth_calls)
// JOP

.macro TailCallFunctionPointer
	// $0 = function pointer value
	braaz	$0
.endmacro

.macro TailCallCachedImp
	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
	eor	$1, $1, $2	// mix SEL into ptrauth modifier
	eor	$1, $1, $3  // mix isa into ptrauth modifier
	brab	$0, $1
.endmacro

.macro TailCallMethodListImp
	// $0 = method list imp, $1 = address of method list imp
	braa	$0, $1
.endmacro

.macro TailCallBlockInvoke
	// $0 = invoke function, $1 = address of invoke function
	braa	$0, $1
.endmacro

.macro AuthAndResignAsIMP
	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
	// note: assumes the imp is not nil
	eor	$1, $1, $2	// mix SEL into ptrauth modifier
	eor	$1, $1, $3  // mix isa into ptrauth modifier
	autib	$0, $1	// authenticate cached imp
	ldr	xzr, [$0]	// crash if authentication failed
	paciza	$0		// resign cached imp as IMP
.endmacro

.macro ExtractISA
	and	$0, $1, #ISA_MASK
#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
	xpacd	$0
#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
	mov	x10, $2
	movk	x10, #ISA_SIGNING_DISCRIMINATOR, LSL #48
	autda	$0, x10
#endif
.endmacro

.macro AuthISASuper dst, addr_mutable, discriminator
#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
	movk	\addr_mutable, #\discriminator, LSL #48
	autda	\dst, \addr_mutable
#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
	xpacd	\dst
#endif
.endmacro

.macro SignAsImp
	paciza	$0
.endmacro

// JOP
#else
// not JOP

.macro TailCallFunctionPointer
	// $0 = function pointer value
	br	$0
.endmacro

.macro TailCallCachedImp
	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
	eor	$0, $0, $3
	br	$0
.endmacro

.macro TailCallMethodListImp
	// $0 = method list imp, $1 = address of method list imp
	br	$0
.endmacro

.macro TailCallBlockInvoke
	// $0 = invoke function, $1 = address of invoke function
	br	$0
.endmacro

.macro AuthAndResignAsIMP
	// $0 = cached imp, $1 = address of cached imp, $2 = SEL
	eor	$0, $0, $3
.endmacro

.macro SignAsImp
.endmacro

.macro ExtractISA
	and    $0, $1, #ISA_MASK
.endmacro

// not JOP
#endif

#define TailCallBlockInvoke TailCallMethodListImp


// __arm64__
#endif
Commit	Line	Data
66799735 A	1	/*
	2	* @APPLE_LICENSE_HEADER_START@
	3	*
	4	* Copyright (c) 2018 Apple Inc. All Rights Reserved.
	5	*
	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. Please obtain a copy of the License at
	10	* http://www.opensource.apple.com/apsl/ and read it before using this
	11	* file.
	12	*
	13	* The Original Code and all software distributed under the License are
	14	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	15	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	16	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	18	* Please see the License for the specific language governing rights and
	19	* limitations under the License.
	20	*
	21	* @APPLE_LICENSE_HEADER_END@
	22	*/
	23	/********************************************************************
	24	*
	25	* arm64-asm.h - asm tools for arm64/arm64_32 and ROP/JOP
	26	*
	27	********************************************************************/
	28
	29	#if __arm64__
	30
34d5b5e8 A	31	#include "objc-config.h"
34d5b5e8 A	32
66799735 A	33	#if __LP64__
	34	// true arm64
	35
	36	#define SUPPORT_TAGGED_POINTERS 1
	37	#define PTR .quad
	38	#define PTRSIZE 8
	39	#define PTRSHIFT 3 // 1<<PTRSHIFT == PTRSIZE
	40	// "p" registers are pointer-sized
	41	#define UXTP UXTX
	42	#define p0 x0
	43	#define p1 x1
	44	#define p2 x2
	45	#define p3 x3
	46	#define p4 x4
	47	#define p5 x5
	48	#define p6 x6
	49	#define p7 x7
	50	#define p8 x8
	51	#define p9 x9
	52	#define p10 x10
	53	#define p11 x11
	54	#define p12 x12
	55	#define p13 x13
	56	#define p14 x14
	57	#define p15 x15
	58	#define p16 x16
	59	#define p17 x17
	60
	61	// true arm64
	62	#else
	63	// arm64_32
	64
	65	#define SUPPORT_TAGGED_POINTERS 0
	66	#define PTR .long
	67	#define PTRSIZE 4
	68	#define PTRSHIFT 2 // 1<<PTRSHIFT == PTRSIZE
	69	// "p" registers are pointer-sized
	70	#define UXTP UXTW
	71	#define p0 w0
	72	#define p1 w1
	73	#define p2 w2
	74	#define p3 w3
	75	#define p4 w4
	76	#define p5 w5
	77	#define p6 w6
	78	#define p7 w7
	79	#define p8 w8
	80	#define p9 w9
	81	#define p10 w10
	82	#define p11 w11
	83	#define p12 w12
	84	#define p13 w13
	85	#define p14 w14
	86	#define p15 w15
	87	#define p16 w16
	88	#define p17 w17
	89
	90	// arm64_32
	91	#endif
	92
	93
	94	#if __has_feature(ptrauth_returns)
	95	// ROP
	96	# define SignLR pacibsp
97	# define AuthenticateLR autibsp
98	#else
99	// not ROP
100	# define SignLR
101	# define AuthenticateLR
102	#endif
103
104	#if __has_feature(ptrauth_calls)
105	// JOP
106
107	.macro TailCallFunctionPointer
108	// $0 = function pointer value
109	braaz $0
110	.endmacro
111
112	.macro TailCallCachedImp
1807f628	113	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
13ba007e	114	eor $1, $1, $2 // mix SEL into ptrauth modifier
1807f628	115	eor $1, $1, $3 // mix isa into ptrauth modifier
66799735 A	116	brab $0, $1
	117	.endmacro
	118
	119	.macro TailCallMethodListImp
	120	// $0 = method list imp, $1 = address of method list imp
	121	braa $0, $1
	122	.endmacro
	123
	124	.macro TailCallBlockInvoke
	125	// $0 = invoke function, $1 = address of invoke function
	126	braa $0, $1
	127	.endmacro
	128
	129	.macro AuthAndResignAsIMP
1807f628	130	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
13ba007e A	131	// note: assumes the imp is not nil
13ba007e A	132	eor $1, $1, $2 // mix SEL into ptrauth modifier
1807f628	133	eor $1, $1, $3 // mix isa into ptrauth modifier
34d5b5e8	134	autib $0, $1 // authenticate cached imp
13ba007e	135	ldr xzr, [$0] // crash if authentication failed
66799735 A	136	paciza $0 // resign cached imp as IMP
	137	.endmacro
	138
34d5b5e8 A	139	.macro ExtractISA
	140	and $0, $1, #ISA_MASK
	141	#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
	142	xpacd $0
	143	#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
	144	mov x10, $2
	145	movk x10, #ISA_SIGNING_DISCRIMINATOR, LSL #48
	146	autda $0, x10
	147	#endif
	148	.endmacro
	149
	150	.macro AuthISASuper dst, addr_mutable, discriminator
	151	#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
	152	movk \addr_mutable, #\discriminator, LSL #48
	153	autda \dst, \addr_mutable
	154	#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
	155	xpacd \dst
	156	#endif
	157	.endmacro
	158
	159	.macro SignAsImp
	160	paciza $0
	161	.endmacro
	162
66799735 A	163	// JOP
	164	#else
	165	// not JOP
	166
	167	.macro TailCallFunctionPointer
	168	// $0 = function pointer value
	169	br $0
	170	.endmacro
	171
	172	.macro TailCallCachedImp
1807f628 A	173	// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
1807f628 A	174	eor $0, $0, $3
66799735 A	175	br $0
	176	.endmacro
	177
	178	.macro TailCallMethodListImp
	179	// $0 = method list imp, $1 = address of method list imp
	180	br $0
	181	.endmacro
	182
	183	.macro TailCallBlockInvoke
	184	// $0 = invoke function, $1 = address of invoke function
	185	br $0
	186	.endmacro
	187
	188	.macro AuthAndResignAsIMP
13ba007e	189	// $0 = cached imp, $1 = address of cached imp, $2 = SEL
1807f628	190	eor $0, $0, $3
34d5b5e8 A	191	.endmacro
	192
	193	.macro SignAsImp
	194	.endmacro
	195
	196	.macro ExtractISA
	197	and $0, $1, #ISA_MASK
	198	.endmacro
66799735 A	199
	200	// not JOP
	201	#endif
	202
	203	#define TailCallBlockInvoke TailCallMethodListImp
	204
	205
	206	// __arm64__
	207	#endif