- cmplwi cr1,rc,32 // too short for DCBZ?
- li rv,0 // get a 0
-Lbzero1: // enter from memset with cr1 and rv set up
- neg r5,r3 // start to compute bytes to align
- mr rp,r3 // make copy of operand ptr
- andi. r6,r5,0x1F // r6 <- bytes to align on cache block
- blt- cr1,Ltail // <32, so skip DCBZs
- beq- cr0,Ldcbz // already aligned
-
- // align on 32-byte boundary
-
- mtcrf 0x01,r6 // move length to cr7 (faster if only 1 cr)
- andi. r7,r6,16 // test bit 27 by hand
- sub rc,rc,r6 // adjust length
- bf 31,1f // test bits of count
- stb rv,0(rp)
- addi rp,rp,1
-1:
- bf 30,2f
- sth rv,0(rp)
- addi rp,rp,2
-2:
- bf 29,3f
- stw rv,0(rp)
- addi rp,rp,4
-3:
- bf 28,4f
- stw rv,0(rp)
- stw rv,4(rp)
- addi rp,rp,8
-4:
- beq Ldcbz
- stw rv,0(rp)
- stw rv,4(rp)
- stw rv,8(rp)
- stw rv,12(rp)
- addi rp,rp,16
-
- // DCBZ 32-byte cache blocks
-Ldcbz:
- srwi. r5,rc,5 // r5 <- number of cache blocks to zero
- beq Ltail // none
- mtctr r5 // set up loop count
- andi. rc,rc,0x1F // will there be leftovers?
-1:
- dcbz 0,rp // zero 32 bytes
- addi rp,rp,32
- bdnz 1b
- beqlr // no leftovers so done
-
- // store up to 31 trailing bytes
- // rv = value to store (in all 4 bytes)
- // rc = #bytes to store (0..31)