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24 #include <sys/syscall.h>
29 /* Structure fields for ucontext and mcontext. */
30 #define UCONTEXT_UC_MCONTEXT 48
32 #define MCONTEXT_ES_EXCEPTION 0
33 #define MCONTEXT_SS_RAX 16
34 #define MCONTEXT_SS_RBX 24
35 #define MCONTEXT_SS_RCX 32
36 #define MCONTEXT_SS_RDX 40
37 #define MCONTEXT_SS_RDI 48
38 #define MCONTEXT_SS_RSI 56
39 #define MCONTEXT_SS_RBP 64
40 #define MCONTEXT_SS_RSP 72
41 #define MCONTEXT_SS_R8 80
42 #define MCONTEXT_SS_RIP 144
49 union __sigaction_u __sigaction_u, %rdi
52 siginfo_t *sinfo, %rcx
62 /* Although this routine does not need any stack frame, various parts
63 of the OS can't analyse the stack without them. */
67 movq %rdi, %rax # set up address for call
69 #if defined(__DYNAMIC__)
70 incl ___in_sigtramp(%rip)
72 /* Save uctx in %rbx. */
74 /* Call the signal handler.
75 Some variants are not supposed to get the last two parameters,
76 but the test to prevent this is more expensive than just passing
84 #if defined(__DYNAMIC__)
85 decl ___in_sigtramp(%rip)
88 movl $ UC_FLAVOR, %esi
93 /* DWARF unwind table #defines. */
94 #define DW_CFA_advance_loc_4 0x44
95 #define DW_CFA_def_cfa 0x0c
96 #define DW_CFA_def_cfa_expression 0x0F
97 #define DW_CFA_expression 0x10
98 #define DW_CFA_val_expression 0x16
99 #define DW_CFA_offset(column) 0x80+(column)
101 /* DWARF expression #defines. */
102 #define DW_OP_deref 0x06
103 #define DW_OP_const1u 0x08
104 #define DW_OP_dup 0x12
105 #define DW_OP_drop 0x13
106 #define DW_OP_over 0x14
107 #define DW_OP_pick 0x15
108 #define DW_OP_swap 0x16
109 #define DW_OP_rot 0x17
110 #define DW_OP_abs 0x19
111 #define DW_OP_and 0x1a
112 #define DW_OP_div 0x1b
113 #define DW_OP_minus 0x1c
114 #define DW_OP_mod 0x1d
115 #define DW_OP_mul 0x1e
116 #define DW_OP_neg 0x1f
117 #define DW_OP_not 0x20
118 #define DW_OP_or 0x21
119 #define DW_OP_plus 0x22
120 #define DW_OP_plus_uconst 0x23
121 #define DW_OP_shl 0x24
122 #define DW_OP_shr 0x25
123 #define DW_OP_shra 0x26
124 #define DW_OP_xor 0x27
125 #define DW_OP_skip 0x2f
126 #define DW_OP_bra 0x28
127 #define DW_OP_eq 0x29
128 #define DW_OP_ge 0x2A
129 #define DW_OP_gt 0x2B
130 #define DW_OP_le 0x2C
131 #define DW_OP_lt 0x2D
132 #define DW_OP_ne 0x2E
133 #define DW_OP_lit(n) 0x30+(n)
134 #define DW_OP_breg(n) 0x70+(n)
135 #define DW_OP_deref_size 0x94
137 /* The location expression we'll use. */
139 #define loc_expr_for_reg(regno, offs) \
140 .byte DW_CFA_expression, regno, 5 /* block length */, \
141 DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
142 DW_OP_plus_uconst, offs
144 /* For r8 through r13 */
145 #define loc_expr_rN(regno) \
146 loc_expr_for_reg(regno, MCONTEXT_SS_R8+(8*(regno-8)))
148 /* For r14 through r15 */
149 #define loc_expr_rN_long(regno) \
150 .byte DW_CFA_expression, regno, 6 /* block length */, \
151 DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
152 DW_OP_plus_uconst, MCONTEXT_SS_R8+(8*(regno-8)), 1
155 .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
157 .set L$set$0,LECIE1-LSCIE1
158 .long L$set$0 # Length of Common Information Entry
160 .long 0 # CIE Identifier Tag
161 .byte 0x1 # CIE Version
162 .ascii "zRS\0" # CIE Augmentation
163 .byte 0x1 # uleb128 0x1; CIE Code Alignment Factor
164 .byte 0x78 # sleb128 -8; CIE Data Alignment Factor
165 .byte 0x10 # CIE RA Column
166 .byte 0x1 # uleb128 0x1; Augmentation size
167 .byte 0x10 # FDE Encoding (pcrel)
169 .byte 0x7 # uleb128 0x5
170 .byte 0x8 # uleb128 0x4
171 .byte DW_CFA_offset(16)
172 .byte 0x1 # uleb128 0x1
173 .byte DW_CFA_offset(16) // duplicate DW_CFA_offset (rip, -8) tells linker to not make compact unwind
174 .byte 0x1 # uleb128 0x1
180 .set L$set$1,LEFDE1-LASFDE1
181 .long L$set$1 # FDE Length
183 .long LASFDE1-EH_frame1 # FDE CIE offset
184 .quad Lstart-. # FDE initial location
185 .set L$set$2,Lend-Lstart
186 .quad L$set$2 # FDE address range
187 .byte 0x0 # uleb128 0x0; Augmentation size
189 /* Now for the expressions, which all compute
190 uctx->uc_mcontext->register
193 Describe even the registers that are not call-saved because they
194 might be being used in the prologue to save other registers.
195 Only integer registers are described at present. */
197 loc_expr_for_reg (0, MCONTEXT_SS_RAX)
198 loc_expr_for_reg (1, MCONTEXT_SS_RBX)
199 loc_expr_for_reg (2, MCONTEXT_SS_RCX)
200 loc_expr_for_reg (3, MCONTEXT_SS_RDX)
201 loc_expr_for_reg (4, MCONTEXT_SS_RSI)
202 loc_expr_for_reg (5, MCONTEXT_SS_RDI)
203 loc_expr_for_reg (6, MCONTEXT_SS_RBP)
204 loc_expr_for_reg (7, MCONTEXT_SS_RSP)
211 loc_expr_rN_long (14)
212 loc_expr_rN_long (15)
214 /* The Intel architecture classifies exceptions into three categories,
215 'faults' which put the address of the faulting instruction
216 in EIP, 'traps' which put the following instruction in EIP,
217 and 'aborts' which don't typically report the instruction
218 causing the exception.
220 The traps are #BP and #OF. */
222 .byte DW_CFA_val_expression, 16
223 .set L$set$3,Lpc_end-Lpc_start
226 /* Push the mcontext address twice. */
227 .byte DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref, DW_OP_dup
228 /* Find the value of EIP. */
229 .byte DW_OP_plus_uconst, MCONTEXT_SS_RIP, MCONTEXT_SS_RIP >> 7
230 .byte DW_OP_deref, DW_OP_swap
231 /* Determine the exception type. */
232 .byte DW_OP_plus_uconst, MCONTEXT_ES_EXCEPTION, DW_OP_deref_size, 4
233 /* Check whether it is #BP (3) or #OF (4). */
234 .byte DW_OP_dup, DW_OP_lit(3), DW_OP_ne
235 .byte DW_OP_swap, DW_OP_lit(4), DW_OP_ne, DW_OP_and
236 /* If it is not, then add 1 to the instruction address, so as to point
237 within or past the faulting instruction. */
241 /* The CFA will have been saved as the value of RSP (it is not
243 .byte DW_CFA_def_cfa_expression
244 .set L$set$4,Lcfa_end-Lcfa_start
247 .byte DW_OP_breg(3), UCONTEXT_UC_MCONTEXT, DW_OP_deref
248 .byte DW_OP_plus_uconst, MCONTEXT_SS_RSP, DW_OP_deref
254 .subsections_via_symbols