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1/*
2 * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
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6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. Please obtain a copy of the License at
10 * http://www.opensource.apple.com/apsl/ and read it before using this
11 * file.
12 *
13 * The Original Code and all software distributed under the License are
14 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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15 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
16 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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17 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
18 * Please see the License for the specific language governing rights and
19 * limitations under the License.
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20 *
21 * @APPLE_LICENSE_HEADER_END@
22 */
23
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24/*
25 * Copyright (c) 1998 Apple Computer, Inc. All rights reserved.
26 *
27 * File: sys/ppc/_longjmp.s
28 *
29 * Implements _longjmp()
30 *
31 * History:
32 * 8 September 1998 Matt Watson (mwatson@apple.com)
33 * Created. Derived from longjmp.s
34 */
3b2a1fe8 35
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36/* We use mode-independent "g" opcodes such as "lg", and/or
37 * mode-independent macros such as MI_CALL_EXTERNAL. These expand
38 * into word operations when targeting __ppc__, and into doubleword
39 * operations when targeting __ppc64__.
40 */
41#include <architecture/ppc/mode_independent_asm.h>
3b2a1fe8 42
59e0d9fe 43#include "_setjmp.h"
3b2a1fe8 44
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45#define __APPLE_API_PRIVATE
46#include <machine/cpu_capabilities.h>
47#undef __APPLE_API_PRIVATE
3b2a1fe8 48
59e0d9fe 49#define VRSave 256
3b2a1fe8 50
3b2a1fe8 51
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52/* int _longjmp(jmp_buf env, int val); */
53
54MI_ENTRY_POINT(__longjmp)
55 lg r6,JMP_addr_at_setjmp(r3)
56 lbz r7, _COMM_PAGE_ALTIVEC(0)
57 cmpg cr1,r3,r6 ; jmpbuf still at same address?
58 cmpwi cr2,r7,0 ; Altivec available? (using non-volatile cr)
59 beq++ cr1,LRestoreVRs ; jmpbuf has not moved
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60
61 ; jmp_buf was moved since setjmp (or is uninitialized.)
62 ; We must move VRs and FPRs to be quadword aligned at present address.
63
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64 stg r3,JMP_addr_at_setjmp(r3) ; update, in case we longjmp to this again
65 mr r31,r4 ; save "val" arg across memmove
66 mr r30,r3 ; and jmp_buf ptr
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67 addi r3,r3,JMP_vr_base_addr
68 addi r4,r6,JMP_vr_base_addr
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69 clrrgi r3,r3,4 ; r3 <- QW aligned addr where they should be
70 clrrgi r4,r4,4 ; r4 <- QW aligned addr where they originally were
71 sub r7,r4,r6 ; r7 <- offset of VRs/FPRs within jmp_buf
72 add r4,r30,r7 ; r4 <- where they are now
3b2a1fe8 73 li r5,(JMP_buf_end - JMP_vr_base_addr)
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74
75 MI_CALL_EXTERNAL(_memmove)
76
77 mr r3,r30 ; restore parameters
78 mr r4,r31
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79
80 ; Restore VRs iff any
59e0d9fe 81 ; cr2 - beq if AltiVec not available
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82
83LRestoreVRs:
59e0d9fe 84 lg r0,JMP_vrsave(r3) ; get VRSAVE at setjmp()
3b2a1fe8 85 addi r6,r3,JMP_vr_base_addr
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86 beq-- cr2,LRestoreFPRs ; AltiVec not available so skip
87 cmpwi r0,0 ; any live VRs?
88 mtspr VRSave,r0 ; update VRSAVE whether 0 or not
89 beq++ LRestoreFPRs ; VRSAVE is 0 so no VRs to reload
90 lvx v20,0,r6
91 li r7,16*1
92 lvx v21,r7,r6
93 li r7,16*2
94 lvx v22,r7,r6
95 li r7,16*3
96 lvx v23,r7,r6
97 li r7,16*4
98 lvx v24,r7,r6
99 li r7,16*5
100 lvx v25,r7,r6
101 li r7,16*6
102 lvx v26,r7,r6
103 li r7,16*7
104 lvx v27,r7,r6
105 li r7,16*8
106 lvx v28,r7,r6
107 li r7,16*9
108 lvx v29,r7,r6
109 li r7,16*10
110 lvx v30,r7,r6
111 li r7,16*11
112 lvx v31,r7,r6
3b2a1fe8 113
59e0d9fe 114 ; Restore FPRs
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115
116LRestoreFPRs:
3b2a1fe8 117 addi r6,r3,JMP_fp_base_addr
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118 lfd f0,JMP_fpscr(r3) ; get FPSCR from non-sliding section of jmpbuf
119 clrrgi r6,r6,4 ; mask off low 4 bits to qw align
120 lfd f14,0*8(r6)
121 lfd f15,1*8(r6)
122 lfd f16,2*8(r6)
123 lfd f17,3*8(r6)
124 lfd f18,4*8(r6)
125 lfd f19,5*8(r6)
126 lfd f20,6*8(r6)
127 lfd f21,7*8(r6)
128 lfd f22,8*8(r6)
129 lfd f23,9*8(r6)
130 lfd f24,10*8(r6)
131 lfd f25,11*8(r6)
132 lfd f26,12*8(r6)
133 lfd f27,13*8(r6)
134 lfd f28,14*8(r6)
135 lfd f29,15*8(r6)
136 lfd f30,16*8(r6)
137 lfd f31,17*8(r6)
138 mtfsf 0xFF,f0 ; restore entire FPSCR
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139
140 ; Restore GPRs
141
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142 lg r5, JMP_cr(r3) ; r5 <- CR
143 lg r6, JMP_lr(r3) ; r6 <- LR (ie, return addres)
144 cmplgi r4,0 ; is return value 0? (not permitted)
145 lg r1, JMP_r1 (r3)
146 lg r2, JMP_r2 (r3)
147 lg r13, JMP_r13(r3)
148 lg r14, JMP_r14(r3)
149 lg r15, JMP_r15(r3)
150 lg r16, JMP_r16(r3)
151 lg r17, JMP_r17(r3)
152 mtcrf 0x20,r5 ; restore cr2 (we only restore non-volatile CRs)
153 lg r18, JMP_r18(r3)
154 lg r19, JMP_r19(r3)
155 lg r20, JMP_r20(r3)
156 lg r21, JMP_r21(r3)
157 mtctr r6 ; set up return address, avoiding LR since it will mispredict
158 lg r22, JMP_r22(r3)
159 lg r23, JMP_r23(r3)
160 lg r24, JMP_r24(r3)
161 lg r25, JMP_r25(r3)
162 mtcrf 0x10,r5 ; restore cr3
163 lg r26, JMP_r26(r3)
164 lg r27, JMP_r27(r3)
165 lg r28, JMP_r28(r3)
166 lg r29, JMP_r29(r3)
167 mtcrf 0x08,r5 ; restore cr4
168 lg r30, JMP_r30(r3)
169 lg r31, JMP_r31(r3)
170 mr r3,r4 ; move return code into position (cr0 is set on r4)
171 bnectr++ ; return code was not 0
172 li r3, 1 ; cannot return zero from longjmp(), so return 1 instead
173 bctr
e9ce8d39 174