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1/*
2 * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
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6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
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8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
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22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25
26/* int _setjmp(jmp_buf env); */
27/*
28 * Copyright (c) 1998 Apple Computer, Inc. All rights reserved.
29 *
30 * File: sys/ppc/_setjmp.s
31 *
32 * Implements _setjmp()
33 *
34 * History:
35 * 8 September 1998 Matt Watson (mwatson@apple.com)
36 * Created. Derived from setjmp.s
37 */
38
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39/* We use mode-independent "g" opcodes such as "stg", and/or
40 * mode-independent macros such as MI_GET_ADDRESS. These expand
41 * into word operations when targeting __ppc__, and into doubleword
42 * operations when targeting __ppc64__.
43 */
44#include <architecture/ppc/mode_independent_asm.h>
45
46#define __APPLE_API_PRIVATE
47#include <machine/cpu_capabilities.h>
48#undef __APPLE_API_PRIVATE
3b2a1fe8 49
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50#include "_setjmp.h"
51
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52#define VRSave 256
53
3b2a1fe8 54
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55MI_ENTRY_POINT(__setjmp)
56 lbz r7, _COMM_PAGE_ALTIVEC(0) ; get "AltiVec available" flag
3b2a1fe8 57
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58 stg r1, JMP_r1(r3)
59 stg r2, JMP_r2(r3)
60 stg r13, JMP_r13(r3)
61 stg r14, JMP_r14(r3)
62 stg r15, JMP_r15(r3)
63 stg r16, JMP_r16(r3)
64 stg r17, JMP_r17(r3)
65 stg r18, JMP_r18(r3)
66 stg r19, JMP_r19(r3)
67 mfcr r0 ; we only need to save cr2-cr4
68 stg r20, JMP_r20(r3)
69 stg r21, JMP_r21(r3)
70 stg r22, JMP_r22(r3)
71 stg r23, JMP_r23(r3)
72 stg r24, JMP_r24(r3)
73 mflr r5
74 stg r25, JMP_r25(r3)
75 stg r26, JMP_r26(r3)
76 stg r27, JMP_r27(r3)
77 stg r28, JMP_r28(r3)
78 stg r29, JMP_r29(r3)
79 stg r30, JMP_r30(r3)
80 stg r31, JMP_r31(r3)
81 stg r0, JMP_cr(r3)
82 stg r5, JMP_lr(r3)
3b2a1fe8 83
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84 addi r6,r3,JMP_fp_base_addr ; point to base of FPR save area
85 stg r3,JMP_addr_at_setjmp(r3) ; remember original address of jmpbuf
86 clrrgi r6,r6,4 ; mask off low 4 bits to qw align
87 mffs f0 ; get FPSCR
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88 stfd f14,0*8(r6)
89 stfd f15,1*8(r6)
90 stfd f16,2*8(r6)
91 stfd f17,3*8(r6)
92 stfd f18,4*8(r6)
93 stfd f19,5*8(r6)
94 stfd f20,6*8(r6)
95 stfd f21,7*8(r6)
96 stfd f22,8*8(r6)
97 stfd f23,9*8(r6)
98 stfd f24,10*8(r6)
99 stfd f25,11*8(r6)
100 stfd f26,12*8(r6)
101 stfd f27,13*8(r6)
102 stfd f28,14*8(r6)
103 stfd f29,15*8(r6)
104 stfd f30,16*8(r6)
105 stfd f31,17*8(r6)
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106 stfd f0,JMP_fpscr(r3) ; save fpscr in non-sliding region of jmpbuf
107
108 cmpwi r7,0 ; is AltiVec available? (test _COMM_PAGE_ALTIVEC)
109 addi r6,r3,JMP_vr_base_addr ; get base address of VR save area
110 addi r8,r3,JMP_vrsave ; we'll need this address below
111 li r3,0 ; set return value (always 0 on setjmp)
112 beqlr-- ; exit if no Altivec
113
114 mfspr r4,VRSave ; AltiVec available, so get VRSAVE mask
115 andi. r0,r4,0xFFF ; we only care about v20-v31
116 stg r0,0(r8) ; save effective VRSAVE in JMP_vrsave
117 beqlr++ ; if no live non-volatile VRs, we're done
118
119 stvx v20,0,r6
120 li r4,16*1
121 stvx v21,r4,r6
122 li r4,16*2
123 stvx v22,r4,r6
124 li r4,16*3
125 stvx v23,r4,r6
126 li r4,16*4
127 stvx v24,r4,r6
128 li r4,16*5
129 stvx v25,r4,r6
130 li r4,16*6
131 stvx v26,r4,r6
132 li r4,16*7
133 stvx v27,r4,r6
134 li r4,16*8
135 stvx v28,r4,r6
136 li r4,16*9
137 stvx v29,r4,r6
138 li r4,16*10
139 stvx v30,r4,r6
140 li r4,16*11
141 stvx v31,r4,r6
3b2a1fe8 142
59e0d9fe 143 blr
e9ce8d39 144