+#ifndef CPU_SUBTYPE_X86_64_H
+ #define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t) 8)
+#endif
+
+#define UNWIND_ARM_MODE_MASK 0x0F000000
+#define UNWIND_ARM_MODE_FRAME 0x01000000
+#define UNWIND_ARM_MODE_FRAME_D 0x02000000
+#define UNWIND_ARM_MODE_DWARF 0x04000000
+
+#define UNWIND_ARM_FRAME_STACK_ADJUST_MASK 0x00C00000
+
+#define UNWIND_ARM_FRAME_FIRST_PUSH_R4 0x00000001
+#define UNWIND_ARM_FRAME_FIRST_PUSH_R5 0x00000002
+#define UNWIND_ARM_FRAME_FIRST_PUSH_R6 0x00000004
+
+#define UNWIND_ARM_FRAME_SECOND_PUSH_R8 0x00000008
+#define UNWIND_ARM_FRAME_SECOND_PUSH_R9 0x00000010
+#define UNWIND_ARM_FRAME_SECOND_PUSH_R10 0x00000020
+#define UNWIND_ARM_FRAME_SECOND_PUSH_R11 0x00000040
+#define UNWIND_ARM_FRAME_SECOND_PUSH_R12 0x00000080
+
+#define UNWIND_ARM_FRAME_D_REG_COUNT_MASK 0x00000F00
+
+#define UNWIND_ARM_DWARF_SECTION_OFFSET 0x00FFFFFF
+
+
+// ( <opcode> (delta-uleb128)+ <zero> )+ <zero>
+#define DYLD_CACHE_ADJ_V1_POINTER_32 0x01
+#define DYLD_CACHE_ADJ_V1_POINTER_64 0x02
+#define DYLD_CACHE_ADJ_V1_ADRP 0x03
+#define DYLD_CACHE_ADJ_V1_ARM_THUMB_MOVT 0x10 // thru 0x1F
+#define DYLD_CACHE_ADJ_V1_ARM_MOVT 0x20 // thru 0x2F
+
+
+// Whole :== <new-marker> <count> FromToSection+
+// FromToSection :== <from-sect-index> <to-sect-index> <count> ToOffset+
+// ToOffset :== <to-sect-offset-delta> <count> FromOffset+
+// FromOffset :== <kind> <count> <from-sect-offset-delta>
+#define DYLD_CACHE_ADJ_V2_FORMAT 0x7F
+
+#define DYLD_CACHE_ADJ_V2_POINTER_32 0x01
+#define DYLD_CACHE_ADJ_V2_POINTER_64 0x02
+#define DYLD_CACHE_ADJ_V2_DELTA_32 0x03
+#define DYLD_CACHE_ADJ_V2_DELTA_64 0x04
+#define DYLD_CACHE_ADJ_V2_ARM64_ADRP 0x05
+#define DYLD_CACHE_ADJ_V2_ARM64_OFF12 0x06
+#define DYLD_CACHE_ADJ_V2_ARM64_BR26 0x07
+#define DYLD_CACHE_ADJ_V2_ARM_MOVW_MOVT 0x08
+#define DYLD_CACHE_ADJ_V2_ARM_BR24 0x09
+#define DYLD_CACHE_ADJ_V2_THUMB_MOVW_MOVT 0x0A
+#define DYLD_CACHE_ADJ_V2_THUMB_BR22 0x0B
+#define DYLD_CACHE_ADJ_V2_IMAGE_OFF_32 0x0C
+
+
+
+// kind target-address fixup-addr [adj]
+
+