JavaScriptCore-1218.0.1.tar.gz

[apple/javascriptcore.git] / assembler / X86Assembler.h

diff --git a/assembler/X86Assembler.h b/assembler/X86Assembler.h
index de23e4563a13bf076f2a30b54b279db29659315a..2883e0a4c26969be0e538d7458f0141c67c1d9c1 100644 (file)
--- a/assembler/X86Assembler.h
+++ b/assembler/X86Assembler.h
@@ -1,5 +1,5 @@
 /*
 /*

- * Copyright (C) 2008 Apple Inc. All rights reserved.
+ * Copyright (C) 2008, 2012 Apple Inc. All rights reserved.

  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions


@@ -26,11 +26,10 @@
 #ifndef X86Assembler_h
 #define X86Assembler_h
 
 #ifndef X86Assembler_h
 #define X86Assembler_h
 

-#include <wtf/Platform.h>
-
-#if ENABLE(ASSEMBLER) && (PLATFORM(X86) || PLATFORM(X86_64))
+#if ENABLE(ASSEMBLER) && (CPU(X86) || CPU(X86_64))

 
 #include "AssemblerBuffer.h"
 
 #include "AssemblerBuffer.h"

+#include "JITCompilationEffort.h"

 #include <stdint.h>
 #include <wtf/Assertions.h>
 #include <wtf/Vector.h>
 #include <stdint.h>
 #include <wtf/Assertions.h>
 #include <wtf/Vector.h>


@@ -38,12 +37,8 @@
 namespace JSC {
 
 inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(signed char)value; }
 namespace JSC {
 
 inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(signed char)value; }

-#if PLATFORM(X86_64)
-inline bool CAN_SIGN_EXTEND_32_64(intptr_t value) { return value == (intptr_t)(int32_t)value; }
-inline bool CAN_SIGN_EXTEND_U32_64(intptr_t value) { return value == (intptr_t)(uint32_t)value; }
-#endif

 
 

-namespace X86 {
+namespace X86Registers {

     typedef enum {
         eax,
         ecx,
     typedef enum {
         eax,
         ecx,


@@ -54,7 +49,7 @@ namespace X86 {
         esi,
         edi,
 
         esi,
         edi,
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

         r8,
         r9,
         r10,
         r8,
         r9,
         r10,


@@ -80,9 +75,33 @@ namespace X86 {
 
 class X86Assembler {
 public:
 
 class X86Assembler {
 public:

-    typedef X86::RegisterID RegisterID;
-    typedef X86::XMMRegisterID XMMRegisterID;
+    typedef X86Registers::RegisterID RegisterID;
+    typedef X86Registers::XMMRegisterID XMMRegisterID;
+    typedef XMMRegisterID FPRegisterID;
+
+    typedef enum {
+        ConditionO,
+        ConditionNO,
+        ConditionB,
+        ConditionAE,
+        ConditionE,
+        ConditionNE,
+        ConditionBE,
+        ConditionA,
+        ConditionS,
+        ConditionNS,
+        ConditionP,
+        ConditionNP,
+        ConditionL,
+        ConditionGE,
+        ConditionLE,
+        ConditionG,
+
+        ConditionC  = ConditionB,
+        ConditionNC = ConditionAE,
+    } Condition;

 
 

+private:

     typedef enum {
         OP_ADD_EvGv                     = 0x01,
         OP_ADD_GvEv                     = 0x03,
     typedef enum {
         OP_ADD_EvGv                     = 0x01,
         OP_ADD_GvEv                     = 0x03,


@@ -90,45 +109,54 @@ public:
         OP_OR_GvEv                      = 0x0B,
         OP_2BYTE_ESCAPE                 = 0x0F,
         OP_AND_EvGv                     = 0x21,
         OP_OR_GvEv                      = 0x0B,
         OP_2BYTE_ESCAPE                 = 0x0F,
         OP_AND_EvGv                     = 0x21,

+        OP_AND_GvEv                     = 0x23,

         OP_SUB_EvGv                     = 0x29,
         OP_SUB_GvEv                     = 0x2B,
         PRE_PREDICT_BRANCH_NOT_TAKEN    = 0x2E,
         OP_XOR_EvGv                     = 0x31,
         OP_SUB_EvGv                     = 0x29,
         OP_SUB_GvEv                     = 0x2B,
         PRE_PREDICT_BRANCH_NOT_TAKEN    = 0x2E,
         OP_XOR_EvGv                     = 0x31,

+        OP_XOR_GvEv                     = 0x33,

         OP_CMP_EvGv                     = 0x39,
         OP_CMP_GvEv                     = 0x3B,
         OP_CMP_EvGv                     = 0x39,
         OP_CMP_GvEv                     = 0x3B,

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

         PRE_REX                         = 0x40,
 #endif
         OP_PUSH_EAX                     = 0x50,
         OP_POP_EAX                      = 0x58,
         PRE_REX                         = 0x40,
 #endif
         OP_PUSH_EAX                     = 0x50,
         OP_POP_EAX                      = 0x58,

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

         OP_MOVSXD_GvEv                  = 0x63,
 #endif
         PRE_OPERAND_SIZE                = 0x66,
         PRE_SSE_66                      = 0x66,
         OP_PUSH_Iz                      = 0x68,
         OP_IMUL_GvEvIz                  = 0x69,
         OP_MOVSXD_GvEv                  = 0x63,
 #endif
         PRE_OPERAND_SIZE                = 0x66,
         PRE_SSE_66                      = 0x66,
         OP_PUSH_Iz                      = 0x68,
         OP_IMUL_GvEvIz                  = 0x69,

+        OP_GROUP1_EbIb                  = 0x80,

         OP_GROUP1_EvIz                  = 0x81,
         OP_GROUP1_EvIb                  = 0x83,
         OP_GROUP1_EvIz                  = 0x81,
         OP_GROUP1_EvIb                  = 0x83,

+        OP_TEST_EbGb                    = 0x84,

         OP_TEST_EvGv                    = 0x85,
         OP_XCHG_EvGv                    = 0x87,
         OP_TEST_EvGv                    = 0x85,
         OP_XCHG_EvGv                    = 0x87,

+        OP_MOV_EbGb                     = 0x88,

         OP_MOV_EvGv                     = 0x89,
         OP_MOV_GvEv                     = 0x8B,
         OP_LEA                          = 0x8D,
         OP_GROUP1A_Ev                   = 0x8F,
         OP_MOV_EvGv                     = 0x89,
         OP_MOV_GvEv                     = 0x8B,
         OP_LEA                          = 0x8D,
         OP_GROUP1A_Ev                   = 0x8F,

+        OP_NOP                          = 0x90,

         OP_CDQ                          = 0x99,
         OP_MOV_EAXOv                    = 0xA1,
         OP_MOV_OvEAX                    = 0xA3,
         OP_MOV_EAXIv                    = 0xB8,
         OP_GROUP2_EvIb                  = 0xC1,
         OP_RET                          = 0xC3,
         OP_CDQ                          = 0x99,
         OP_MOV_EAXOv                    = 0xA1,
         OP_MOV_OvEAX                    = 0xA3,
         OP_MOV_EAXIv                    = 0xB8,
         OP_GROUP2_EvIb                  = 0xC1,
         OP_RET                          = 0xC3,

+        OP_GROUP11_EvIb                 = 0xC6,

         OP_GROUP11_EvIz                 = 0xC7,
         OP_INT3                         = 0xCC,
         OP_GROUP2_Ev1                   = 0xD1,
         OP_GROUP2_EvCL                  = 0xD3,
         OP_GROUP11_EvIz                 = 0xC7,
         OP_INT3                         = 0xCC,
         OP_GROUP2_Ev1                   = 0xD1,
         OP_GROUP2_EvCL                  = 0xD3,

+        OP_ESCAPE_DD                    = 0xDD,

         OP_CALL_rel32                   = 0xE8,
         OP_JMP_rel32                    = 0xE9,
         PRE_SSE_F2                      = 0xF2,
         OP_CALL_rel32                   = 0xE8,
         OP_JMP_rel32                    = 0xE9,
         PRE_SSE_F2                      = 0xF2,

+        PRE_SSE_F3                      = 0xF3,

         OP_HLT                          = 0xF4,
         OP_GROUP3_EbIb                  = 0xF6,
         OP_GROUP3_Ev                    = 0xF7,
         OP_HLT                          = 0xF4,
         OP_GROUP3_EbIb                  = 0xF6,
         OP_GROUP3_Ev                    = 0xF7,


@@ -139,50 +167,68 @@ public:
     typedef enum {
         OP2_MOVSD_VsdWsd    = 0x10,
         OP2_MOVSD_WsdVsd    = 0x11,
     typedef enum {
         OP2_MOVSD_VsdWsd    = 0x10,
         OP2_MOVSD_WsdVsd    = 0x11,

+        OP2_MOVSS_VsdWsd    = 0x10,
+        OP2_MOVSS_WsdVsd    = 0x11,

         OP2_CVTSI2SD_VsdEd  = 0x2A,
         OP2_CVTTSD2SI_GdWsd = 0x2C,
         OP2_UCOMISD_VsdWsd  = 0x2E,
         OP2_ADDSD_VsdWsd    = 0x58,
         OP2_MULSD_VsdWsd    = 0x59,
         OP2_CVTSI2SD_VsdEd  = 0x2A,
         OP2_CVTTSD2SI_GdWsd = 0x2C,
         OP2_UCOMISD_VsdWsd  = 0x2E,
         OP2_ADDSD_VsdWsd    = 0x58,
         OP2_MULSD_VsdWsd    = 0x59,

+        OP2_CVTSD2SS_VsdWsd = 0x5A,
+        OP2_CVTSS2SD_VsdWsd = 0x5A,

         OP2_SUBSD_VsdWsd    = 0x5C,
         OP2_SUBSD_VsdWsd    = 0x5C,

+        OP2_DIVSD_VsdWsd    = 0x5E,
+        OP2_SQRTSD_VsdWsd   = 0x51,
+        OP2_ANDNPD_VpdWpd   = 0x55,
+        OP2_XORPD_VpdWpd    = 0x57,

         OP2_MOVD_VdEd       = 0x6E,
         OP2_MOVD_EdVd       = 0x7E,
         OP2_MOVD_VdEd       = 0x6E,
         OP2_MOVD_EdVd       = 0x7E,

-        OP2_JO_rel32        = 0x80,
-        OP2_JB_rel32        = 0x82,
-        OP2_JAE_rel32       = 0x83,
-        OP2_JE_rel32        = 0x84,
-        OP2_JNE_rel32       = 0x85,
-        OP2_JBE_rel32       = 0x86,
-        OP2_JA_rel32        = 0x87,
-        OP2_JS_rel32        = 0x88,
-        OP2_JP_rel32        = 0x8A,
-        OP2_JL_rel32        = 0x8C,
-        OP2_JGE_rel32       = 0x8D,
-        OP2_JLE_rel32       = 0x8E,
-        OP2_JG_rel32        = 0x8F,
-        OP_SETE             = 0x94,
-        OP_SETNE            = 0x95,
+        OP2_JCC_rel32       = 0x80,
+        OP_SETCC            = 0x90,

         OP2_IMUL_GvEv       = 0xAF,
         OP2_MOVZX_GvEb      = 0xB6,
         OP2_IMUL_GvEv       = 0xAF,
         OP2_MOVZX_GvEb      = 0xB6,

+        OP2_MOVSX_GvEb      = 0xBE,

         OP2_MOVZX_GvEw      = 0xB7,
         OP2_MOVZX_GvEw      = 0xB7,

+        OP2_MOVSX_GvEw      = 0xBF,

         OP2_PEXTRW_GdUdIb   = 0xC5,
         OP2_PEXTRW_GdUdIb   = 0xC5,

+        OP2_PSLLQ_UdqIb     = 0x73,
+        OP2_PSRLQ_UdqIb     = 0x73,
+        OP2_POR_VdqWdq      = 0XEB,

     } TwoByteOpcodeID;
 
     } TwoByteOpcodeID;
 

+    TwoByteOpcodeID jccRel32(Condition cond)
+    {
+        return (TwoByteOpcodeID)(OP2_JCC_rel32 + cond);
+    }
+
+    TwoByteOpcodeID setccOpcode(Condition cond)
+    {
+        return (TwoByteOpcodeID)(OP_SETCC + cond);
+    }
+

     typedef enum {
         GROUP1_OP_ADD = 0,
         GROUP1_OP_OR  = 1,
     typedef enum {
         GROUP1_OP_ADD = 0,
         GROUP1_OP_OR  = 1,

+        GROUP1_OP_ADC = 2,

         GROUP1_OP_AND = 4,
         GROUP1_OP_SUB = 5,
         GROUP1_OP_XOR = 6,
         GROUP1_OP_CMP = 7,
 
         GROUP1A_OP_POP = 0,
         GROUP1_OP_AND = 4,
         GROUP1_OP_SUB = 5,
         GROUP1_OP_XOR = 6,
         GROUP1_OP_CMP = 7,
 
         GROUP1A_OP_POP = 0,

-
+        
+        GROUP2_OP_ROL = 0,
+        GROUP2_OP_ROR = 1,
+        GROUP2_OP_RCL = 2,
+        GROUP2_OP_RCR = 3,
+        

         GROUP2_OP_SHL = 4,
         GROUP2_OP_SHL = 4,

+        GROUP2_OP_SHR = 5,

         GROUP2_OP_SAR = 7,
 
         GROUP3_OP_TEST = 0,
         GROUP3_OP_NOT  = 2,
         GROUP2_OP_SAR = 7,
 
         GROUP3_OP_TEST = 0,
         GROUP3_OP_NOT  = 2,

+        GROUP3_OP_NEG  = 3,

         GROUP3_OP_IDIV = 7,
 
         GROUP5_OP_CALLN = 2,
         GROUP3_OP_IDIV = 7,
 
         GROUP5_OP_CALLN = 2,


@@ -190,56 +236,22 @@ public:
         GROUP5_OP_PUSH  = 6,
 
         GROUP11_MOV = 0,
         GROUP5_OP_PUSH  = 6,
 
         GROUP11_MOV = 0,

+
+        GROUP14_OP_PSLLQ = 6,
+        GROUP14_OP_PSRLQ = 2,
+
+        ESCAPE_DD_FSTP_doubleReal = 3,

     } GroupOpcodeID;
     
     } GroupOpcodeID;
     

-    // Opaque label types
-    
-private:

     class X86InstructionFormatter;
 public:
 
     class X86InstructionFormatter;
 public:
 

-    class JmpSrc {
-        friend class X86Assembler;
-        friend class X86InstructionFormatter;
-    public:
-        JmpSrc()
-            : m_offset(-1)
-        {
-        }
-
-    private:
-        JmpSrc(int offset)
-            : m_offset(offset)
-        {
-        }
-
-        int m_offset;
-    };
-    
-    class JmpDst {
-        friend class X86Assembler;
-        friend class X86InstructionFormatter;
-    public:
-        JmpDst()
-            : m_offset(-1)
-        {
-        }
-
-    private:
-        JmpDst(int offset)
-            : m_offset(offset)
-        {
-        }
-
-        int m_offset;
-    };
-

     X86Assembler()
     X86Assembler()

+        : m_indexOfLastWatchpoint(INT_MIN)
+        , m_indexOfTailOfLastWatchpoint(INT_MIN)

     {
     }
 
     {
     }
 

-    size_t size() const { return m_formatter.size(); }
-

     // Stack operations:
 
     void push_r(RegisterID reg)
     // Stack operations:
 
     void push_r(RegisterID reg)


@@ -270,6 +282,19 @@ public:
 
     // Arithmetic operations:
 
 
     // Arithmetic operations:
 

+#if !CPU(X86_64)
+    void adcl_im(int imm, const void* addr)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADC, addr);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_ADC, addr);
+            m_formatter.immediate32(imm);
+        }
+    }
+#endif
+

     void addl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_ADD_EvGv, src, dst);
     void addl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_ADD_EvGv, src, dst);


@@ -279,6 +304,18 @@ public:
     {
         m_formatter.oneByteOp(OP_ADD_GvEv, dst, base, offset);
     }
     {
         m_formatter.oneByteOp(OP_ADD_GvEv, dst, base, offset);
     }

+    
+#if !CPU(X86_64)
+    void addl_mr(const void* addr, RegisterID dst)
+    {
+        m_formatter.oneByteOp(OP_ADD_GvEv, dst, addr);
+    }
+#endif
+
+    void addl_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_ADD_EvGv, src, base, offset);
+    }

 
     void addl_ir(int imm, RegisterID dst)
     {
 
     void addl_ir(int imm, RegisterID dst)
     {


@@ -302,12 +339,17 @@ public:
         }
     }
 
         }
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void addq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_ADD_EvGv, src, dst);
     }
 
     void addq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_ADD_EvGv, src, dst);
     }
 

+    void addq_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp64(OP_ADD_GvEv, dst, base, offset);
+    }
+

     void addq_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void addq_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -318,8 +360,19 @@ public:
             m_formatter.immediate32(imm);
         }
     }
             m_formatter.immediate32(imm);
         }
     }

+
+    void addq_im(int imm, int offset, RegisterID base)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_ADD, base, offset);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_ADD, base, offset);
+            m_formatter.immediate32(imm);
+        }
+    }

 #else
 #else

-    void addl_im(int imm, void* addr)
+    void addl_im(int imm, const void* addr)

     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADD, addr);
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADD, addr);


@@ -336,6 +389,16 @@ public:
         m_formatter.oneByteOp(OP_AND_EvGv, src, dst);
     }
 
         m_formatter.oneByteOp(OP_AND_EvGv, src, dst);
     }
 

+    void andl_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp(OP_AND_GvEv, dst, base, offset);
+    }
+
+    void andl_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_AND_EvGv, src, base, offset);
+    }
+

     void andl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void andl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -347,7 +410,18 @@ public:
         }
     }
 
         }
     }
 

-#if PLATFORM(X86_64)
+    void andl_im(int imm, int offset, RegisterID base)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_AND, base, offset);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_AND, base, offset);
+            m_formatter.immediate32(imm);
+        }
+    }
+
+#if CPU(X86_64)

     void andq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_AND_EvGv, src, dst);
     void andq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_AND_EvGv, src, dst);


@@ -363,13 +437,46 @@ public:
             m_formatter.immediate32(imm);
         }
     }
             m_formatter.immediate32(imm);
         }
     }

+#else
+    void andl_im(int imm, const void* addr)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_AND, addr);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_AND, addr);
+            m_formatter.immediate32(imm);
+        }
+    }
+#endif
+
+    void negl_r(RegisterID dst)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NEG, dst);
+    }
+
+#if CPU(X86_64)
+    void negq_r(RegisterID dst)
+    {
+        m_formatter.oneByteOp64(OP_GROUP3_Ev, GROUP3_OP_NEG, dst);
+    }

 #endif
 
 #endif
 

+    void negl_m(int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NEG, base, offset);
+    }
+

     void notl_r(RegisterID dst)
     {
         m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NOT, dst);
     }
 
     void notl_r(RegisterID dst)
     {
         m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NOT, dst);
     }
 

+    void notl_m(int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NOT, base, offset);
+    }
+

     void orl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_OR_EvGv, src, dst);
     void orl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_OR_EvGv, src, dst);


@@ -380,6 +487,11 @@ public:
         m_formatter.oneByteOp(OP_OR_GvEv, dst, base, offset);
     }
 
         m_formatter.oneByteOp(OP_OR_GvEv, dst, base, offset);
     }
 

+    void orl_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_OR_EvGv, src, base, offset);
+    }
+

     void orl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void orl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -391,7 +503,18 @@ public:
         }
     }
 
         }
     }
 

-#if PLATFORM(X86_64)
+    void orl_im(int imm, int offset, RegisterID base)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_OR, base, offset);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_OR, base, offset);
+            m_formatter.immediate32(imm);
+        }
+    }
+
+#if CPU(X86_64)

     void orq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_OR_EvGv, src, dst);
     void orq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_OR_EvGv, src, dst);


@@ -407,6 +530,22 @@ public:
             m_formatter.immediate32(imm);
         }
     }
             m_formatter.immediate32(imm);
         }
     }

+#else
+    void orl_im(int imm, const void* addr)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_OR, addr);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_OR, addr);
+            m_formatter.immediate32(imm);
+        }
+    }
+
+    void orl_rm(RegisterID src, const void* addr)
+    {
+        m_formatter.oneByteOp(OP_OR_EvGv, src, addr);
+    }

 #endif
 
     void subl_rr(RegisterID src, RegisterID dst)
 #endif
 
     void subl_rr(RegisterID src, RegisterID dst)


@@ -419,6 +558,11 @@ public:
         m_formatter.oneByteOp(OP_SUB_GvEv, dst, base, offset);
     }
 
         m_formatter.oneByteOp(OP_SUB_GvEv, dst, base, offset);
     }
 

+    void subl_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_SUB_EvGv, src, base, offset);
+    }
+

     void subl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void subl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -441,7 +585,7 @@ public:
         }
     }
 
         }
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void subq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_SUB_EvGv, src, dst);
     void subq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_SUB_EvGv, src, dst);


@@ -458,7 +602,7 @@ public:
         }
     }
 #else
         }
     }
 #else

-    void subl_im(int imm, void* addr)
+    void subl_im(int imm, const void* addr)

     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_SUB, addr);
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_SUB, addr);


@@ -475,6 +619,27 @@ public:
         m_formatter.oneByteOp(OP_XOR_EvGv, src, dst);
     }
 
         m_formatter.oneByteOp(OP_XOR_EvGv, src, dst);
     }
 

+    void xorl_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp(OP_XOR_GvEv, dst, base, offset);
+    }
+
+    void xorl_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_XOR_EvGv, src, base, offset);
+    }
+
+    void xorl_im(int imm, int offset, RegisterID base)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_XOR, base, offset);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_XOR, base, offset);
+            m_formatter.immediate32(imm);
+        }
+    }
+

     void xorl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void xorl_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -486,7 +651,7 @@ public:
         }
     }
 
         }
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void xorq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_XOR_EvGv, src, dst);
     void xorq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_XOR_EvGv, src, dst);


@@ -502,6 +667,22 @@ public:
             m_formatter.immediate32(imm);
         }
     }
             m_formatter.immediate32(imm);
         }
     }

+    
+    void xorq_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp64(OP_XOR_EvGv, src, base, offset);
+    }
+    
+    void rorq_i8r(int imm, RegisterID dst)
+    {
+        if (imm == 1)
+            m_formatter.oneByteOp64(OP_GROUP2_Ev1, GROUP2_OP_ROR, dst);
+        else {
+            m_formatter.oneByteOp64(OP_GROUP2_EvIb, GROUP2_OP_ROR, dst);
+            m_formatter.immediate8(imm);
+        }
+    }
+

 #endif
 
     void sarl_i8r(int imm, RegisterID dst)
 #endif
 
     void sarl_i8r(int imm, RegisterID dst)


@@ -518,6 +699,21 @@ public:
     {
         m_formatter.oneByteOp(OP_GROUP2_EvCL, GROUP2_OP_SAR, dst);
     }
     {
         m_formatter.oneByteOp(OP_GROUP2_EvCL, GROUP2_OP_SAR, dst);
     }

+    
+    void shrl_i8r(int imm, RegisterID dst)
+    {
+        if (imm == 1)
+            m_formatter.oneByteOp(OP_GROUP2_Ev1, GROUP2_OP_SHR, dst);
+        else {
+            m_formatter.oneByteOp(OP_GROUP2_EvIb, GROUP2_OP_SHR, dst);
+            m_formatter.immediate8(imm);
+        }
+    }
+    
+    void shrl_CLr(RegisterID dst)
+    {
+        m_formatter.oneByteOp(OP_GROUP2_EvCL, GROUP2_OP_SHR, dst);
+    }

 
     void shll_i8r(int imm, RegisterID dst)
     {
 
     void shll_i8r(int imm, RegisterID dst)
     {


@@ -534,7 +730,7 @@ public:
         m_formatter.oneByteOp(OP_GROUP2_EvCL, GROUP2_OP_SHL, dst);
     }
 
         m_formatter.oneByteOp(OP_GROUP2_EvCL, GROUP2_OP_SHL, dst);
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void sarq_CLr(RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_GROUP2_EvCL, GROUP2_OP_SAR, dst);
     void sarq_CLr(RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_GROUP2_EvCL, GROUP2_OP_SAR, dst);


@@ -555,7 +751,12 @@ public:
     {
         m_formatter.twoByteOp(OP2_IMUL_GvEv, dst, src);
     }
     {
         m_formatter.twoByteOp(OP2_IMUL_GvEv, dst, src);
     }

-    
+
+    void imull_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_IMUL_GvEv, dst, base, offset);
+    }
+

     void imull_i32r(RegisterID src, int32_t value, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_IMUL_GvEvIz, dst, src);
     void imull_i32r(RegisterID src, int32_t value, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_IMUL_GvEvIz, dst, src);


@@ -600,7 +801,7 @@ public:
         m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, dst);
         m_formatter.immediate32(imm);
     }
         m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, dst);
         m_formatter.immediate32(imm);
     }

-
+    

     void cmpl_im(int imm, int offset, RegisterID base)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void cmpl_im(int imm, int offset, RegisterID base)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -611,6 +812,26 @@ public:
             m_formatter.immediate32(imm);
         }
     }
             m_formatter.immediate32(imm);
         }
     }

+    
+    void cmpb_im(int imm, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_GROUP1_EbIb, GROUP1_OP_CMP, base, offset);
+        m_formatter.immediate8(imm);
+    }
+    
+    void cmpb_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.oneByteOp(OP_GROUP1_EbIb, GROUP1_OP_CMP, base, index, scale, offset);
+        m_formatter.immediate8(imm);
+    }
+    
+#if CPU(X86)
+    void cmpb_im(int imm, const void* addr)
+    {
+        m_formatter.oneByteOp(OP_GROUP1_EbIb, GROUP1_OP_CMP, addr);
+        m_formatter.immediate8(imm);
+    }
+#endif

 
     void cmpl_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
     {
 
     void cmpl_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
     {


@@ -629,7 +850,7 @@ public:
         m_formatter.immediate32(imm);
     }
 
         m_formatter.immediate32(imm);
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void cmpq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_CMP_EvGv, src, dst);
     void cmpq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_CMP_EvGv, src, dst);


@@ -640,6 +861,11 @@ public:
         m_formatter.oneByteOp64(OP_CMP_EvGv, src, base, offset);
     }
 
         m_formatter.oneByteOp64(OP_CMP_EvGv, src, base, offset);
     }
 

+    void cmpq_mr(int offset, RegisterID base, RegisterID src)
+    {
+        m_formatter.oneByteOp64(OP_CMP_GvEv, src, base, offset);
+    }
+

     void cmpq_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
     void cmpq_ir(int imm, RegisterID dst)
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {


@@ -673,12 +899,12 @@ public:
         }
     }
 #else
         }
     }
 #else

-    void cmpl_rm(RegisterID reg, void* addr)
+    void cmpl_rm(RegisterID reg, const void* addr)

     {
         m_formatter.oneByteOp(OP_CMP_EvGv, reg, addr);
     }
 
     {
         m_formatter.oneByteOp(OP_CMP_EvGv, reg, addr);
     }
 

-    void cmpl_im(int imm, void* addr)
+    void cmpl_im(int imm, const void* addr)

     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, addr);
     {
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, addr);


@@ -690,12 +916,38 @@ public:
     }
 #endif
 
     }
 #endif
 

+    void cmpw_ir(int imm, RegisterID dst)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.prefix(PRE_OPERAND_SIZE);
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, dst);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.prefix(PRE_OPERAND_SIZE);
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, dst);
+            m_formatter.immediate16(imm);
+        }
+    }
+

     void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
     {
         m_formatter.prefix(PRE_OPERAND_SIZE);
         m_formatter.oneByteOp(OP_CMP_EvGv, src, base, index, scale, offset);
     }
 
     void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
     {
         m_formatter.prefix(PRE_OPERAND_SIZE);
         m_formatter.oneByteOp(OP_CMP_EvGv, src, base, index, scale, offset);
     }
 

+    void cmpw_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        if (CAN_SIGN_EXTEND_8_32(imm)) {
+            m_formatter.prefix(PRE_OPERAND_SIZE);
+            m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, index, scale, offset);
+            m_formatter.immediate8(imm);
+        } else {
+            m_formatter.prefix(PRE_OPERAND_SIZE);
+            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, index, scale, offset);
+            m_formatter.immediate16(imm);
+        }
+    }
+

     void testl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_TEST_EvGv, src, dst);
     void testl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_TEST_EvGv, src, dst);


@@ -713,18 +965,48 @@ public:
         m_formatter.immediate32(imm);
     }
 
         m_formatter.immediate32(imm);
     }
 

+    void testb_rr(RegisterID src, RegisterID dst)
+    {
+        m_formatter.oneByteOp8(OP_TEST_EbGb, src, dst);
+    }
+
+    void testb_im(int imm, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_EbIb, GROUP3_OP_TEST, base, offset);
+        m_formatter.immediate8(imm);
+    }
+    
+    void testb_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_EbIb, GROUP3_OP_TEST, base, index, scale, offset);
+        m_formatter.immediate8(imm);
+    }
+
+#if CPU(X86)
+    void testb_im(int imm, const void* addr)
+    {
+        m_formatter.oneByteOp(OP_GROUP3_EbIb, GROUP3_OP_TEST, addr);
+        m_formatter.immediate8(imm);
+    }
+#endif
+

     void testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)
     {
         m_formatter.oneByteOp(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, index, scale, offset);
         m_formatter.immediate32(imm);
     }
 
     void testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)
     {
         m_formatter.oneByteOp(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, index, scale, offset);
         m_formatter.immediate32(imm);
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void testq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_TEST_EvGv, src, dst);
     }
 
     void testq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_TEST_EvGv, src, dst);
     }
 

+    void testq_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp64(OP_TEST_EvGv, src, base, offset);
+    }
+

     void testq_i32r(int imm, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_GROUP3_EvIz, GROUP3_OP_TEST, dst);
     void testq_i32r(int imm, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_GROUP3_EvIz, GROUP3_OP_TEST, dst);


@@ -744,15 +1026,26 @@ public:
     }
 #endif 
 
     }
 #endif 
 

+    void testw_rr(RegisterID src, RegisterID dst)
+    {
+        m_formatter.prefix(PRE_OPERAND_SIZE);
+        m_formatter.oneByteOp(OP_TEST_EvGv, src, dst);
+    }
+    

     void testb_i8r(int imm, RegisterID dst)
     {
         m_formatter.oneByteOp8(OP_GROUP3_EbIb, GROUP3_OP_TEST, dst);
         m_formatter.immediate8(imm);
     }
 
     void testb_i8r(int imm, RegisterID dst)
     {
         m_formatter.oneByteOp8(OP_GROUP3_EbIb, GROUP3_OP_TEST, dst);
         m_formatter.immediate8(imm);
     }
 

+    void setCC_r(Condition cond, RegisterID dst)
+    {
+        m_formatter.twoByteOp8(setccOpcode(cond), (GroupOpcodeID)0, dst);
+    }
+

     void sete_r(RegisterID dst)
     {
     void sete_r(RegisterID dst)
     {

-        m_formatter.twoByteOp8(OP_SETE, (GroupOpcodeID)0, dst);
+        m_formatter.twoByteOp8(setccOpcode(ConditionE), (GroupOpcodeID)0, dst);

     }
 
     void setz_r(RegisterID dst)
     }
 
     void setz_r(RegisterID dst)


@@ -762,7 +1055,7 @@ public:
 
     void setne_r(RegisterID dst)
     {
 
     void setne_r(RegisterID dst)
     {

-        m_formatter.twoByteOp8(OP_SETNE, (GroupOpcodeID)0, dst);
+        m_formatter.twoByteOp8(setccOpcode(ConditionNE), (GroupOpcodeID)0, dst);

     }
 
     void setnz_r(RegisterID dst)
     }
 
     void setnz_r(RegisterID dst)


@@ -777,12 +1070,17 @@ public:
         m_formatter.oneByteOp(OP_CDQ);
     }
 
         m_formatter.oneByteOp(OP_CDQ);
     }
 

+    void fstpl(int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_ESCAPE_DD, ESCAPE_DD_FSTP_doubleReal, base, offset);
+    }
+

     void xchgl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_XCHG_EvGv, src, dst);
     }
 
     void xchgl_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp(OP_XCHG_EvGv, src, dst);
     }
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

     void xchgq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_XCHG_EvGv, src, dst);
     void xchgq_rr(RegisterID src, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_XCHG_EvGv, src, dst);


@@ -809,10 +1107,10 @@ public:
         m_formatter.oneByteOp(OP_MOV_EvGv, src, base, index, scale, offset);
     }
     
         m_formatter.oneByteOp(OP_MOV_EvGv, src, base, index, scale, offset);
     }
     

-    void movl_mEAX(void* addr)
+    void movl_mEAX(const void* addr)

     {
         m_formatter.oneByteOp(OP_MOV_EAXOv);
     {
         m_formatter.oneByteOp(OP_MOV_EAXOv);

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

         m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
 #else
         m_formatter.immediate32(reinterpret_cast<int>(addr));
         m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
 #else
         m_formatter.immediate32(reinterpret_cast<int>(addr));


@@ -828,6 +1126,11 @@ public:
     {
         m_formatter.oneByteOp_disp32(OP_MOV_GvEv, dst, base, offset);
     }
     {
         m_formatter.oneByteOp_disp32(OP_MOV_GvEv, dst, base, offset);
     }

+    
+    void movl_mr_disp8(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp_disp8(OP_MOV_GvEv, dst, base, offset);
+    }

 
     void movl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
     {
 
     void movl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
     {


@@ -845,44 +1148,90 @@ public:
         m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, base, offset);
         m_formatter.immediate32(imm);
     }
         m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, base, offset);
         m_formatter.immediate32(imm);
     }

-
-    void movl_EAXm(void* addr)
+    
+    void movl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)

     {
     {

-        m_formatter.oneByteOp(OP_MOV_OvEAX);
-#if PLATFORM(X86_64)
-        m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
-#else
-        m_formatter.immediate32(reinterpret_cast<int>(addr));
-#endif
+        m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, base, index, scale, offset);
+        m_formatter.immediate32(imm);

     }
 
     }
 

-#if PLATFORM(X86_64)
-    void movq_rr(RegisterID src, RegisterID dst)
+#if !CPU(X86_64)
+    void movb_i8m(int imm, const void* addr)

     {
     {

-        m_formatter.oneByteOp64(OP_MOV_EvGv, src, dst);
+        ASSERT(-128 <= imm && imm < 128);
+        m_formatter.oneByteOp(OP_GROUP11_EvIb, GROUP11_MOV, addr);
+        m_formatter.immediate8(imm);

     }
     }

+#endif

 
 

-    void movq_rm(RegisterID src, int offset, RegisterID base)
+    void movb_i8m(int imm, int offset, RegisterID base)

     {
     {

-        m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, offset);
+        ASSERT(-128 <= imm && imm < 128);
+        m_formatter.oneByteOp(OP_GROUP11_EvIb, GROUP11_MOV, base, offset);
+        m_formatter.immediate8(imm);

     }
 
     }
 

-    void movq_rm_disp32(RegisterID src, int offset, RegisterID base)
+    void movb_i8m(int imm, int offset, RegisterID base, RegisterID index, int scale)

     {
     {

-        m_formatter.oneByteOp64_disp32(OP_MOV_EvGv, src, base, offset);
+        ASSERT(-128 <= imm && imm < 128);
+        m_formatter.oneByteOp(OP_GROUP11_EvIb, GROUP11_MOV, base, index, scale, offset);
+        m_formatter.immediate8(imm);

     }
     }

-
-    void movq_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
+    
+    void movb_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)

     {
     {

-        m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, index, scale, offset);
+        m_formatter.oneByteOp8(OP_MOV_EbGb, src, base, index, scale, offset);

     }
     }

-
-    void movq_mEAX(void* addr)
+    
+    void movw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.prefix(PRE_OPERAND_SIZE);
+        m_formatter.oneByteOp8(OP_MOV_EvGv, src, base, index, scale, offset);
+    }
+
+    void movl_EAXm(const void* addr)
+    {
+        m_formatter.oneByteOp(OP_MOV_OvEAX);
+#if CPU(X86_64)
+        m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
+#else
+        m_formatter.immediate32(reinterpret_cast<int>(addr));
+#endif
+    }
+
+#if CPU(X86_64)
+    void movq_rr(RegisterID src, RegisterID dst)
+    {
+        m_formatter.oneByteOp64(OP_MOV_EvGv, src, dst);
+    }
+
+    void movq_rm(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, offset);
+    }
+
+    void movq_rm_disp32(RegisterID src, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp64_disp32(OP_MOV_EvGv, src, base, offset);
+    }
+
+    void movq_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, index, scale, offset);
+    }
+
+    void movq_mEAX(const void* addr)

     {
         m_formatter.oneByteOp64(OP_MOV_EAXOv);
         m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
     }
 
     {
         m_formatter.oneByteOp64(OP_MOV_EAXOv);
         m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
     }
 

+    void movq_EAXm(const void* addr)
+    {
+        m_formatter.oneByteOp64(OP_MOV_OvEAX);
+        m_formatter.immediate64(reinterpret_cast<int64_t>(addr));
+    }
+

     void movq_mr(int offset, RegisterID base, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, offset);
     void movq_mr(int offset, RegisterID base, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, offset);


@@ -893,11 +1242,22 @@ public:
         m_formatter.oneByteOp64_disp32(OP_MOV_GvEv, dst, base, offset);
     }
 
         m_formatter.oneByteOp64_disp32(OP_MOV_GvEv, dst, base, offset);
     }
 

+    void movq_mr_disp8(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp64_disp8(OP_MOV_GvEv, dst, base, offset);
+    }
+

     void movq_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, index, scale, offset);
     }
 
     void movq_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, index, scale, offset);
     }
 

+    void movq_i32m(int imm, int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp64(OP_GROUP11_EvIz, GROUP11_MOV, base, offset);
+        m_formatter.immediate32(imm);
+    }
+

     void movq_i64r(int64_t imm, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_EAXIv, dst);
     void movq_i64r(int64_t imm, RegisterID dst)
     {
         m_formatter.oneByteOp64(OP_MOV_EAXIv, dst);


@@ -911,15 +1271,23 @@ public:
     
     
 #else
     
     
 #else

-    void movl_mr(void* addr, RegisterID dst)
+    void movl_rm(RegisterID src, const void* addr)
+    {
+        if (src == X86Registers::eax)
+            movl_EAXm(addr);
+        else 
+            m_formatter.oneByteOp(OP_MOV_EvGv, src, addr);
+    }
+    
+    void movl_mr(const void* addr, RegisterID dst)

     {
     {

-        if (dst == X86::eax)
+        if (dst == X86Registers::eax)

             movl_mEAX(addr);
         else
             m_formatter.oneByteOp(OP_MOV_GvEv, dst, addr);
     }
 
             movl_mEAX(addr);
         else
             m_formatter.oneByteOp(OP_MOV_GvEv, dst, addr);
     }
 

-    void movl_i32m(int imm, void* addr)
+    void movl_i32m(int imm, const void* addr)

     {
         m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, addr);
         m_formatter.immediate32(imm);
     {
         m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, addr);
         m_formatter.immediate32(imm);


@@ -936,6 +1304,36 @@ public:
         m_formatter.twoByteOp(OP2_MOVZX_GvEw, dst, base, index, scale, offset);
     }
 
         m_formatter.twoByteOp(OP2_MOVZX_GvEw, dst, base, index, scale, offset);
     }
 

+    void movswl_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVSX_GvEw, dst, base, offset);
+    }
+
+    void movswl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVSX_GvEw, dst, base, index, scale, offset);
+    }
+
+    void movzbl_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVZX_GvEb, dst, base, offset);
+    }
+    
+    void movzbl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVZX_GvEb, dst, base, index, scale, offset);
+    }
+
+    void movsbl_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVSX_GvEb, dst, base, offset);
+    }
+    
+    void movsbl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
+    {
+        m_formatter.twoByteOp(OP2_MOVSX_GvEb, dst, base, index, scale, offset);
+    }
+

     void movzbl_rr(RegisterID src, RegisterID dst)
     {
         // In 64-bit, this may cause an unnecessary REX to be planted (if the dst register
     void movzbl_rr(RegisterID src, RegisterID dst)
     {
         // In 64-bit, this may cause an unnecessary REX to be planted (if the dst register


@@ -948,117 +1346,156 @@ public:
     {
         m_formatter.oneByteOp(OP_LEA, dst, base, offset);
     }
     {
         m_formatter.oneByteOp(OP_LEA, dst, base, offset);
     }

+#if CPU(X86_64)
+    void leaq_mr(int offset, RegisterID base, RegisterID dst)
+    {
+        m_formatter.oneByteOp64(OP_LEA, dst, base, offset);
+    }
+#endif

 
     // Flow control:
 
 
     // Flow control:
 

-    JmpSrc call()
+    AssemblerLabel call()

     {
         m_formatter.oneByteOp(OP_CALL_rel32);
         return m_formatter.immediateRel32();
     }
     
     {
         m_formatter.oneByteOp(OP_CALL_rel32);
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc call(RegisterID dst)
+    AssemblerLabel call(RegisterID dst)

     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_CALLN, dst);
     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_CALLN, dst);

-        return JmpSrc(m_formatter.size());
+        return m_formatter.label();
+    }
+    
+    void call_m(int offset, RegisterID base)
+    {
+        m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_CALLN, base, offset);

     }
 
     }
 

-    JmpSrc jmp()
+    AssemblerLabel jmp()

     {
         m_formatter.oneByteOp(OP_JMP_rel32);
         return m_formatter.immediateRel32();
     }
     
     {
         m_formatter.oneByteOp(OP_JMP_rel32);
         return m_formatter.immediateRel32();
     }
     

-    void jmp_r(RegisterID dst)
+    // Return a AssemblerLabel so we have a label to the jump, so we can use this
+    // To make a tail recursive call on x86-64.  The MacroAssembler
+    // really shouldn't wrap this as a Jump, since it can't be linked. :-/
+    AssemblerLabel jmp_r(RegisterID dst)

     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, dst);
     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, dst);

+        return m_formatter.label();

     }
     
     void jmp_m(int offset, RegisterID base)
     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, base, offset);
     }
     }
     
     void jmp_m(int offset, RegisterID base)
     {
         m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, base, offset);
     }

+    
+#if !CPU(X86_64)
+    void jmp_m(const void* address)
+    {
+        m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, address);
+    }
+#endif

 
 

-    JmpSrc jne()
+    AssemblerLabel jne()

     {
     {

-        m_formatter.twoByteOp(OP2_JNE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionNE));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jnz()
+    AssemblerLabel jnz()

     {
         return jne();
     }
 
     {
         return jne();
     }
 

-    JmpSrc je()
+    AssemblerLabel je()

     {
     {

-        m_formatter.twoByteOp(OP2_JE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionE));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jl()
+    AssemblerLabel jz()

     {
     {

-        m_formatter.twoByteOp(OP2_JL_rel32);
+        return je();
+    }
+
+    AssemblerLabel jl()
+    {
+        m_formatter.twoByteOp(jccRel32(ConditionL));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jb()
+    AssemblerLabel jb()

     {
     {

-        m_formatter.twoByteOp(OP2_JB_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionB));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jle()
+    AssemblerLabel jle()

     {
     {

-        m_formatter.twoByteOp(OP2_JLE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionLE));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jbe()
+    AssemblerLabel jbe()

     {
     {

-        m_formatter.twoByteOp(OP2_JBE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionBE));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jge()
+    AssemblerLabel jge()

     {
     {

-        m_formatter.twoByteOp(OP2_JGE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionGE));

         return m_formatter.immediateRel32();
     }
 
         return m_formatter.immediateRel32();
     }
 

-    JmpSrc jg()
+    AssemblerLabel jg()

     {
     {

-        m_formatter.twoByteOp(OP2_JG_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionG));

         return m_formatter.immediateRel32();
     }
 
         return m_formatter.immediateRel32();
     }
 

-    JmpSrc ja()
+    AssemblerLabel ja()

     {
     {

-        m_formatter.twoByteOp(OP2_JA_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionA));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jae()
+    AssemblerLabel jae()

     {
     {

-        m_formatter.twoByteOp(OP2_JAE_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionAE));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc jo()
+    AssemblerLabel jo()
+    {
+        m_formatter.twoByteOp(jccRel32(ConditionO));
+        return m_formatter.immediateRel32();
+    }
+
+    AssemblerLabel jnp()

     {
     {

-        m_formatter.twoByteOp(OP2_JO_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionNP));

         return m_formatter.immediateRel32();
     }
 
         return m_formatter.immediateRel32();
     }
 

-    JmpSrc jp()
+    AssemblerLabel jp()

     {
     {

-        m_formatter.twoByteOp(OP2_JP_rel32);
+        m_formatter.twoByteOp(jccRel32(ConditionP));

         return m_formatter.immediateRel32();
     }
     
         return m_formatter.immediateRel32();
     }
     

-    JmpSrc js()
+    AssemblerLabel js()
+    {
+        m_formatter.twoByteOp(jccRel32(ConditionS));
+        return m_formatter.immediateRel32();
+    }
+
+    AssemblerLabel jCC(Condition cond)

     {
     {

-        m_formatter.twoByteOp(OP2_JS_rel32);
+        m_formatter.twoByteOp(jccRel32(cond));

         return m_formatter.immediateRel32();
     }
 
         return m_formatter.immediateRel32();
     }
 


@@ -1076,25 +1513,73 @@ public:
         m_formatter.twoByteOp(OP2_ADDSD_VsdWsd, (RegisterID)dst, base, offset);
     }
 
         m_formatter.twoByteOp(OP2_ADDSD_VsdWsd, (RegisterID)dst, base, offset);
     }
 

+#if !CPU(X86_64)
+    void addsd_mr(const void* address, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_ADDSD_VsdWsd, (RegisterID)dst, address);
+    }
+#endif
+

     void cvtsi2sd_rr(RegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, src);
     }
 
     void cvtsi2sd_rr(RegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, src);
     }
 

+    void cvtsi2sd_mr(int offset, RegisterID base, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, base, offset);
+    }
+
+#if !CPU(X86_64)
+    void cvtsi2sd_mr(const void* address, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, address);
+    }
+#endif
+

     void cvttsd2si_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_CVTTSD2SI_GdWsd, dst, (RegisterID)src);
     }
 
     void cvttsd2si_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_CVTTSD2SI_GdWsd, dst, (RegisterID)src);
     }
 

+    void cvtsd2ss_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_CVTSD2SS_VsdWsd, dst, (RegisterID)src);
+    }
+
+    void cvtss2sd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F3);
+        m_formatter.twoByteOp(OP2_CVTSS2SD_VsdWsd, dst, (RegisterID)src);
+    }
+    
+#if CPU(X86_64)
+    void cvttsd2siq_rr(XMMRegisterID src, RegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp64(OP2_CVTTSD2SI_GdWsd, dst, (RegisterID)src);
+    }
+#endif
+

     void movd_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_66);
         m_formatter.twoByteOp(OP2_MOVD_EdVd, (RegisterID)src, dst);
     }
 
     void movd_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_66);
         m_formatter.twoByteOp(OP2_MOVD_EdVd, (RegisterID)src, dst);
     }
 

-#if PLATFORM(X86_64)
+    void movd_rr(RegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp(OP2_MOVD_VdEd, (RegisterID)dst, src);
+    }
+
+#if CPU(X86_64)

     void movq_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_66);
     void movq_rr(XMMRegisterID src, RegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_66);


@@ -1108,18 +1593,61 @@ public:
     }
 #endif
 
     }
 #endif
 

+    void movsd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, (RegisterID)src);
+    }
+

     void movsd_rm(XMMRegisterID src, int offset, RegisterID base)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, base, offset);
     }
     void movsd_rm(XMMRegisterID src, int offset, RegisterID base)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, base, offset);
     }

-
+    
+    void movsd_rm(XMMRegisterID src, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, base, index, scale, offset);
+    }
+    
+    void movss_rm(XMMRegisterID src, int offset, RegisterID base, RegisterID index, int scale)
+    {
+        m_formatter.prefix(PRE_SSE_F3);
+        m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, base, index, scale, offset);
+    }
+    

     void movsd_mr(int offset, RegisterID base, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, base, offset);
     }
 
     void movsd_mr(int offset, RegisterID base, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
         m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, base, offset);
     }
 

+    void movsd_mr(int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, dst, base, index, scale, offset);
+    }
+    
+    void movss_mr(int offset, RegisterID base, RegisterID index, int scale, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F3);
+        m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, dst, base, index, scale, offset);
+    }
+
+#if !CPU(X86_64)
+    void movsd_mr(const void* address, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, address);
+    }
+    void movsd_rm(XMMRegisterID src, const void* address)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, address);
+    }
+#endif
+

     void mulsd_rr(XMMRegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
     void mulsd_rr(XMMRegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);


@@ -1139,6 +1667,26 @@ public:
         m_formatter.immediate8(whichWord);
     }
 
         m_formatter.immediate8(whichWord);
     }
 

+    void psllq_i8r(int imm, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp8(OP2_PSLLQ_UdqIb, GROUP14_OP_PSLLQ, (RegisterID)dst);
+        m_formatter.immediate8(imm);
+    }
+
+    void psrlq_i8r(int imm, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp8(OP2_PSRLQ_UdqIb, GROUP14_OP_PSRLQ, (RegisterID)dst);
+        m_formatter.immediate8(imm);
+    }
+
+    void por_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp(OP2_POR_VdqWdq, (RegisterID)dst, (RegisterID)src);
+    }
+

     void subsd_rr(XMMRegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);
     void subsd_rr(XMMRegisterID src, XMMRegisterID dst)
     {
         m_formatter.prefix(PRE_SSE_F2);


@@ -1157,6 +1705,42 @@ public:
         m_formatter.twoByteOp(OP2_UCOMISD_VsdWsd, (RegisterID)dst, (RegisterID)src);
     }
 
         m_formatter.twoByteOp(OP2_UCOMISD_VsdWsd, (RegisterID)dst, (RegisterID)src);
     }
 

+    void ucomisd_mr(int offset, RegisterID base, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp(OP2_UCOMISD_VsdWsd, (RegisterID)dst, base, offset);
+    }
+
+    void divsd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_DIVSD_VsdWsd, (RegisterID)dst, (RegisterID)src);
+    }
+
+    void divsd_mr(int offset, RegisterID base, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_DIVSD_VsdWsd, (RegisterID)dst, base, offset);
+    }
+
+    void xorpd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp(OP2_XORPD_VpdWpd, (RegisterID)dst, (RegisterID)src);
+    }
+
+    void andnpd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_66);
+        m_formatter.twoByteOp(OP2_ANDNPD_VpdWpd, (RegisterID)dst, (RegisterID)src);
+    }
+
+    void sqrtsd_rr(XMMRegisterID src, XMMRegisterID dst)
+    {
+        m_formatter.prefix(PRE_SSE_F2);
+        m_formatter.twoByteOp(OP2_SQRTSD_VsdWsd, (RegisterID)dst, (RegisterID)src);
+    }
+

     // Misc instructions:
 
     void int3()
     // Misc instructions:
 
     void int3()


@@ -1176,12 +1760,37 @@ public:
 
     // Assembler admin methods:
 
 
     // Assembler admin methods:
 

-    JmpDst label()
+    size_t codeSize() const
+    {
+        return m_formatter.codeSize();
+    }
+    
+    AssemblerLabel labelForWatchpoint()

     {
     {

-        return JmpDst(m_formatter.size());
+        AssemblerLabel result = m_formatter.label();
+        if (static_cast<int>(result.m_offset) != m_indexOfLastWatchpoint)
+            result = label();
+        m_indexOfLastWatchpoint = result.m_offset;
+        m_indexOfTailOfLastWatchpoint = result.m_offset + maxJumpReplacementSize();
+        return result;

     }
     
     }
     

-    JmpDst align(int alignment)
+    AssemblerLabel labelIgnoringWatchpoints()
+    {
+        return m_formatter.label();
+    }
+
+    AssemblerLabel label()
+    {
+        AssemblerLabel result = m_formatter.label();
+        while (UNLIKELY(static_cast<int>(result.m_offset) < m_indexOfTailOfLastWatchpoint)) {
+            nop();
+            result = m_formatter.label();
+        }
+        return result;
+    }
+
+    AssemblerLabel align(int alignment)

     {
         while (!m_formatter.isAligned(alignment))
             m_formatter.oneByteOp(OP_HLT);
     {
         while (!m_formatter.isAligned(alignment))
             m_formatter.oneByteOp(OP_HLT);


@@ -1190,88 +1799,251 @@ public:
     }
 
     // Linking & patching:
     }
 
     // Linking & patching:

+    //
+    // 'link' and 'patch' methods are for use on unprotected code - such as the code
+    // within the AssemblerBuffer, and code being patched by the patch buffer.  Once
+    // code has been finalized it is (platform support permitting) within a non-
+    // writable region of memory; to modify the code in an execute-only execuable
+    // pool the 'repatch' and 'relink' methods should be used.

 
 

-    void link(JmpSrc from, JmpDst to)
+    void linkJump(AssemblerLabel from, AssemblerLabel to)

     {
     {

-        ASSERT(to.m_offset != -1);
-        ASSERT(from.m_offset != -1);
-        
-        reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(m_formatter.data()) + from.m_offset)[-1] = to.m_offset - from.m_offset;
+        ASSERT(from.isSet());
+        ASSERT(to.isSet());
+
+        char* code = reinterpret_cast<char*>(m_formatter.data());
+        ASSERT(!reinterpret_cast<int32_t*>(code + from.m_offset)[-1]);
+        setRel32(code + from.m_offset, code + to.m_offset);

     }
     
     }
     

-    static void patchAddress(void* code, JmpDst position, void* value)
+    static void linkJump(void* code, AssemblerLabel from, void* to)

     {
     {

-        ASSERT(position.m_offset != -1);
-        
-        reinterpret_cast<void**>(reinterpret_cast<ptrdiff_t>(code) + position.m_offset)[-1] = value;
+        ASSERT(from.isSet());
+
+        setRel32(reinterpret_cast<char*>(code) + from.m_offset, to);

     }
     }

-    
-    static void link(void* code, JmpSrc from, void* to)
+
+    static void linkCall(void* code, AssemblerLabel from, void* to)

     {
     {

-        ASSERT(from.m_offset != -1);
-        
-        reinterpret_cast<int*>(reinterpret_cast<ptrdiff_t>(code) + from.m_offset)[-1] = reinterpret_cast<ptrdiff_t>(to) - (reinterpret_cast<ptrdiff_t>(code) + from.m_offset);
+        ASSERT(from.isSet());
+
+        setRel32(reinterpret_cast<char*>(code) + from.m_offset, to);
+    }
+
+    static void linkPointer(void* code, AssemblerLabel where, void* value)
+    {
+        ASSERT(where.isSet());
+
+        setPointer(reinterpret_cast<char*>(code) + where.m_offset, value);
+    }
+
+    static void relinkJump(void* from, void* to)
+    {
+        setRel32(from, to);

     }
     
     }
     

-    static void* getRelocatedAddress(void* code, JmpSrc jump)
+    static void relinkCall(void* from, void* to)

     {
     {

-        return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + jump.m_offset);
+        setRel32(from, to);

     }
     
     }
     

-    static void* getRelocatedAddress(void* code, JmpDst destination)
+    static void repatchCompact(void* where, int32_t value)
+    {
+        ASSERT(value >= std::numeric_limits<int8_t>::min());
+        ASSERT(value <= std::numeric_limits<int8_t>::max());
+        setInt8(where, value);
+    }
+
+    static void repatchInt32(void* where, int32_t value)

     {
     {

-        ASSERT(destination.m_offset != -1);
+        setInt32(where, value);
+    }

 
 

-        return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + destination.m_offset);
+    static void repatchPointer(void* where, void* value)
+    {
+        setPointer(where, value);

     }
     
     }
     

-    static int getDifferenceBetweenLabels(JmpDst src, JmpDst dst)
+    static void* readPointer(void* where)
+    {
+        return reinterpret_cast<void**>(where)[-1];
+    }
+
+    static void replaceWithJump(void* instructionStart, void* to)

     {
     {

-        return dst.m_offset - src.m_offset;
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+        uint8_t* dstPtr = reinterpret_cast<uint8_t*>(to);
+        intptr_t distance = (intptr_t)(dstPtr - (ptr + 5));
+        ptr[0] = static_cast<uint8_t>(OP_JMP_rel32);
+        *reinterpret_cast<int32_t*>(ptr + 1) = static_cast<int32_t>(distance);

     }
     
     }
     

-    static int getDifferenceBetweenLabels(JmpDst src, JmpSrc dst)
+    static ptrdiff_t maxJumpReplacementSize()

     {
     {

-        return dst.m_offset - src.m_offset;
+        return 5;
+    }
+    
+#if CPU(X86_64)
+    static void revertJumpTo_movq_i64r(void* instructionStart, int64_t imm, RegisterID dst)
+    {
+        const int rexBytes = 1;
+        const int opcodeBytes = 1;
+        ASSERT(rexBytes + opcodeBytes <= maxJumpReplacementSize());
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+        ptr[0] = PRE_REX | (1 << 3) | (dst >> 3);
+        ptr[1] = OP_MOV_EAXIv | (dst & 7);
+        
+        union {
+            uint64_t asWord;
+            uint8_t asBytes[8];
+        } u;
+        u.asWord = imm;
+        for (unsigned i = rexBytes + opcodeBytes; i < static_cast<unsigned>(maxJumpReplacementSize()); ++i)
+            ptr[i] = u.asBytes[i - rexBytes - opcodeBytes];
+    }
+#endif
+    
+    static void revertJumpTo_cmpl_ir_force32(void* instructionStart, int32_t imm, RegisterID dst)
+    {
+        const int opcodeBytes = 1;
+        const int modRMBytes = 1;
+        ASSERT(opcodeBytes + modRMBytes <= maxJumpReplacementSize());
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+        ptr[0] = OP_GROUP1_EvIz;
+        ptr[1] = (X86InstructionFormatter::ModRmRegister << 6) | (GROUP1_OP_CMP << 3) | dst;
+        union {
+            uint32_t asWord;
+            uint8_t asBytes[4];
+        } u;
+        u.asWord = imm;
+        for (unsigned i = opcodeBytes + modRMBytes; i < static_cast<unsigned>(maxJumpReplacementSize()); ++i)
+            ptr[i] = u.asBytes[i - opcodeBytes - modRMBytes];
+    }
+    
+    static void revertJumpTo_cmpl_im_force32(void* instructionStart, int32_t imm, int offset, RegisterID dst)
+    {
+        ASSERT_UNUSED(offset, !offset);
+        const int opcodeBytes = 1;
+        const int modRMBytes = 1;
+        ASSERT(opcodeBytes + modRMBytes <= maxJumpReplacementSize());
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+        ptr[0] = OP_GROUP1_EvIz;
+        ptr[1] = (X86InstructionFormatter::ModRmMemoryNoDisp << 6) | (GROUP1_OP_CMP << 3) | dst;
+        union {
+            uint32_t asWord;
+            uint8_t asBytes[4];
+        } u;
+        u.asWord = imm;
+        for (unsigned i = opcodeBytes + modRMBytes; i < static_cast<unsigned>(maxJumpReplacementSize()); ++i)
+            ptr[i] = u.asBytes[i - opcodeBytes - modRMBytes];

     }
     
     }
     

-    static int getDifferenceBetweenLabels(JmpSrc src, JmpDst dst)
+    static void replaceWithLoad(void* instructionStart)

     {
     {

-        return dst.m_offset - src.m_offset;
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+#if CPU(X86_64)
+        if ((*ptr & ~15) == PRE_REX)
+            ptr++;
+#endif
+        switch (*ptr) {
+        case OP_MOV_GvEv:
+            break;
+        case OP_LEA:
+            *ptr = OP_MOV_GvEv;
+            break;
+        default:
+            RELEASE_ASSERT_NOT_REACHED();
+        }

     }
     
     }
     

-    static void patchImmediate(intptr_t where, int32_t value)
+    static void replaceWithAddressComputation(void* instructionStart)

     {
     {

-        reinterpret_cast<int32_t*>(where)[-1] = value;
+        uint8_t* ptr = reinterpret_cast<uint8_t*>(instructionStart);
+#if CPU(X86_64)
+        if ((*ptr & ~15) == PRE_REX)
+            ptr++;
+#endif
+        switch (*ptr) {
+        case OP_MOV_GvEv:
+            *ptr = OP_LEA;
+            break;
+        case OP_LEA:
+            break;
+        default:
+            RELEASE_ASSERT_NOT_REACHED();
+        }

     }
     
     }
     

-    static void patchPointer(intptr_t where, intptr_t value)
+    static unsigned getCallReturnOffset(AssemblerLabel call)
+    {
+        ASSERT(call.isSet());
+        return call.m_offset;
+    }
+
+    static void* getRelocatedAddress(void* code, AssemblerLabel label)

     {
     {

-        reinterpret_cast<intptr_t*>(where)[-1] = value;
+        ASSERT(label.isSet());
+        return reinterpret_cast<void*>(reinterpret_cast<ptrdiff_t>(code) + label.m_offset);

     }
     
     }
     

-    static void patchBranchOffset(intptr_t where, void* destination)
+    static int getDifferenceBetweenLabels(AssemblerLabel a, AssemblerLabel b)

     {
     {

-        intptr_t offset = reinterpret_cast<intptr_t>(destination) - where;
-        ASSERT(offset == static_cast<int32_t>(offset));
-        reinterpret_cast<int32_t*>(where)[-1] = static_cast<int32_t>(offset);
+        return b.m_offset - a.m_offset;

     }
     
     }
     

-    void* executableCopy(ExecutablePool* allocator)
+    PassRefPtr<ExecutableMemoryHandle> executableCopy(VM& vm, void* ownerUID, JITCompilationEffort effort)
+    {
+        return m_formatter.executableCopy(vm, ownerUID, effort);
+    }
+
+    unsigned debugOffset() { return m_formatter.debugOffset(); }
+
+    void nop()

     {
     {

-        void* copy = m_formatter.executableCopy(allocator);
-        ASSERT(copy);
-        return copy;
+        m_formatter.oneByteOp(OP_NOP);

     }
 
     }
 

+    // This is a no-op on x86
+    ALWAYS_INLINE static void cacheFlush(void*, size_t) { }
+

 private:
 
 private:
 

+    static void setPointer(void* where, void* value)
+    {
+        reinterpret_cast<void**>(where)[-1] = value;
+    }
+
+    static void setInt32(void* where, int32_t value)
+    {
+        reinterpret_cast<int32_t*>(where)[-1] = value;
+    }
+    
+    static void setInt8(void* where, int8_t value)
+    {
+        reinterpret_cast<int8_t*>(where)[-1] = value;
+    }
+
+    static void setRel32(void* from, void* to)
+    {
+        intptr_t offset = reinterpret_cast<intptr_t>(to) - reinterpret_cast<intptr_t>(from);
+        ASSERT(offset == static_cast<int32_t>(offset));
+
+        setInt32(from, offset);
+    }
+

     class X86InstructionFormatter {
 
         static const int maxInstructionSize = 16;
 
     public:
 
     class X86InstructionFormatter {
 
         static const int maxInstructionSize = 16;
 
     public:
 

+        enum ModRmMode {
+            ModRmMemoryNoDisp,
+            ModRmMemoryDisp8,
+            ModRmMemoryDisp32,
+            ModRmRegister,
+        };
+

         // Legacy prefix bytes:
         //
         // These are emmitted prior to the instruction.
         // Legacy prefix bytes:
         //
         // These are emmitted prior to the instruction.


@@ -1331,6 +2103,14 @@ private:
             m_buffer.putByteUnchecked(opcode);
             memoryModRM_disp32(reg, base, offset);
         }
             m_buffer.putByteUnchecked(opcode);
             memoryModRM_disp32(reg, base, offset);
         }

+        
+        void oneByteOp_disp8(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
+        {
+            m_buffer.ensureSpace(maxInstructionSize);
+            emitRexIfNeeded(reg, 0, base);
+            m_buffer.putByteUnchecked(opcode);
+            memoryModRM_disp8(reg, base, offset);
+        }

 
         void oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
         {
 
         void oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
         {


@@ -1340,8 +2120,8 @@ private:
             memoryModRM(reg, base, index, scale, offset);
         }
 
             memoryModRM(reg, base, index, scale, offset);
         }
 

-#if !PLATFORM(X86_64)
-        void oneByteOp(OneByteOpcodeID opcode, int reg, void* address)
+#if !CPU(X86_64)
+        void oneByteOp(OneByteOpcodeID opcode, int reg, const void* address)

         {
             m_buffer.ensureSpace(maxInstructionSize);
             m_buffer.putByteUnchecked(opcode);
         {
             m_buffer.ensureSpace(maxInstructionSize);
             m_buffer.putByteUnchecked(opcode);


@@ -1383,7 +2163,17 @@ private:
             memoryModRM(reg, base, index, scale, offset);
         }
 
             memoryModRM(reg, base, index, scale, offset);
         }
 

-#if PLATFORM(X86_64)
+#if !CPU(X86_64)
+        void twoByteOp(TwoByteOpcodeID opcode, int reg, const void* address)
+        {
+            m_buffer.ensureSpace(maxInstructionSize);
+            m_buffer.putByteUnchecked(OP_2BYTE_ESCAPE);
+            m_buffer.putByteUnchecked(opcode);
+            memoryModRM(reg, address);
+        }
+#endif
+
+#if CPU(X86_64)

         // Quad-word-sized operands:
         //
         // Used to format 64-bit operantions, planting a REX.w prefix.
         // Quad-word-sized operands:
         //
         // Used to format 64-bit operantions, planting a REX.w prefix.


@@ -1427,6 +2217,14 @@ private:
             m_buffer.putByteUnchecked(opcode);
             memoryModRM_disp32(reg, base, offset);
         }
             m_buffer.putByteUnchecked(opcode);
             memoryModRM_disp32(reg, base, offset);
         }

+        
+        void oneByteOp64_disp8(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
+        {
+            m_buffer.ensureSpace(maxInstructionSize);
+            emitRexW(reg, 0, base);
+            m_buffer.putByteUnchecked(opcode);
+            memoryModRM_disp8(reg, base, offset);
+        }

 
         void oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
         {
 
         void oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
         {


@@ -1479,6 +2277,22 @@ private:
             registerModRM(groupOp, rm);
         }
 
             registerModRM(groupOp, rm);
         }
 

+        void oneByteOp8(OneByteOpcodeID opcode, int reg, RegisterID rm)
+        {
+            m_buffer.ensureSpace(maxInstructionSize);
+            emitRexIf(byteRegRequiresRex(reg) || byteRegRequiresRex(rm), reg, 0, rm);
+            m_buffer.putByteUnchecked(opcode);
+            registerModRM(reg, rm);
+        }
+
+        void oneByteOp8(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
+        {
+            m_buffer.ensureSpace(maxInstructionSize);
+            emitRexIf(byteRegRequiresRex(reg) || regRequiresRex(index) || regRequiresRex(base), reg, index, base);
+            m_buffer.putByteUnchecked(opcode);
+            memoryModRM(reg, base, index, scale, offset);
+        }
+

         void twoByteOp8(TwoByteOpcodeID opcode, RegisterID reg, RegisterID rm)
         {
             m_buffer.ensureSpace(maxInstructionSize);
         void twoByteOp8(TwoByteOpcodeID opcode, RegisterID reg, RegisterID rm)
         {
             m_buffer.ensureSpace(maxInstructionSize);


@@ -1507,6 +2321,11 @@ private:
             m_buffer.putByteUnchecked(imm);
         }
 
             m_buffer.putByteUnchecked(imm);
         }
 

+        void immediate16(int imm)
+        {
+            m_buffer.putShortUnchecked(imm);
+        }
+

         void immediate32(int imm)
         {
             m_buffer.putIntUnchecked(imm);
         void immediate32(int imm)
         {
             m_buffer.putIntUnchecked(imm);


@@ -1517,45 +2336,55 @@ private:
             m_buffer.putInt64Unchecked(imm);
         }
 
             m_buffer.putInt64Unchecked(imm);
         }
 

-        JmpSrc immediateRel32()
+        AssemblerLabel immediateRel32()

         {
             m_buffer.putIntUnchecked(0);
         {
             m_buffer.putIntUnchecked(0);

-            return JmpSrc(m_buffer.size());
+            return label();

         }
 
         // Administrative methods:
 
         }
 
         // Administrative methods:
 

-        size_t size() const { return m_buffer.size(); }
+        size_t codeSize() const { return m_buffer.codeSize(); }
+        AssemblerLabel label() const { return m_buffer.label(); }

         bool isAligned(int alignment) const { return m_buffer.isAligned(alignment); }
         void* data() const { return m_buffer.data(); }
         bool isAligned(int alignment) const { return m_buffer.isAligned(alignment); }
         void* data() const { return m_buffer.data(); }

-        void* executableCopy(ExecutablePool* allocator) { return m_buffer.executableCopy(allocator); }
+
+        PassRefPtr<ExecutableMemoryHandle> executableCopy(VM& vm, void* ownerUID, JITCompilationEffort effort)
+        {
+            return m_buffer.executableCopy(vm, ownerUID, effort);
+        }
+
+        unsigned debugOffset() { return m_buffer.debugOffset(); }

 
     private:
 
         // Internals; ModRm and REX formatters.
 
 
     private:
 
         // Internals; ModRm and REX formatters.
 

-        static const RegisterID noBase = X86::ebp;
-        static const RegisterID hasSib = X86::esp;
-        static const RegisterID noIndex = X86::esp;
-#if PLATFORM(X86_64)
-        static const RegisterID noBase2 = X86::r13;
-        static const RegisterID hasSib2 = X86::r12;
+        static const RegisterID noBase = X86Registers::ebp;
+        static const RegisterID hasSib = X86Registers::esp;
+        static const RegisterID noIndex = X86Registers::esp;
+#if CPU(X86_64)
+        static const RegisterID noBase2 = X86Registers::r13;
+        static const RegisterID hasSib2 = X86Registers::r12;

 
         // Registers r8 & above require a REX prefixe.
         inline bool regRequiresRex(int reg)
         {
 
         // Registers r8 & above require a REX prefixe.
         inline bool regRequiresRex(int reg)
         {

-            return (reg >= X86::r8);
+            return (reg >= X86Registers::r8);

         }
 
         // Byte operand register spl & above require a REX prefix (to prevent the 'H' registers be accessed).
         inline bool byteRegRequiresRex(int reg)
         {
         }
 
         // Byte operand register spl & above require a REX prefix (to prevent the 'H' registers be accessed).
         inline bool byteRegRequiresRex(int reg)
         {

-            return (reg >= X86::esp);
+            return (reg >= X86Registers::esp);

         }
 
         // Format a REX prefix byte.
         inline void emitRex(bool w, int r, int x, int b)
         {
         }
 
         // Format a REX prefix byte.
         inline void emitRex(bool w, int r, int x, int b)
         {

+            ASSERT(r >= 0);
+            ASSERT(x >= 0);
+            ASSERT(b >= 0);

             m_buffer.putByteUnchecked(PRE_REX | ((int)w << 3) | ((r>>3)<<2) | ((x>>3)<<1) | (b>>3));
         }
 
             m_buffer.putByteUnchecked(PRE_REX | ((int)w << 3) | ((r>>3)<<2) | ((x>>3)<<1) | (b>>3));
         }
 


@@ -1585,13 +2414,6 @@ private:
         inline void emitRexIfNeeded(int, int, int) {}
 #endif
 
         inline void emitRexIfNeeded(int, int, int) {}
 #endif
 

-        enum ModRmMode {
-            ModRmMemoryNoDisp,
-            ModRmMemoryDisp8,
-            ModRmMemoryDisp32,
-            ModRmRegister,
-        };
-

         void putModRm(ModRmMode mode, int reg, RegisterID rm)
         {
             m_buffer.putByteUnchecked((mode << 6) | ((reg & 7) << 3) | (rm & 7));
         void putModRm(ModRmMode mode, int reg, RegisterID rm)
         {
             m_buffer.putByteUnchecked((mode << 6) | ((reg & 7) << 3) | (rm & 7));


@@ -1601,13 +2423,8 @@ private:
         {
             ASSERT(mode != ModRmRegister);
 
         {
             ASSERT(mode != ModRmRegister);
 

-            // Encode sacle of (1,2,4,8) -> (0,1,2,3)
-            int shift = 0;
-            while (scale >>= 1)
-                shift++;
-

             putModRm(mode, reg, hasSib);
             putModRm(mode, reg, hasSib);

-            m_buffer.putByteUnchecked((shift << 6) | ((index & 7) << 3) | (base & 7));
+            m_buffer.putByteUnchecked((scale << 6) | ((index & 7) << 3) | (base & 7));

         }
 
         void registerModRM(int reg, RegisterID rm)
         }
 
         void registerModRM(int reg, RegisterID rm)


@@ -1618,7 +2435,7 @@ private:
         void memoryModRM(int reg, RegisterID base, int offset)
         {
             // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
         void memoryModRM(int reg, RegisterID base, int offset)
         {
             // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

             if ((base == hasSib) || (base == hasSib2)) {
 #else
             if (base == hasSib) {
             if ((base == hasSib) || (base == hasSib2)) {
 #else
             if (base == hasSib) {


@@ -1633,7 +2450,7 @@ private:
                     m_buffer.putIntUnchecked(offset);
                 }
             } else {
                     m_buffer.putIntUnchecked(offset);
                 }
             } else {

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

                 if (!offset && (base != noBase) && (base != noBase2))
 #else
                 if (!offset && (base != noBase))
                 if (!offset && (base != noBase) && (base != noBase2))
 #else
                 if (!offset && (base != noBase))


@@ -1648,11 +2465,28 @@ private:
                 }
             }
         }
                 }
             }
         }

-    
+
+        void memoryModRM_disp8(int reg, RegisterID base, int offset)
+        {
+            // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
+            ASSERT(CAN_SIGN_EXTEND_8_32(offset));
+#if CPU(X86_64)
+            if ((base == hasSib) || (base == hasSib2)) {
+#else
+            if (base == hasSib) {
+#endif
+                putModRmSib(ModRmMemoryDisp8, reg, base, noIndex, 0);
+                m_buffer.putByteUnchecked(offset);
+            } else {
+                putModRm(ModRmMemoryDisp8, reg, base);
+                m_buffer.putByteUnchecked(offset);
+            }
+        }
+

         void memoryModRM_disp32(int reg, RegisterID base, int offset)
         {
             // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
         void memoryModRM_disp32(int reg, RegisterID base, int offset)
         {
             // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

             if ((base == hasSib) || (base == hasSib2)) {
 #else
             if (base == hasSib) {
             if ((base == hasSib) || (base == hasSib2)) {
 #else
             if (base == hasSib) {


@@ -1669,7 +2503,7 @@ private:
         {
             ASSERT(index != noIndex);
 
         {
             ASSERT(index != noIndex);
 

-#if PLATFORM(X86_64)
+#if CPU(X86_64)

             if (!offset && (base != noBase) && (base != noBase2))
 #else
             if (!offset && (base != noBase))
             if (!offset && (base != noBase) && (base != noBase2))
 #else
             if (!offset && (base != noBase))


@@ -1684,8 +2518,8 @@ private:
             }
         }
 
             }
         }
 

-#if !PLATFORM(X86_64)
-        void memoryModRM(int reg, void* address)
+#if !CPU(X86_64)
+        void memoryModRM(int reg, const void* address)

         {
             // noBase + ModRmMemoryNoDisp means noBase + ModRmMemoryDisp32!
             putModRm(ModRmMemoryNoDisp, reg, noBase);
         {
             // noBase + ModRmMemoryNoDisp means noBase + ModRmMemoryDisp32!
             putModRm(ModRmMemoryNoDisp, reg, noBase);


@@ -1695,10 +2529,12 @@ private:
 
         AssemblerBuffer m_buffer;
     } m_formatter;
 
         AssemblerBuffer m_buffer;
     } m_formatter;

+    int m_indexOfLastWatchpoint;
+    int m_indexOfTailOfLastWatchpoint;

 };
 
 } // namespace JSC
 
 };
 
 } // namespace JSC
 

-#endif // ENABLE(ASSEMBLER) && PLATFORM(X86)
+#endif // ENABLE(ASSEMBLER) && CPU(X86)

 
 #endif // X86Assembler_h
 
 #endif // X86Assembler_h