+ Jump branchAdd32(ResultCondition cond, RegisterID src, TrustedImm32 imm, RegisterID dest)
+ {
+ ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
+
+ if (src != dest)
+ move(src, dest);
+
+ if (cond == Overflow) {
+ move(imm, scratchReg3);
+ m_assembler.addvlRegReg(scratchReg3, dest);
+ return branchTrue();
+ }
+
+ add32(imm, dest);
+
+ if (cond == Signed) {
+ m_assembler.cmppz(dest);
+ return branchFalse();
+ }
+
+ if (cond == PositiveOrZero) {
+ m_assembler.cmppz(dest);
+ return branchTrue();
+ }
+
+ compare32(0, dest, Equal);
+
+ if (cond == NonZero) // NotEqual
+ return branchFalse();
+ return branchTrue();
+ }
+
+ Jump branchAdd32(ResultCondition cond, TrustedImm32 imm, AbsoluteAddress dest)
+ {
+ ASSERT((cond == Overflow) || (cond == Signed) || (cond == PositiveOrZero) || (cond == Zero) || (cond == NonZero));
+ bool result;
+
+ move(imm, scratchReg3);
+ RegisterID destptr = claimScratch();
+ RegisterID destval = claimScratch();
+ m_assembler.loadConstant(reinterpret_cast<uint32_t>(dest.m_ptr), destptr);
+ m_assembler.movlMemReg(destptr, destval);
+ if (cond == Overflow) {
+ m_assembler.addvlRegReg(scratchReg3, destval);
+ result = true;
+ } else {
+ m_assembler.addlRegReg(scratchReg3, destval);
+ if (cond == Signed) {
+ m_assembler.cmppz(destval);
+ result = false;
+ } else if (cond == PositiveOrZero) {
+ m_assembler.cmppz(destval);
+ result = true;
+ } else {
+ m_assembler.movImm8(0, scratchReg3);
+ m_assembler.cmplRegReg(scratchReg3, destval, SH4Condition(cond));
+ result = (cond == Zero);
+ }
+ }
+ m_assembler.movlRegMem(destval, destptr);
+ releaseScratch(destval);
+ releaseScratch(destptr);
+ return result ? branchTrue() : branchFalse();
+ }
+