X-Git-Url: https://git.saurik.com/apple/xnu.git/blobdiff_plain/9bccf70c0258c7cac2dcb80011b2a964d884c552..a3d08fcd5120d2aa8303b6349ca8b14e3f284af3:/osfmk/ppc/Diagnostics.c diff --git a/osfmk/ppc/Diagnostics.c b/osfmk/ppc/Diagnostics.c index ffa7e0f64..f6409117b 100644 --- a/osfmk/ppc/Diagnostics.c +++ b/osfmk/ppc/Diagnostics.c @@ -54,18 +54,20 @@ #include #include #include -#include #include #include #include #include -#include +#include #include extern struct vc_info vinfo; +extern uint32_t warFlags; +#define warDisMBpoff 0x80000000 kern_return_t testPerfTrap(int trapno, struct savearea *ss, - unsigned int dsisr, unsigned int dar); + unsigned int dsisr, addr64_t dar); + int diagCall(struct savearea *save) { @@ -75,8 +77,11 @@ int diagCall(struct savearea *save) { } ttt, adj; natural_t tbu, tbu2, tbl; struct per_proc_info *per_proc; /* Area for my per_proc address */ - int cpu; - unsigned int tstrt, tend, temp, temp2; + int cpu, ret, subc; + unsigned int tstrt, tend, temp, temp2, oldwar; + addr64_t src, snk; + uint64_t scom, hid1, hid4, srrwrk, stat; + scomcomm sarea; if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */ @@ -116,7 +121,7 @@ int diagCall(struct savearea *save) { */ case dgLRA: - save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4); /* Get read address */ + save->save_r3 = pmap_find_phys(current_act()->map->pmap, save->save_r4); /* Get read address */ return -1; /* Return no AST checking... */ @@ -125,11 +130,58 @@ int diagCall(struct savearea *save) { */ case dgpcpy: -#if 0 - save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6); /* Copy the physical page */ + +#if 1 + src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5); /* Merge into 64-bit */ + snk = (save->save_r6 << 32) | (0x00000000FFFFFFFFULL & save->save_r7); /* Merge into 64-bit */ + save->save_r3 = copypv(src, snk, save->save_r8, save->save_r9); /* Copy the physical page */ #endif return 1; /* Return and check for ASTs... */ +/* + * Read/Write physical memory + */ + case dgprw: + + src = (save->save_r5 << 32) | (0x00000000FFFFFFFFULL & save->save_r6); /* Merge into 64-bit */ + + switch(save->save_r4) { /* Select the actual function */ + + case 0: + save->save_r3 = (uint64_t)ml_phys_read_byte((unsigned int)src); + break; + + case 1: + save->save_r3 = (uint64_t)ml_phys_read_byte_64(src); + break; + + case 2: + save->save_r3 = (uint64_t)ml_phys_read((unsigned int)src); + break; + + case 3: + save->save_r3 = (uint64_t)ml_phys_read_64(src); + break; + + case 4: + ml_phys_write_byte((unsigned int)src, (unsigned int)save->save_r7); + break; + + case 5: + ml_phys_write_byte_64(src, (unsigned int)save->save_r7); + break; + + case 6: + ml_phys_write((unsigned int)src, (unsigned int)save->save_r7); + break; + + case 7: + ml_phys_write_64(src, (unsigned int)save->save_r7); + break; + } + + return 1; /* Return and check for ASTs... */ + /* * Soft reset processor @@ -159,16 +211,7 @@ int diagCall(struct savearea *save) { */ case dgFlush: -#if 1 cacheInit(); /* Blow cache */ -#else - asm volatile(" mftb %0" : "=r" (tstrt)); - tend = tstrt; - while((tend - tstrt) < 0x000A2837) { - asm volatile(" mftb %0" : "=r" (tend)); - } - -#endif return 1; /* Return and check for ASTs... */ /* @@ -189,9 +232,9 @@ int diagCall(struct savearea *save) { * parms - vaddr, paddr, size, prot, attributes */ case dgBMphys: - - pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6, /* Map in the block */ - save->save_r7, save->save_r8, 0); + + pmap_map_block(current_act()->map->pmap, (addr64_t)save->save_r4, /* Map in the block */ + save->save_r5, save->save_r6, save->save_r7, save->save_r8, 0); return 1; /* Return and check for ASTs... */ @@ -210,28 +253,16 @@ int diagCall(struct savearea *save) { /* * Allows direct control of alignment handling. * - * The bottom two bits of the parameter are used to set the two control bits: - * 0b00 - !trapUnalignbit - !notifyUnalignbit - default - instruction is emulated - * 0b01 - !trapUnalignbit - notifyUnalignbit - emulation is done, but traps afterwards - * 0b10 - trapUnalignbit - !notifyUnalignbit - no emulation - causes exception - * 0b11 - trapUnalignbit - notifyUnalignbit - no emulation - causes exception + * The bottom bit of the parameter is used to set the control bit, enaNotifyEM. */ case dgAlign: - temp = current_act()->mact.specFlags; /* Save the old values */ - - temp = ((current_act()->mact.specFlags >> (31 - trapUnalignbit - 1)) /* Reformat them to pass back */ - | (current_act()->mact.specFlags >> (31 - notifyUnalignbit))) & 3; - - temp2 = ((save->save_r4 << (31 - trapUnalignbit - 1)) & trapUnalign) /* Move parms into flag format */ - | ((save->save_r4 << (31 - notifyUnalignbit)) & notifyUnalign); - - current_act()->mact.specFlags &= ~(trapUnalign | notifyUnalign); /* Clean the old ones */ - current_act()->mact.specFlags |= temp2; /* Set the new ones */ + temp = dgWork.dgFlags; /* Save the old values */ - per_proc_info[cpu_number()].spcFlags = current_act()->mact.specFlags; - - save->save_r3 = temp; + temp2 = (save->save_r4 & 1) << (31 - enaNotifyEMb); /* Move parms into flag format */ + dgWork.dgFlags = (temp & ~enaNotifyEM) | temp2; /* Set the flag */ + + save->save_r3 = (temp >> (31 - enaNotifyEMb)) & 1; /* Return the original */ return 1; /* Return and check for ASTs... */ @@ -240,14 +271,149 @@ int diagCall(struct savearea *save) { */ case dgBootScreen: -#if 0 ml_set_interrupts_enabled(1); - (void)copyout((char *)&vinfo, (char *)save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */ + (void)copyout((char *)&vinfo, CAST_DOWN(char *, save->save_r4), sizeof(struct vc_info)); /* Copy out the video info */ + ml_set_interrupts_enabled(0); + return 1; /* Return and check for ASTs... */ + +/* + * Don't return info for boot screen + */ + case dgCPNull: + + ml_set_interrupts_enabled(1); + (void)copyout((char *)&vinfo, CAST_DOWN(char *, save->save_r4), 0); /* Copy out nothing */ ml_set_interrupts_enabled(0); -#endif return 1; /* Return and check for ASTs... */ +/* + * Test machine check handler - only on 64-bit machines + */ + case dgmck: + if(!(per_proc_info[0].pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */ + + fwEmMck(save->save_r4, save->save_r5, save->save_r6, save->save_r7, save->save_r8, save->save_r9); /* Start injecting */ + + return -1; /* Return and don't check for ASTs... */ + +/* + * Set 64-bit on or off - only on 64-bit machines + */ + case dg64: + if(!(per_proc_info[0].pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */ + + srrwrk = save->save_srr1 >> 63; /* Save the old 64-bit bit */ + + save->save_srr1 = (save->save_srr1 & 0x7FFFFFFFFFFFFFFFULL) | (save->save_r4 << 63); /* Set the requested mode */ + save->save_r3 = srrwrk; /* Return the old value */ + + return -1; /* Return and don't check for ASTs... */ +/* + * Test the probe read function + */ + + case dgProbeRead: + + src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5); /* Merge into 64-bit */ + save->save_r3 = ml_probe_read_64(src, &temp); /* Try the address */ + save->save_r4 = temp; /* Return the data */ + return -1; /* Regurn and don't check for ASTs */ + +/* + * Do perf monitor stuff + */ + + case dgPerfMon: + + setPmon(save->save_r4, save->save_r5); /* Go load up MMCR0 and MMCR1 */ + return -1; /* Regurn and don't check for ASTs */ + +/* + * Map a page + * Don't bother to check for any errors. + * parms - vaddr, paddr, prot, attributes + */ + case dgMapPage: + + (void)mapping_map(current_act()->map->pmap, /* Map in the page */ + (addr64_t)(((save->save_r5 & 0xFFFFFFFF) << 32) | (save->save_r5 & 0xFFFFFFFF)), save->save_r6, 0, 1, VM_PROT_READ|VM_PROT_WRITE); + + return -1; /* Return and check for ASTs... */ + +/* + * SCOM interface + * parms - pointer to scomcomm + */ + case dgScom: + + ret = copyin((unsigned int)(save->save_r4), &sarea, sizeof(scomcomm)); /* Get the data */ + if(ret) return 0; /* Copyin failed - return an exception */ + + sarea.scomstat = 0xFFFFFFFFFFFFFFFFULL; /* Clear status */ + cpu = cpu_number(); /* Get us */ + + if((sarea.scomcpu < NCPUS) && machine_slot[sarea.scomcpu].running) { + if(sarea.scomcpu == cpu) { /* Is it us? */ + if(sarea.scomfunc) { /* Are we writing */ + sarea.scomstat = ml_scom_write(sarea.scomreg, sarea.scomdata); /* Write scom */ + } + else { + sarea.scomstat = ml_scom_read(sarea.scomreg, &sarea.scomdata); /* Read scom */ + } + } + else { /* Otherwise, tell the other processor */ + (void)cpu_signal(sarea.scomcpu, SIGPcpureq, CPRQscom ,(unsigned int)&sarea); /* Ask him to do this */ + (void)hw_cpu_sync((unsigned long)&sarea.scomstat, LockTimeOut); /* Wait for the other processor to get its temperature */ + } + } + + ret = copyout(&sarea, (unsigned int)(save->save_r4), sizeof(scomcomm)); /* Get the data */ + if(ret) return 0; /* Copyin failed - return an exception */ + + return -1; /* Return and check for ASTs... */ + + case dgWar: /* Set or reset workaround flags */ + + save->save_r3 = (uint32_t)warFlags; /* Get the old flags */ + oldwar = warFlags; /* Remember the old war flags */ + + subc = (int32_t)save->save_r4; /* Extract the subcommand */ + switch(subc) { /* Do what we need */ + case 1: /* Replace all */ + warFlags = (uint32_t)save->save_r5; /* Do them all */ + break; + + case 2: /* Turn on selected workarounds */ + warFlags = warFlags | (uint32_t)save->save_r5; + break; + + case 3: /* Turn off selected workarounds */ + warFlags = warFlags & ~((uint32_t)save->save_r5); + break; + + case 4: /* Start up selected workaround */ + break; + + case 5: /* Stop selected workaround */ + break; + + case 6: /* Reset specific workaround parameters to default */ + break; + + case 7: /* Set workaround parameters */ + break; + + default: + + break; + + } + + save->save_r3 = oldwar; /* Pass back original */ + return -1; + + default: /* Handle invalid ones */ return 0; /* Return an exception */ @@ -256,7 +422,7 @@ int diagCall(struct savearea *save) { }; kern_return_t testPerfTrap(int trapno, struct savearea *ss, - unsigned int dsisr, unsigned int dar) { + unsigned int dsisr, addr64_t dar) { if(trapno != T_ALIGNMENT) return KERN_FAILURE; @@ -266,3 +432,4 @@ kern_return_t testPerfTrap(int trapno, struct savearea *ss, return KERN_SUCCESS; } +