X-Git-Url: https://git.saurik.com/apple/xnu.git/blobdiff_plain/91447636331957f3d9b5ca5b508f07c526b0074d..c0fea4742e91338fffdcf79f86a7c1d5e2b97eb1:/osfmk/i386/proc_reg.h?ds=sidebyside

diff --git a/osfmk/i386/proc_reg.h b/osfmk/i386/proc_reg.h
index 153b6bdbd..27ca1e7ed 100644
--- a/osfmk/i386/proc_reg.h
+++ b/osfmk/i386/proc_reg.h
@@ -189,9 +189,17 @@ static inline void set_cr3(unsigned int value)
 	__asm__ volatile("mov %0, %%cr3" : : "r" (value));
 }
 
-/* Implemented in locore: */
-extern uint32_t	get_cr4(void);
-extern void	set_cr4(uint32_t);
+static inline uint32_t get_cr4(void)
+{
+	uint32_t cr4;
+	__asm__ volatile("mov %%cr4, %0" : "=r" (cr4));
+	return(cr4);
+}
+
+static inline void set_cr4(uint32_t value)
+{
+	__asm__ volatile("mov %0, %%cr4" : : "r" (value));
+}
 
 static inline void clear_ts(void)
 {
@@ -210,23 +218,30 @@ static inline void set_tr(unsigned int seg)
 	__asm__ volatile("ltr %0" : : "rm" ((unsigned short)(seg)));
 }
 
-static inline unsigned short get_ldt(void)
+static inline unsigned short sldt(void)
 {
 	unsigned short seg;
 	__asm__ volatile("sldt %0" : "=rm" (seg));
 	return(seg);
 }
 
-static inline void set_ldt(unsigned int seg)
+static inline void lldt(unsigned int seg)
 {
 	__asm__ volatile("lldt %0" : : "rm" ((unsigned short)(seg)));
 }
 
+#ifdef MACH_KERNEL_PRIVATE
+extern void flush_tlb64(void);
 static inline void flush_tlb(void)
 {
 	unsigned long	cr3_temp;
+	if (cpu_mode_is64bit()) {
+		flush_tlb64();
+		return;
+	}
 	__asm__ volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (cr3_temp) :: "memory");
 }
+#endif	/* MACH_KERNEL_PRIVATE */
 
 static inline void wbinvd(void)
 {
@@ -304,8 +319,14 @@ __END_DECLS
 #define MSR_IA32_PERFCTR0		0xc1
 #define MSR_IA32_PERFCTR1		0xc2
 
+#define MSR_PMG_CST_CONFIG_CONTROL	0xe2
+
 #define MSR_IA32_BBL_CR_CTL		0x119
 
+#define MSR_IA32_SYSENTER_CS		0x174
+#define MSR_IA32_SYSENTER_ESP		0x175
+#define MSR_IA32_SYSENTER_EIP		0x176
+
 #define MSR_IA32_MCG_CAP		0x179
 #define MSR_IA32_MCG_STATUS		0x17a
 #define MSR_IA32_MCG_CTL		0x17b
@@ -313,6 +334,9 @@ __END_DECLS
 #define MSR_IA32_EVNTSEL0		0x186
 #define MSR_IA32_EVNTSEL1		0x187
 
+#define MSR_IA32_PERF_STS		0x198
+#define MSR_IA32_PERF_CTL		0x199
+
 #define MSR_IA32_MISC_ENABLE		0x1a0
 
 #define MSR_IA32_DEBUGCTLMSR		0x1d9
@@ -344,4 +368,20 @@ __END_DECLS
 #define MSR_IA32_MTRR_FIX4K_F0000	0x26e
 #define MSR_IA32_MTRR_FIX4K_F8000	0x26f
 
+
+#define	MSR_IA32_EFER		0xC0000080
+#define	MSR_IA32_EFER_SCE		0x00000001
+#define	MSR_IA32_EFER_LME		0x00000100
+#define	MSR_IA32_EFER_LMA		0x00000400
+#define	MSR_IA32_EFER_NXE		0x00000800
+
+#define	MSR_IA32_STAR		0xC0000081
+#define	MSR_IA32_LSTAR		0xC0000082
+#define	MSR_IA32_CSTAR		0xC0000083
+#define	MSR_IA32_FMASK		0xC0000084
+
+#define MSR_IA32_FS_BASE	0xC0000100
+#define MSR_IA32_GS_BASE	0xC0000101
+#define MSR_IA32_KERNEL_GS_BASE	0xC0000102
+
 #endif	/* _I386_PROC_REG_H_ */