X-Git-Url: https://git.saurik.com/apple/xnu.git/blobdiff_plain/43866e378188c25dd1e2208016ab3cbeb086ae6c..2d21ac55c334faf3a56e5634905ed6987fc787d4:/osfmk/ppc/atomic_switch.s diff --git a/osfmk/ppc/atomic_switch.s b/osfmk/ppc/atomic_switch.s index 7d9579efa..ef1edd940 100644 --- a/osfmk/ppc/atomic_switch.s +++ b/osfmk/ppc/atomic_switch.s @@ -1,16 +1,19 @@ /* * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. * - * @APPLE_LICENSE_HEADER_START@ - * - * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. + * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ * * This file contains Original Code and/or Modifications of Original Code * as defined in and that are subject to the Apple Public Source License * Version 2.0 (the 'License'). You may not use this file except in - * compliance with the License. Please obtain a copy of the License at - * http://www.opensource.apple.com/apsl/ and read it before using this - * file. + * compliance with the License. The rights granted to you under the License + * may not be used to create, or enable the creation or redistribution of, + * unlawful or unlicensed copies of an Apple operating system, or to + * circumvent, violate, or enable the circumvention or violation of, any + * terms of an Apple operating system software license agreement. + * + * Please obtain a copy of the License at + * http://www.opensource.apple.com/apsl/ and read it before using this file. * * The Original Code and all software distributed under the License are * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER @@ -20,7 +23,7 @@ * Please see the License for the specific language governing rights and * limitations under the License. * - * @APPLE_LICENSE_HEADER_END@ + * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ */ #include #include @@ -63,7 +66,7 @@ ENTRY(atomic_switch_syscall, TAG_NO_FRAME_USED) * Note: the BlueBox fast path system calls (-1 and -2) we handled as * an ultra-fast trap in lowmem_vectors. */ - li r5, BTTD_SYSCALL_VECTOR + lwz r5,bbSysCall(r13) ; Pick up the syscall vector b .L_CallPseudoKernel ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) @@ -76,7 +79,7 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) cmplwi cr7,r24,BB_RFI_TRAP ; Is this an RFI? beq cr7,.L_ExitPseudoKernel ; Yes... - li r5, BTTD_TRAP_VECTOR + lwz r5,bbTrap(r13) ; Pick up the trap vector /****************************************************************************** * void CallPseudoKernel ( int vector, thread_act_t * act, BEDA_t * beda, savearea *sv ) @@ -107,7 +110,8 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) .L_CallPseudoKernel: - mfsprg r2,0 ; Get the per_proc + mfsprg r2,1 ; Get the current activation + lwz r2,ACT_PER_PROC(r2) ; Get the per_proc block rlwinm r6,r26,0,0,19 ; Start of page is bttd lwz r7,ACT_MACT_SPF(r13) ; Get special flags lwz r1,BTTD_INTERRUPT_VECTOR(r6) ; Get interrupt vector @@ -137,20 +141,19 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) .L_CallFromPreemptiveThread: - lwz r1,savesrr0(r4) ; Get current PC - lwz r2,saver1(r4) ; Get current R1 - lwz r3,savesrr1(r4) ; Get current MSR + lwz r1,savesrr0+4(r4) ; Get current PC + lwz r2,saver1+4(r4) ; Get current R1 + lwz r3,savesrr1+4(r4) ; Get current MSR stw r1,BEDA_SRR0(r26) ; Save current PC rlwinm r3,r3,0,MSR_BE_BIT+1,MSR_SE_BIT-1 ; Clear SE|BE bits in MSR stw r2,BEDA_SPRG1(r26) ; Save current R1 - stw r3,savesrr1(r4) ; Load new MSR + stw r3,savesrr1+4(r4) ; Load new MSR lwz r1,BEDA_SPRG0(r26) ; Get replacement R1 - lwzx r2,r5,r6 ; Load vector address + stw r5,savesrr0+4(r4) ; Save vector as PC stw r3,BEDA_SRR1(r26) ; Update saved MSR - stw r1,saver1(r4) ; Load up new R1 - stw r2,savesrr0(r4) ; Save vector as PC + stw r1,saver1+4(r4) ; Load up new R1 b EXT(fastexit) ; Go back and take the fast path exit... @@ -186,7 +189,7 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) ori r7,r7,(0x8000 >> (bbNoMachSCbit - 16)) ; Disable Mach SCs for Blue Box cmpwi r2,0 ; Is this a preemptive thread - stw r1,savectr(r4) ; Update CTR + stw r1,savectr+4(r4) ; Update CTR beq .L_ExitFromPreemptiveThread lwz r8,BTTD_INTCONTROLWORD(r6) ; Get ICW @@ -202,11 +205,11 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) beq cr1,.L_ExitToSystemContext ; We are in system context beq .L_ExitUpdateRuptControlWord ; We do not have a pending interrupt - lwz r2,saver1(r4) ; Get current R1 + lwz r2,saver1+4(r4) ; Get current R1 lwz r1,BEDA_SPRG0(r26) ; Get replacement R1 stw r2,BEDA_SPRG1(r26) ; Save current R1 - stw r1,saver1(r4) ; Load up new R1 - lwz r3,BTTD_PENDINGINT_VECTOR(r6) ; Get pending interrupt PC + stw r1,saver1+4(r4) ; Load up new R1 + lwz r3,bbPending(r13) ; Get pending interrupt PC b .L_ExitAbortExit ; Abort and Exit .L_ExitToSystemContext: @@ -217,18 +220,19 @@ ENTRY(atomic_switch_trap, TAG_NO_FRAME_USED) stw r1,savecr(r4) ; Update CR .L_ExitFromPreemptiveThread: - mfsprg r3,0 ; Get the per_proc - lwz r2,savesrr1(r4) ; Get current MSR + mfsprg r3,1 ; Get the current activation + lwz r3,ACT_PER_PROC(r3) ; Get the per_proc block + lwz r2,savesrr1+4(r4) ; Get current MSR lwz r1,BEDA_SRR1(r26) ; Get new MSR stw r7,ACT_MACT_SPF(r13) ; Update special flags stw r7,spcFlags(r3) ; Update per_proc version rlwimi r2,r1,0,MSR_FE0_BIT,MSR_FE1_BIT ; Insert FE0,FE1,SE,BE bits lwz r3,BEDA_SRR0(r26) ; Get new PC - stw r2,savesrr1(r4) ; Update MSR + stw r2,savesrr1+4(r4) ; Update MSR .L_ExitAbortExit: - stw r3,savesrr0(r4) ; Update PC + stw r3,savesrr0+4(r4) ; Update PC b EXT(fastexit) ; Go back and take the fast path exit...