X-Git-Url: https://git.saurik.com/apple/xnu.git/blobdiff_plain/1c79356b52d46aa6b508fb032f5ae709b1f2897b..527f99514973766e9c0382a4d8550dfb00f54939:/osfmk/mach/i386/fp_reg.h diff --git a/osfmk/mach/i386/fp_reg.h b/osfmk/mach/i386/fp_reg.h index 39b6c761c..718298b59 100644 --- a/osfmk/mach/i386/fp_reg.h +++ b/osfmk/mach/i386/fp_reg.h @@ -1,77 +1,33 @@ /* * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. * - * @APPLE_LICENSE_HEADER_START@ - * - * The contents of this file constitute Original Code as defined in and - * are subject to the Apple Public Source License Version 1.1 (the - * "License"). You may not use this file except in compliance with the - * License. Please obtain a copy of the License at - * http://www.apple.com/publicsource and read it before using this file. - * - * This Original Code and all software distributed under the License are - * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER + * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ + * + * This file contains Original Code and/or Modifications of Original Code + * as defined in and that are subject to the Apple Public Source License + * Version 2.0 (the 'License'). You may not use this file except in + * compliance with the License. The rights granted to you under the License + * may not be used to create, or enable the creation or redistribution of, + * unlawful or unlicensed copies of an Apple operating system, or to + * circumvent, violate, or enable the circumvention or violation of, any + * terms of an Apple operating system software license agreement. + * + * Please obtain a copy of the License at + * http://www.opensource.apple.com/apsl/ and read it before using this file. + * + * The Original Code and all software distributed under the License are + * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the - * License for the specific language governing rights and limitations - * under the License. + * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. + * Please see the License for the specific language governing rights and + * limitations under the License. * - * @APPLE_LICENSE_HEADER_END@ + * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ */ /* * @OSF_COPYRIGHT@ */ -/* - * HISTORY - * - * Revision 1.1.1.1 1998/09/22 21:05:31 wsanchez - * Import of Mac OS X kernel (~semeria) - * - * Revision 1.1.1.1 1998/03/07 02:25:47 wsanchez - * Import of OSF Mach kernel (~mburg) - * - * Revision 1.2.6.1 1994/09/23 02:37:03 ezf - * change marker to not FREE - * [1994/09/22 21:39:57 ezf] - * - * Revision 1.2.2.2 1993/06/09 02:40:30 gm - * Added to OSF/1 R1.3 from NMK15.0. - * [1993/06/02 21:16:11 jeffc] - * - * Revision 1.2 1993/04/19 16:33:51 devrcs - * ansi C conformance changes - * [1993/02/02 18:56:01 david] - * - * Revision 1.1 1992/09/30 02:30:43 robert - * Initial revision - * - * $EndLog$ - */ -/* CMU_HIST */ -/* - * Revision 2.1.1.1.2.1 92/03/03 16:21:23 jeffreyh - * Merged up to Trunk - * [92/02/26 jeffreyh] - * - * Revision 2.4 92/02/26 13:10:29 elf - * Added stupid alaises to make i386/fpu.c compile. RVB will fix. - * - * [92/02/26 elf] - * - * Revision 2.3 92/02/26 12:47:46 elf - * Installed from i386 directory. - * [92/02/26 danner] - * - * - * Revision 2.2 92/01/03 20:19:47 dbg - * Move this file to mach/i386. Add FP_NO..FP_387 codes for - * floating-point processor status. Error bits in control - * register are masks, not enables. - * [91/10/19 dbg] - * - */ -/* CMU_ENDHIST */ /* * Mach Operating System * Copyright (c) 1992-1989 Carnegie Mellon University @@ -102,30 +58,88 @@ #ifndef _I386_FP_SAVE_H_ #define _I386_FP_SAVE_H_ -/* - * Floating point registers and status, as saved - * and restored by FP save/restore instructions. - */ -struct i386_fp_save { - unsigned short fp_control; /* control */ - unsigned short fp_unused_1; - unsigned short fp_status; /* status */ - unsigned short fp_unused_2; - unsigned short fp_tag; /* register tags */ - unsigned short fp_unused_3; - unsigned int fp_eip; /* eip at failed instruction */ - unsigned short fp_cs; /* cs at failed instruction */ - unsigned short fp_opcode; /* opcode of failed instruction */ - unsigned int fp_dp; /* data address */ - unsigned short fp_ds; /* data segment */ - unsigned short fp_unused_4; -}; -struct i386_fp_regs { - unsigned short fp_reg_word[5][8]; - /* space for 8 80-bit FP registers */ +#ifdef MACH_KERNEL_PRIVATE + + +struct x86_fx_thread_state { + unsigned short fx_control; /* control */ + unsigned short fx_status; /* status */ + unsigned char fx_tag; /* register tags */ + unsigned char fx_bbz1; /* better be zero when calling fxrtstor */ + unsigned short fx_opcode; + union { + struct { /* 32-bit layout: */ + unsigned int fx_eip; /* eip instruction */ + unsigned short fx_cs; /* cs instruction */ + unsigned short fx_bbz2; /* better be zero when calling fxrtstor */ + unsigned int fx_dp; /* data address */ + unsigned short fx_ds; /* data segment */ + unsigned short fx_bbz3; /* better be zero when calling fxrtstor */ + }; + struct { /* 64-bit layout: */ + uint64_t fx_rip; /* instruction pointer */ + uint64_t fx_rdp; /* data pointer */ + }; + }; + unsigned int fx_MXCSR; + unsigned int fx_MXCSR_MASK; + unsigned short fx_reg_word[8][8]; /* STx/MMx registers */ + unsigned short fx_XMM_reg[8][16]; /* XMM0-XMM15 on 64 bit processors */ + /* XMM0-XMM7 on 32 bit processors... unused storage reserved */ + + unsigned char fx_reserved[16*5]; /* reserved by intel for future + * expansion */ + unsigned int fp_valid; + unsigned int fp_save_layout; + unsigned char fx_pad[8]; +}__attribute__ ((packed)); + +struct xsave_header { + uint64_t xstate_bv; + uint64_t xcomp_bv; + uint8_t xhrsvd[48]; }; +typedef struct { uint64_t lo64, hi64; }__attribute__ ((packed)) reg128_t; +typedef struct { reg128_t lo128, hi128; }__attribute__ ((packed)) reg256_t; +typedef struct { reg256_t lo256, hi256; }__attribute__ ((packed)) reg512_t; + +struct x86_avx_thread_state { + struct x86_fx_thread_state fp; + struct xsave_header _xh; /* Offset 512, xsave header */ + reg128_t x_YMM_Hi128[16]; /* Offset 576, high YMMs `*/ + /* Offset 832, end */ +}__attribute__ ((packed)); + +struct x86_avx512_thread_state { + struct x86_fx_thread_state fp; + struct xsave_header _xh; /* Offset 512, xsave header */ + reg128_t x_YMM_Hi128[16]; /* Offset 576, high YMMs */ + + uint64_t x_pad[16]; /* Offset 832, unused AMD LWP */ + uint64_t x_BNDREGS[8]; /* Offset 960, unused MPX */ + uint64_t x_BNDCTL[8]; /* Offset 1024, unused MPX */ + + uint64_t x_Opmask[8]; /* Offset 1088, K0-K7 */ + reg256_t x_ZMM_Hi256[16]; /* Offset 1152, ZMM0..15[511:256] */ + reg512_t x_Hi16_ZMM[16]; /* Offset 1664, ZMM16..31[511:0] */ + /* Offset 2688, end */ +}__attribute__ ((packed)); + +typedef union { + struct x86_fx_thread_state fx; + struct x86_avx_thread_state avx; +#if !defined(RC_HIDE_XNU_J137) + struct x86_avx512_thread_state avx512; +#endif +} x86_ext_thread_state_t; + +#define EVEX_PREFIX 0x62 /* AVX512's EVEX vector operation prefix */ +#define VEX2_PREFIX 0xC5 /* VEX 2-byte prefix for Opmask instructions */ +#define VEX3_PREFIX 0xC4 /* VEX 3-byte prefix for Opmask instructions */ + +#endif /* MACH_KERNEL_PRIVATE */ /* * Control register */ @@ -180,5 +194,6 @@ struct i386_fp_regs { #define FP_SOFT 1 /* software FP emulator */ #define FP_287 2 /* 80287 */ #define FP_387 3 /* 80387 or 80486 */ +#define FP_FXSR 4 /* Fast save/restore SIMD Extension */ #endif /* _I386_FP_SAVE_H_ */