/*
- * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved.
*
- * @APPLE_LICENSE_HEADER_START@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License"). You may not use this file except in compliance with the
- * License. Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
*
- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ *
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
- * License for the specific language governing rights and limitations
- * under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.
*
- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
/*
* Mach Operating System
#ifndef _MACH_MACHINE_H_
#define _MACH_MACHINE_H_
-#include <sys/appleapiopts.h>
+#ifndef __ASSEMBLER__
+#include <stdint.h>
#include <mach/machine/vm_types.h>
#include <mach/boolean.h>
-/*
- * For each host, there is a maximum possible number of
- * cpus that may be available in the system. This is the
- * compile-time constant NCPUS, which is defined in cpus.h.
- *
- * In addition, there is a machine_slot specifier for each
- * possible cpu in the system.
- */
-
-struct machine_info {
- integer_t major_version; /* kernel major version id */
- integer_t minor_version; /* kernel minor version id */
- integer_t max_cpus; /* max number of cpus compiled */
- integer_t avail_cpus; /* number actually available */
- vm_size_t memory_size; /* size of memory in bytes */
-};
-
-typedef struct machine_info *machine_info_t;
-typedef struct machine_info machine_info_data_t; /* bogus */
-
typedef integer_t cpu_type_t;
typedef integer_t cpu_subtype_t;
+typedef integer_t cpu_threadtype_t;
#define CPU_STATE_MAX 4
#define CPU_STATE_NICE 3
#ifdef KERNEL_PRIVATE
-#ifdef __APPLE_API_UNSTABLE
-
-struct machine_slot {
-/*boolean_t*/integer_t is_cpu; /* is there a cpu in this slot? */
- cpu_type_t cpu_type; /* type of cpu */
- cpu_subtype_t cpu_subtype; /* subtype of cpu */
-/*boolean_t*/integer_t running; /* is cpu running */
- integer_t cpu_ticks[CPU_STATE_MAX];
- integer_t clock_freq; /* clock interrupt frequency */
+
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+cpu_type_t cpu_type(void);
+
+cpu_subtype_t cpu_subtype(void);
+
+cpu_threadtype_t cpu_threadtype(void);
+__END_DECLS
+
+#ifdef MACH_KERNEL_PRIVATE
+
+struct machine_info {
+ integer_t major_version; /* kernel major version id */
+ integer_t minor_version; /* kernel minor version id */
+ integer_t max_cpus; /* max number of CPUs possible */
+ uint32_t memory_size; /* size of memory in bytes, capped at 2 GB */
+ uint64_t max_mem; /* actual size of physical memory */
+ uint32_t physical_cpu; /* number of physical CPUs now available */
+ integer_t physical_cpu_max; /* max number of physical CPUs possible */
+ uint32_t logical_cpu; /* number of logical cpu now available */
+ integer_t logical_cpu_max; /* max number of physical CPUs possible */
};
-typedef struct machine_slot *machine_slot_t;
-typedef struct machine_slot machine_slot_data_t; /* bogus */
+typedef struct machine_info *machine_info_t;
+typedef struct machine_info machine_info_data_t;
extern struct machine_info machine_info;
-extern struct machine_slot machine_slot[];
-#endif /* __APPLE_API_UNSTABLE */
-#endif /* KERNEL_PRIVATE */
+__BEGIN_DECLS
+cpu_type_t slot_type(
+ int slot_num);
+
+cpu_subtype_t slot_subtype(
+ int slot_num);
+
+cpu_threadtype_t slot_threadtype(
+ int slot_num);
+__END_DECLS
+
+#endif /* MACH_KERNEL_PRIVATE */
+#endif /* KERNEL_PRIVATE */
+
+
+/*
+ * Capability bits used in the definition of cpu_type.
+ */
+#define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */
+#define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */
/*
* Machine types known by all.
/* skip ((cpu_type_t) 4) */
/* skip ((cpu_type_t) 5) */
#define CPU_TYPE_MC680x0 ((cpu_type_t) 6)
-#define CPU_TYPE_I386 ((cpu_type_t) 7)
+#define CPU_TYPE_X86 ((cpu_type_t) 7)
+#define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */
+#define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64)
+
/* skip CPU_TYPE_MIPS ((cpu_type_t) 8) */
/* skip ((cpu_type_t) 9) */
#define CPU_TYPE_MC98000 ((cpu_type_t) 10)
#define CPU_TYPE_HPPA ((cpu_type_t) 11)
-/* skip CPU_TYPE_ARM ((cpu_type_t) 12) */
+#define CPU_TYPE_ARM ((cpu_type_t) 12)
#define CPU_TYPE_MC88000 ((cpu_type_t) 13)
#define CPU_TYPE_SPARC ((cpu_type_t) 14)
#define CPU_TYPE_I860 ((cpu_type_t) 15)
/* skip CPU_TYPE_ALPHA ((cpu_type_t) 16) */
/* skip ((cpu_type_t) 17) */
#define CPU_TYPE_POWERPC ((cpu_type_t) 18)
-
+#define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | CPU_ARCH_ABI64)
/*
* Machine subtypes (these are defined here, instead of in a machine
* regardless of where is it compiled).
*/
+/*
+ * Capability bits used in the definition of cpu_subtype.
+ */
+#define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */
+#define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */
+
+
/*
* Object files that are hand-crafted to run on any
* implementation of an architecture are tagged with
#define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0)
#define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1)
+/*
+ * Machine threadtypes.
+ * This is none - not defined - for most machine types/subtypes.
+ */
+#define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0)
+
/*
* VAX subtypes (these do *not* necessary conform to the actual cpu
* ID assigned by DEC available via the SID register).
#define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3)
/*
- * I386 subtypes.
+ * I386 subtypes
*/
-#define CPU_SUBTYPE_I386_ALL ((cpu_subtype_t) 3)
-#define CPU_SUBTYPE_386 ((cpu_subtype_t) 3)
-#define CPU_SUBTYPE_486 ((cpu_subtype_t) 4)
-#define CPU_SUBTYPE_486SX ((cpu_subtype_t) 4 + 128)
-#define CPU_SUBTYPE_586 ((cpu_subtype_t) 5)
#define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4))
+
+#define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0)
+#define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0)
+#define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0)
+#define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128
+#define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0)
#define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1)
#define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3)
#define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5)
+#define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6)
+#define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7)
+#define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0)
+#define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1)
+#define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2)
+#define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0)
+#define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0)
+#define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1)
+#define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0)
+#define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1)
+#define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0)
+#define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1)
#define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15)
#define CPU_SUBTYPE_INTEL_FAMILY_MAX 15
#define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4)
#define CPU_SUBTYPE_INTEL_MODEL_ALL 0
+/*
+ * X86 subtypes.
+ */
+
+#define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3)
+#define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3)
+#define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4)
+
+
+#define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1)
+
/*
* Mips subtypes.
*/
#define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11)
#define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100)
+/*
+ * ARM subtypes
+ */
+#define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0)
+#define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5)
+#define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6)
+#define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7)
+#define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8)
+#define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9)
+#define CPU_SUBTYPE_ARM_V7F ((cpu_subtype_t) 10) /* Cortex A9 */
+#define CPU_SUBTYPE_ARM_V7S ((cpu_subtype_t) 11) /* Swift */
+#define CPU_SUBTYPE_ARM_V7K ((cpu_subtype_t) 12) /* Kirkwood40 */
+#define CPU_SUBTYPE_ARM_V6M ((cpu_subtype_t) 14) /* Not meant to be run under xnu */
+#define CPU_SUBTYPE_ARM_V7M ((cpu_subtype_t) 15) /* Not meant to be run under xnu */
+#define CPU_SUBTYPE_ARM_V7EM ((cpu_subtype_t) 16) /* Not meant to be run under xnu */
+
+#endif /* !__ASSEMBLER__ */
+
+/*
+ * CPU families (sysctl hw.cpufamily)
+ *
+ * These are meant to identify the CPU's marketing name - an
+ * application can map these to (possibly) localized strings.
+ * NB: the encodings of the CPU families are intentionally arbitrary.
+ * There is no ordering, and you should never try to deduce whether
+ * or not some feature is available based on the family.
+ * Use feature flags (eg, hw.optional.altivec) to test for optional
+ * functionality.
+ */
+#define CPUFAMILY_UNKNOWN 0
+#define CPUFAMILY_POWERPC_G3 0xcee41549
+#define CPUFAMILY_POWERPC_G4 0x77c184ae
+#define CPUFAMILY_POWERPC_G5 0xed76d8aa
+#define CPUFAMILY_INTEL_6_13 0xaa33392b
+#define CPUFAMILY_INTEL_YONAH 0x73d67300
+#define CPUFAMILY_INTEL_MEROM 0x426f69ef
+#define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc
+#define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2
+#define CPUFAMILY_INTEL_WESTMERE 0x573b5eec
+#define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c
+#define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835
+#define CPUFAMILY_INTEL_HASWELL 0x10b282dc
+#define CPUFAMILY_ARM_9 0xe73283ae
+#define CPUFAMILY_ARM_11 0x8ff620d8
+#define CPUFAMILY_ARM_XSCALE 0x53b005f5
+#define CPUFAMILY_ARM_12 0xbd1b0ae9
+#define CPUFAMILY_ARM_13 0x0cc90e64
+#define CPUFAMILY_ARM_14 0x96077ef1
+#define CPUFAMILY_ARM_SWIFT 0x1e2d6381
+
+/* The following synonyms are deprecated: */
+#define CPUFAMILY_INTEL_6_14 CPUFAMILY_INTEL_YONAH
+#define CPUFAMILY_INTEL_6_15 CPUFAMILY_INTEL_MEROM
+#define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN
+#define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM
+
+#define CPUFAMILY_INTEL_CORE CPUFAMILY_INTEL_YONAH
+#define CPUFAMILY_INTEL_CORE2 CPUFAMILY_INTEL_MEROM
+
+
#endif /* _MACH_MACHINE_H_ */