+#define CPUID_EXTFEATURE_SYSCALL _Bit(11) /* SYSCALL/sysret */
+#define CPUID_EXTFEATURE_XD _Bit(20) /* eXecute Disable */
+
+#define CPUID_EXTFEATURE_1GBPAGE _Bit(26) /* 1GB pages */
+#define CPUID_EXTFEATURE_RDTSCP _Bit(27) /* RDTSCP */
+#define CPUID_EXTFEATURE_EM64T _Bit(29) /* Extended Mem 64 Technology */
+
+#define CPUID_EXTFEATURE_LAHF _HBit(0) /* LAFH/SAHF instructions */
+
+/*
+ * The CPUID_EXTFEATURE_XXX values define 64-bit values
+ * returned in %ecx:%edx to a CPUID request with %eax of 0x80000007:
+ */
+#define CPUID_EXTFEATURE_TSCI _Bit(8) /* TSC Invariant */
+
+#define CPUID_CACHE_SIZE 16 /* Number of descriptor values */
+
+#define CPUID_MWAIT_EXTENSION _Bit(0) /* enumeration of WMAIT extensions */
+#define CPUID_MWAIT_BREAK _Bit(1) /* interrupts are break events */
+
+#define CPUID_MODEL_YONAH 0x0E
+#define CPUID_MODEL_MEROM 0x0F
+#define CPUID_MODEL_PENRYN 0x17
+#define CPUID_MODEL_NEHALEM 0x1A
+#define CPUID_MODEL_FIELDS 0x1E /* Lynnfield, Clarksfield */
+#define CPUID_MODEL_DALES 0x1F /* Havendale, Auburndale */
+#define CPUID_MODEL_NEHALEM_EX 0x2E
+#define CPUID_MODEL_DALES_32NM 0x25 /* Clarkdale, Arrandale */
+#define CPUID_MODEL_WESTMERE 0x2C /* Gulftown, Westmere-EP/-WS */
+#define CPUID_MODEL_WESTMERE_EX 0x2F
+#define CPUID_MODEL_SANDYBRIDGE 0x2A
+#define CPUID_MODEL_JAKETOWN 0x2D
+#define CPUID_MODEL_IVYBRIDGE 0x3A
+#ifdef PRIVATE
+#define CPUID_MODEL_IVYBRIDGE_EP 0x3E
+#define CPUID_MODEL_CRYSTALWELL 0x46
+#endif
+#define CPUID_MODEL_HASWELL 0x3C
+#define CPUID_MODEL_HASWELL_SVR 0x3F
+#define CPUID_MODEL_HASWELL_ULT 0x45
+
+#define CPUID_VMM_FAMILY_UNKNOWN 0x0
+#define CPUID_VMM_FAMILY_VMWARE 0x1
+
+#ifndef ASSEMBLER
+#include <stdint.h>
+#include <mach/mach_types.h>
+#include <kern/kern_types.h>
+#include <mach/machine.h>
+
+
+typedef enum { eax, ebx, ecx, edx } cpuid_register_t;
+static inline void
+cpuid(uint32_t *data)
+{
+ asm("cpuid"
+ : "=a" (data[eax]),
+ "=b" (data[ebx]),
+ "=c" (data[ecx]),
+ "=d" (data[edx])
+ : "a" (data[eax]),
+ "b" (data[ebx]),
+ "c" (data[ecx]),
+ "d" (data[edx]));
+}
+
+static inline void
+do_cpuid(uint32_t selector, uint32_t *data)
+{
+ asm("cpuid"
+ : "=a" (data[0]),
+ "=b" (data[1]),
+ "=c" (data[2]),
+ "=d" (data[3])
+ : "a"(selector),
+ "b" (0),
+ "c" (0),
+ "d" (0));
+}
+
+/*
+ * Cache ID descriptor structure, used to parse CPUID leaf 2.
+ * Note: not used in kernel.
+ */
+typedef enum { Lnone, L1I, L1D, L2U, L3U, LCACHE_MAX } cache_type_t ;
+typedef struct {
+ unsigned char value; /* Descriptor value */
+ cache_type_t type; /* Cache type */
+ unsigned int size; /* Cache size */
+ unsigned int linesize; /* Cache line size */
+#ifdef KERNEL
+ const char *description; /* Cache description */
+#endif /* KERNEL */
+} cpuid_cache_desc_t;
+
+#ifdef KERNEL
+#define CACHE_DESC(value,type,size,linesize,text) \
+ { value, type, size, linesize, text }
+#else
+#define CACHE_DESC(value,type,size,linesize,text) \
+ { value, type, size, linesize }
+#endif /* KERNEL */
+
+/* Monitor/mwait Leaf: */
+typedef struct {
+ uint32_t linesize_min;
+ uint32_t linesize_max;
+ uint32_t extensions;
+ uint32_t sub_Cstates;
+} cpuid_mwait_leaf_t;
+
+/* Thermal and Power Management Leaf: */
+typedef struct {
+ boolean_t sensor;
+ boolean_t dynamic_acceleration;
+ boolean_t invariant_APIC_timer;
+ boolean_t core_power_limits;
+ boolean_t fine_grain_clock_mod;
+ boolean_t package_thermal_intr;
+ uint32_t thresholds;
+ boolean_t ACNT_MCNT;
+ boolean_t hardware_feedback;
+ boolean_t energy_policy;
+} cpuid_thermal_leaf_t;
+
+
+/* XSAVE Feature Leaf: */
+typedef struct {
+ uint32_t extended_state[4]; /* eax .. edx */
+} cpuid_xsave_leaf_t;
+
+
+/* Architectural Performance Monitoring Leaf: */
+typedef struct {
+ uint8_t version;
+ uint8_t number;
+ uint8_t width;
+ uint8_t events_number;
+ uint32_t events;
+ uint8_t fixed_number;
+ uint8_t fixed_width;
+} cpuid_arch_perf_leaf_t;
+
+/* Physical CPU info - this is exported out of the kernel (kexts), so be wary of changes */
+typedef struct {
+ char cpuid_vendor[16];
+ char cpuid_brand_string[48];
+ const char *cpuid_model_string;
+
+ cpu_type_t cpuid_type; /* this is *not* a cpu_type_t in our <mach/machine.h> */
+ uint8_t cpuid_family;
+ uint8_t cpuid_model;
+ uint8_t cpuid_extmodel;
+ uint8_t cpuid_extfamily;
+ uint8_t cpuid_stepping;
+ uint64_t cpuid_features;
+ uint64_t cpuid_extfeatures;
+ uint32_t cpuid_signature;
+ uint8_t cpuid_brand;
+ uint8_t cpuid_processor_flag;
+
+ uint32_t cache_size[LCACHE_MAX];
+ uint32_t cache_linesize;
+
+ uint8_t cache_info[64]; /* list of cache descriptors */
+
+ uint32_t cpuid_cores_per_package;
+ uint32_t cpuid_logical_per_package;
+ uint32_t cache_sharing[LCACHE_MAX];
+ uint32_t cache_partitions[LCACHE_MAX];
+
+ cpu_type_t cpuid_cpu_type; /* <mach/machine.h> */
+ cpu_subtype_t cpuid_cpu_subtype; /* <mach/machine.h> */
+
+ /* Per-vendor info */
+ cpuid_mwait_leaf_t cpuid_mwait_leaf;
+#define cpuid_mwait_linesize_max cpuid_mwait_leaf.linesize_max
+#define cpuid_mwait_linesize_min cpuid_mwait_leaf.linesize_min
+#define cpuid_mwait_extensions cpuid_mwait_leaf.extensions
+#define cpuid_mwait_sub_Cstates cpuid_mwait_leaf.sub_Cstates
+ cpuid_thermal_leaf_t cpuid_thermal_leaf;
+ cpuid_arch_perf_leaf_t cpuid_arch_perf_leaf;
+ cpuid_xsave_leaf_t cpuid_xsave_leaf;
+
+ /* Cache details: */
+ uint32_t cpuid_cache_linesize;
+ uint32_t cpuid_cache_L2_associativity;
+ uint32_t cpuid_cache_size;
+
+ /* Virtual and physical address aize: */
+ uint32_t cpuid_address_bits_physical;
+ uint32_t cpuid_address_bits_virtual;
+
+ uint32_t cpuid_microcode_version;
+
+ /* Numbers of tlbs per processor [i|d, small|large, level0|level1] */
+ uint32_t cpuid_tlb[2][2][2];
+ #define TLB_INST 0
+ #define TLB_DATA 1
+ #define TLB_SMALL 0
+ #define TLB_LARGE 1
+ uint32_t cpuid_stlb;
+
+ uint32_t core_count;
+ uint32_t thread_count;
+
+ /* Max leaf ids available from CPUID */
+ uint32_t cpuid_max_basic;
+ uint32_t cpuid_max_ext;
+
+ /* Family-specific info links */
+ uint32_t cpuid_cpufamily;
+ cpuid_mwait_leaf_t *cpuid_mwait_leafp;
+ cpuid_thermal_leaf_t *cpuid_thermal_leafp;
+ cpuid_arch_perf_leaf_t *cpuid_arch_perf_leafp;
+ cpuid_xsave_leaf_t *cpuid_xsave_leafp;
+ uint32_t cpuid_leaf7_features;
+} i386_cpu_info_t;
+
+#ifdef MACH_KERNEL_PRIVATE
+typedef struct {
+ char cpuid_vmm_vendor[16];
+ uint32_t cpuid_vmm_family;
+ uint32_t cpuid_vmm_bus_frequency;
+ uint32_t cpuid_vmm_tsc_frequency;
+} i386_vmm_info_t;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
projects / apple / xnu.git / blobdiff