xnu-4903.270.47.tar.gz

[apple/xnu.git] / osfmk / i386 / pmap_pcid.h

diff --git a/osfmk/i386/pmap_pcid.h b/osfmk/i386/pmap_pcid.h
index 372f0a4ed67b3d42c153739d886564fdbf47625a..87da57912af0b67b6227f26592edb21f78daf78d 100644 (file)
--- a/osfmk/i386/pmap_pcid.h
+++ b/osfmk/i386/pmap_pcid.h
@@ -2,7 +2,7 @@
  * Copyright (c) 2000-2010 Apple Inc. All rights reserved.
  *
  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
  * Copyright (c) 2000-2010 Apple Inc. All rights reserved.
  *
  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@

- * 
+ *

  * This file contains Original Code and/or Modifications of Original Code
  * as defined in and that are subject to the Apple Public Source License
  * Version 2.0 (the 'License'). You may not use this file except in
  * This file contains Original Code and/or Modifications of Original Code
  * as defined in and that are subject to the Apple Public Source License
  * Version 2.0 (the 'License'). You may not use this file except in


@@ -11,10 +11,10 @@
  * unlawful or unlicensed copies of an Apple operating system, or to
  * circumvent, violate, or enable the circumvention or violation of, any
  * terms of an Apple operating system software license agreement.
  * unlawful or unlicensed copies of an Apple operating system, or to
  * circumvent, violate, or enable the circumvention or violation of, any
  * terms of an Apple operating system software license agreement.

- * 
+ *

  * Please obtain a copy of the License at
  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  * Please obtain a copy of the License at
  * http://www.opensource.apple.com/apsl/ and read it before using this file.

- * 
+ *

  * The Original Code and all software distributed under the License are
  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * The Original Code and all software distributed under the License are
  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,


@@ -22,68 +22,48 @@
  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  * Please see the License for the specific language governing rights and
  * limitations under the License.
  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  * Please see the License for the specific language governing rights and
  * limitations under the License.

- * 
+ *

  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  */
 
  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  */
 

-#ifndef        _PMAP_PCID_
-#define _PMAP_PCID_    1
+#ifndef _PMAP_PCID_
+#define _PMAP_PCID_     1

 #if defined(__x86_64__)
 void pmap_pcid_initialize(pmap_t);
 void pmap_pcid_initialize_kernel(pmap_t);
 #if defined(__x86_64__)
 void pmap_pcid_initialize(pmap_t);
 void pmap_pcid_initialize_kernel(pmap_t);

-pcid_t pmap_pcid_allocate_pcid(int);
-void   pmap_pcid_deallocate_pcid(int, pmap_t);
-void   pmap_destroy_pcid_sync_action(void *);
-void   pmap_destroy_pcid_sync(pmap_t);
-void   pmap_pcid_lazy_flush(pmap_t);
-void   pmap_pcid_activate(pmap_t, int, boolean_t, boolean_t);
-pcid_t pcid_for_pmap_cpu_tuple(pmap_t, thread_t, int);
+pcid_t  pmap_pcid_allocate_pcid(int);
+void    pmap_pcid_deallocate_pcid(int, pmap_t);
+void    pmap_destroy_pcid_sync_action(void *);
+void    pmap_destroy_pcid_sync(pmap_t);
+void    pmap_pcid_lazy_flush(pmap_t);
+void    pmap_pcid_activate(pmap_t, int, boolean_t, boolean_t);
+pcid_t  pcid_for_pmap_cpu_tuple(pmap_t, thread_t, int);

 
 #define PMAP_INVALID ((pmap_t)0xDEAD7347)
 
 #define PMAP_INVALID ((pmap_t)0xDEAD7347)

-#define PMAP_PCID_INVALID_PCID (0xDEAD)
-#define        PMAP_PCID_MAX_REFCOUNT (0xF0)
-#define        PMAP_PCID_MIN_PCID (1)
+#define PMAP_PCID_INVALID_PCID  (0xDEAD)
+#define PMAP_PCID_MAX_REFCOUNT (0xF0)
+#define PMAP_PCID_MIN_PCID (1)

 
 extern uint32_t pmap_pcid_ncpus;
 
 static inline void
 
 extern uint32_t pmap_pcid_ncpus;
 
 static inline void

-tlb_flush_global(void) {
-       uintptr_t cr4 = get_cr4();
-       pmap_assert(ml_get_interrupts_enabled() == FALSE || get_preemption_level() !=0);
-       pmap_assert2(((cr4 & CR4_PGE) || ml_at_interrupt_context()), "CR4: 0x%lx", cr4);
-       /*
-        * We are, unfortunately, forced to rely on this expensive
-        * read-modify-write-write scheme due to the inadequate
-        * TLB invalidation ISA. The read is necessary as
-        * the kernel does not "own" the contents of CR4, the VMX
-        * feature in particular. It may be possible to
-        * avoid a global flush and instead track a generation
-        * count of kernel invalidations, but that scheme
-        * has its disadvantages as well.
-        */
-       if (cr4 & CR4_PGE) {
-               set_cr4(cr4 & ~CR4_PGE);
-               set_cr4(cr4 | CR4_PGE);
-       } else {
-               set_cr3_raw(get_cr3_raw());
-       }
-       return;
-}
-
-static inline void pmap_pcid_invalidate_all_cpus(pmap_t tpmap) {
+pmap_pcid_invalidate_all_cpus(pmap_t tpmap)
+{

        unsigned i;
 
        pmap_assert((sizeof(tpmap->pmap_pcid_coherency_vector) >= real_ncpus) && (!(sizeof(tpmap->pmap_pcid_coherency_vector) & 7)));
 
        unsigned i;
 
        pmap_assert((sizeof(tpmap->pmap_pcid_coherency_vector) >= real_ncpus) && (!(sizeof(tpmap->pmap_pcid_coherency_vector) & 7)));
 

-       for (i = 0; i < real_ncpus; i+=8) {
-          *(uint64_t *)(uintptr_t)&tpmap->pmap_pcid_coherency_vector[i] = (~0ULL);
-        }
+       for (i = 0; i < real_ncpus; i += 8) {
+               *(uint64_t *)(uintptr_t)&tpmap->pmap_pcid_coherency_vector[i] = (~0ULL);
+       }

 }
 
 }
 

-static inline void pmap_pcid_validate_current(void) {
-       int     ccpu = cpu_number();
+static inline void
+pmap_pcid_validate_current(void)
+{
+       int     ccpu = cpu_number();

        volatile uint8_t *cptr = cpu_datap(ccpu)->cpu_pmap_pcid_coherentp;
        volatile uint8_t *cptr = cpu_datap(ccpu)->cpu_pmap_pcid_coherentp;

-#ifdef PMAP_MODULE
+#ifdef  PMAP_MODULE

        pmap_assert(cptr == &(current_thread()->map->pmap->pmap_pcid_coherency_vector[ccpu]));
 #endif
        if (cptr) {
        pmap_assert(cptr == &(current_thread()->map->pmap->pmap_pcid_coherency_vector[ccpu]));
 #endif
        if (cptr) {


@@ -91,11 +71,15 @@ static inline void pmap_pcid_validate_current(void) {
        }
 }
 
        }
 }
 

-static inline void pmap_pcid_invalidate_cpu(pmap_t tpmap, int ccpu) {
+static inline void
+pmap_pcid_invalidate_cpu(pmap_t tpmap, int ccpu)
+{

        tpmap->pmap_pcid_coherency_vector[ccpu] = 0xFF;
 }
 
        tpmap->pmap_pcid_coherency_vector[ccpu] = 0xFF;
 }
 

-static inline void pmap_pcid_validate_cpu(pmap_t tpmap, int ccpu) {
+static inline void
+pmap_pcid_validate_cpu(pmap_t tpmap, int ccpu)
+{

        tpmap->pmap_pcid_coherency_vector[ccpu] = 0;
 }
 #endif /* x86_64 */
        tpmap->pmap_pcid_coherency_vector[ccpu] = 0;
 }
 #endif /* x86_64 */