- vm_offset_t cpu_reset_handler;
- uint32_t cpu_reset_type;
- uintptr_t cpu_reset_assist;
-
- void *cpu_int_state;
- IOInterruptHandler interrupt_handler;
- void *interrupt_nub;
- unsigned int interrupt_source;
- void *interrupt_target;
- void *interrupt_refCon;
-
- void *idle_timer_notify;
- void *idle_timer_refcon;
- uint64_t idle_timer_deadline;
-
- uint64_t quantum_timer_deadline;
- uint64_t rtcPop;
- rtclock_timer_t rtclock_timer;
- struct _rtclock_data_ *rtclock_datap;
-
- arm_debug_state_t *cpu_user_debug; /* Current debug state */
- vm_offset_t cpu_debug_interface_map;
-
- volatile int debugger_active;
-
- void *cpu_xcall_p0;
- void *cpu_xcall_p1;
-
-#if __ARM_SMP__ && defined(ARMA7)
- volatile uint32_t cpu_CLW_active;
- volatile uint64_t cpu_CLWFlush_req;
- volatile uint64_t cpu_CLWFlush_last;
- volatile uint64_t cpu_CLWClean_req;
- volatile uint64_t cpu_CLWClean_last;
+ bool cpu_hibernate; /* This cpu is currently hibernating the system */
+ bool cpu_running;
+ bool cluster_master;
+#if __ARM_ARCH_8_5__
+ bool sync_on_cswitch;
+#endif /* __ARM_ARCH_8_5__ */
+ /* true if processor_start() or processor_exit() is operating on this CPU */
+ bool in_state_transition;
+
+ uint32_t cpu_decrementer;
+ get_decrementer_t cpu_get_decrementer_func;
+ set_decrementer_t cpu_set_decrementer_func;
+ fiq_handler_t cpu_get_fiq_handler;
+
+ void *cpu_tbd_hardware_addr;
+ void *cpu_tbd_hardware_val;
+
+ void *cpu_console_buf;
+
+ processor_idle_t cpu_idle_notify;
+ uint64_t cpu_idle_latency;
+ uint64_t cpu_idle_pop;
+
+#if __arm__ || __ARM_KERNEL_PROTECT__
+ vm_offset_t cpu_exc_vectors;
+#endif /* __ARM_KERNEL_PROTECT__ */
+ vm_offset_t cpu_reset_handler;
+ uintptr_t cpu_reset_assist;
+ uint32_t cpu_reset_type;
+
+ unsigned int interrupt_source;
+ void *cpu_int_state;
+ IOInterruptHandler interrupt_handler;
+ void *interrupt_nub;
+ void *interrupt_target;
+ void *interrupt_refCon;
+
+ idle_timer_t idle_timer_notify;
+ void *idle_timer_refcon;
+ uint64_t idle_timer_deadline;
+
+ uint64_t rtcPop;
+ rtclock_timer_t rtclock_timer;
+ struct _rtclock_data_ *rtclock_datap;
+
+ arm_debug_state_t *cpu_user_debug; /* Current debug state */
+ vm_offset_t cpu_debug_interface_map;
+
+ volatile int debugger_active;
+ volatile int PAB_active; /* Tells the console if we are dumping backtraces */
+
+ void *cpu_xcall_p0;
+ void *cpu_xcall_p1;
+ void *cpu_imm_xcall_p0;
+ void *cpu_imm_xcall_p1;
+
+#if defined(ARMA7)
+ volatile uint32_t cpu_CLW_active;
+ volatile uint64_t cpu_CLWFlush_req;
+ volatile uint64_t cpu_CLWFlush_last;
+ volatile uint64_t cpu_CLWClean_req;
+ volatile uint64_t cpu_CLWClean_last;