#include <i386/machine_check.h>
#endif
-#if CONFIG_COUNTERS
-#include <pmc/pmc.h>
-#endif
-
#include <sys/kdebug.h>
#if MP_DEBUG
result = vm_map_find_space(kernel_map,
&lapic_vbase64,
round_page(LAPIC_SIZE), 0,
- VM_MAKE_TAG(VM_MEMORY_IOKIT), &entry);
+ VM_MAKE_TAG(VM_KERN_MEMORY_IOKIT), &entry);
/* Convert 64-bit vm_map_offset_t to "pointer sized" vm_offset_t
*/
lapic_vbase = (vm_offset_t) lapic_vbase64;
break;
case LAPIC_PMC_SW_INTERRUPT:
{
-#if CONFIG_COUNTERS
- thread_t old, new;
- ml_get_csw_threads(&old, &new);
-
- if (pmc_context_switch(old, new) == TRUE) {
- retval = 1;
- /* No EOI required for SWI */
- }
-#endif /* CONFIG_COUNTERS */
}
break;
+ case LAPIC_KICK_INTERRUPT:
+ _lapic_end_of_interrupt();
+ retval = 1;
+ break;
}
return retval;
}
}
+/* SPI returning the CMCI vector */
+uint8_t
+lapic_get_cmci_vector(void)
+{
+ uint8_t cmci_vector = 0;
+#if CONFIG_MCA
+ /* CMCI, if available */
+ if (mca_is_cmci_present())
+ cmci_vector = LAPIC_VECTOR(CMCI);
+#endif
+ return cmci_vector;
+}
+
+#if DEBUG
+extern void lapic_trigger_MC(void);
+void
+lapic_trigger_MC(void)
+{
+ /* A 64-bit access to any register will do it. */
+ volatile uint64_t dummy = *(volatile uint64_t *) (volatile void *) LAPIC_MMIO(ID);
+ dummy++;
+}
+#endif