+
+
+/*
+ * Remove any mapping from the current task
+ * Don't bother to check for any errors.
+ * parms - vaddr
+ */
+ case dgUnMap:
+
+ (void)mapping_remove(current_thread()->map->pmap, save->save_r4); /* Remove mapping */
+ return 1; /* Return and check for ASTs... */
+
+
+/*
+ * Allows direct control of alignment handling.
+ *
+ * The bottom bit of the parameter is used to set the control bit, enaNotifyEM.
+ */
+ case dgAlign:
+
+ temp = dgWork.dgFlags; /* Save the old values */
+
+ temp2 = (save->save_r4 & 1) << (31 - enaNotifyEMb); /* Move parms into flag format */
+ dgWork.dgFlags = (temp & ~enaNotifyEM) | temp2; /* Set the flag */
+
+ save->save_r3 = (temp >> (31 - enaNotifyEMb)) & 1; /* Return the original */
+
+ return 1; /* Return and check for ASTs... */
+
+/*
+ * Return info for boot screen
+ */
+ case dgBootScreen:
+
+ ml_set_interrupts_enabled(1);
+ (void)copyout((char *)&vinfo, save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */
+ ml_set_interrupts_enabled(0);
+ return 1; /* Return and check for ASTs... */
+
+/*
+ * Don't return info for boot screen
+ */
+ case dgCPNull:
+
+ ml_set_interrupts_enabled(1);
+ (void)copyout((char *)&vinfo, save->save_r4, 0); /* Copy out nothing */
+ ml_set_interrupts_enabled(0);
+ return 1; /* Return and check for ASTs... */
+
+/*
+ * Test machine check handler - only on 64-bit machines
+ */
+ case dgmck:
+ if(!(PerProcTable[0].ppe_vaddr->pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */
+
+ fwEmMck(save->save_r4, save->save_r5, save->save_r6, save->save_r7, save->save_r8, save->save_r9); /* Start injecting */
+
+ return -1; /* Return and don't check for ASTs... */
+
+/*
+ * Set 64-bit on or off - only on 64-bit machines
+ */
+ case dg64:
+ if(!(PerProcTable[0].ppe_vaddr->pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */
+
+ srrwrk = save->save_srr1 >> 63; /* Save the old 64-bit bit */
+
+ save->save_srr1 = (save->save_srr1 & 0x7FFFFFFFFFFFFFFFULL) | (save->save_r4 << 63); /* Set the requested mode */
+ save->save_r3 = srrwrk; /* Return the old value */
+
+ task_clear_64BitAddr(current_thread()->task);
+ if((save->save_r4 & 1)) task_set_64BitAddr(current_thread()->task);
+
+ return -1; /* Return and don't check for ASTs... */
+
+/*
+ * Test the probe read function
+ */
+
+ case dgProbeRead:
+
+ src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5); /* Merge into 64-bit */
+ save->save_r3 = ml_probe_read_64(src, &temp); /* Try the address */
+ save->save_r4 = temp; /* Return the data */
+ return -1; /* Regurn and don't check for ASTs */
+
+/*
+ * Do perf monitor stuff
+ */
+
+ case dgPerfMon:
+
+ setPmon(save->save_r4, save->save_r5); /* Go load up MMCR0 and MMCR1 */
+ return -1; /* Regurn and don't check for ASTs */
+
+/*
+ * Map a page
+ * Don't bother to check for any errors.
+ * parms - vaddr, paddr, prot, attributes
+ */
+ case dgMapPage:
+
+ (void)mapping_make(current_thread()->map->pmap, /* Map in the page */
+ (addr64_t)(((save->save_r5 & 0xFFFFFFFF) << 32) | (save->save_r5 & 0xFFFFFFFF)), save->save_r6, 0, 1, VM_PROT_READ|VM_PROT_WRITE);
+
+ return -1; /* Return and check for ASTs... */
+
+/*
+ * SCOM interface
+ * parms - pointer to scomcomm
+ */
+ case dgScom:
+
+ ret = copyin(save->save_r4, (void *)&sarea, sizeof(scomcomm)); /* Get the data */
+ if(ret) return 0; /* Copyin failed - return an exception */
+
+ sarea.scomstat = 0xFFFFFFFFFFFFFFFFULL; /* Clear status */
+ cpu = cpu_number(); /* Get us */
+
+ if((sarea.scomcpu < real_ncpus) && PerProcTable[sarea.scomcpu].ppe_vaddr->running) {
+ if(sarea.scomcpu == cpu) { /* Is it us? */
+ if(sarea.scomfunc) { /* Are we writing */
+ sarea.scomstat = ml_scom_write(sarea.scomreg, sarea.scomdata); /* Write scom */
+ }
+ else {
+ sarea.scomstat = ml_scom_read(sarea.scomreg, &sarea.scomdata); /* Read scom */
+ }
+ }
+ else { /* Otherwise, tell the other processor */
+ (void)cpu_signal(sarea.scomcpu, SIGPcpureq, CPRQscom ,(unsigned int)&sarea); /* Ask him to do this */
+ (void)hw_cpu_sync((unsigned long)&sarea.scomstat, LockTimeOut); /* Wait for the other processor to get its temperature */
+ }
+ }
+
+ ret = copyout((void *)&sarea, save->save_r4, sizeof(scomcomm)); /* Get the data */
+ if(ret) return 0; /* Copyin failed - return an exception */
+
+ return -1; /* Return and check for ASTs... */
+
+/*
+ * Bind current thread to a processor. Parm is processor port. If port is 0, unbind.
+ */
+
+ case dgBind:
+
+ if(save->save_r4 == 0) { /* Are we unbinding? */
+ thread_bind(current_thread(), PROCESSOR_NULL); /* Unbind us */
+ save->save_r3 = KERN_SUCCESS; /* Set success */
+ return -1; /* Return and check asts */
+ }
+
+ ret = ipc_right_lookup_write(current_space(), (mach_port_name_t)save->save_r4,
+ &ientry); /* Look up the IPC entry */
+
+ if(ret != KERN_SUCCESS) { /* Couldn't find it */
+ save->save_r3 = ret; /* Pass back return */
+ return -1; /* Return and check asts */
+ }
+
+ port = (ipc_port_t)ientry->ie_object; /* Get the actual port */
+
+ if (!ip_active(port) || (ip_kotype(port) != IKOT_PROCESSOR)) { /* Active and a processor? */
+ is_write_unlock(current_space()); /* Unlock the space */
+ save->save_r3 = KERN_INVALID_ARGUMENT; /* This port is not a processor */
+ return -1; /* Return and check asts */
+ }
+
+ prssr = (processor_t)port->ip_kobject; /* Extract the processor */
+ is_write_unlock(current_space()); /* All done with the space now, unlock it */
projects / apple / xnu.git / blobdiff