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29 #include <i386/machine_routines.h>
30 #include <i386/io_map_entries.h>
31 #include <i386/cpuid.h>
33 #include <mach/processor.h>
34 #include <kern/processor.h>
35 #include <kern/machine.h>
37 #include <kern/cpu_number.h>
38 #include <kern/thread.h>
39 #include <kern/thread_call.h>
40 #include <kern/policy_internal.h>
42 #include <prng/random.h>
43 #include <i386/machine_cpu.h>
44 #include <i386/lapic.h>
45 #include <i386/bit_routines.h>
46 #include <i386/mp_events.h>
47 #include <i386/pmCPU.h>
48 #include <i386/trap.h>
50 #include <i386/cpu_threads.h>
51 #include <i386/proc_reg.h>
52 #include <mach/vm_param.h>
53 #include <i386/pmap.h>
54 #include <i386/pmap_internal.h>
55 #include <i386/misc_protos.h>
56 #include <kern/timer_queue.h>
60 #include <architecture/i386/pio.h>
61 #include <i386/cpu_data.h>
63 #define DBG(x...) kprintf("DBG: " x)
69 #include <kern/monotonic.h>
70 #endif /* MONOTONIC */
72 extern void wakeup(void *);
74 static int max_cpus_initialized
= 0;
78 uint64_t LockTimeOutTSC
;
79 uint32_t LockTimeOutUsec
;
81 uint64_t LastDebuggerEntryAllowance
;
82 uint64_t delay_spin_threshold
;
84 extern uint64_t panic_restart_timeout
;
86 boolean_t virtualized
= FALSE
;
88 decl_simple_lock_data(static, ml_timer_evaluation_slock
);
89 uint32_t ml_timer_eager_evaluations
;
90 uint64_t ml_timer_eager_evaluation_max
;
91 static boolean_t ml_timer_evaluation_in_progress
= FALSE
;
94 #define MAX_CPUS_SET 0x1
95 #define MAX_CPUS_WAIT 0x2
97 /* IO memory map services */
99 /* Map memory map IO space */
102 vm_offset_t phys_addr
,
105 return io_map(phys_addr
, size
, VM_WIMG_IO
);
108 /* boot memory allocation */
111 __unused vm_size_t size
)
113 return (vm_offset_t
)NULL
;
118 ml_get_bouncepool_info(vm_offset_t
*phys_addr
, vm_size_t
*size
)
129 #if defined(__x86_64__)
130 return (vm_offset_t
)(((unsigned long) paddr
) | VM_MIN_KERNEL_ADDRESS
);
132 return (vm_offset_t
)((paddr
) | LINEAR_KERNEL_ADDRESS
);
140 return VM_KERNEL_SLIDE(vaddr
);
147 return VM_KERNEL_UNSLIDE(vaddr
);
151 * Reclaim memory, by virtual address, that was used in early boot that is no longer needed
161 uint32_t freed_pages
= 0;
164 assert(vaddr
>= VM_MIN_KERNEL_ADDRESS
);
166 assert((vaddr
& (PAGE_SIZE
- 1)) == 0); /* must be page aligned */
168 for (vaddr_cur
= vaddr
; vaddr_cur
< round_page_64(vaddr
+ size
);) {
169 map_size
= pmap_query_pagesize(kernel_pmap
, vaddr_cur
);
171 /* just skip if nothing mapped here */
173 vaddr_cur
+= PAGE_SIZE
;
178 * Can't free from the middle of a large page.
180 assert((vaddr_cur
& (map_size
- 1)) == 0);
182 ppn
= pmap_find_phys(kernel_pmap
, vaddr_cur
);
183 assert(ppn
!= (ppnum_t
)NULL
);
185 pmap_remove(kernel_pmap
, vaddr_cur
, vaddr_cur
+ map_size
);
186 while (map_size
> 0) {
187 if (++kernel_pmap
->stats
.resident_count
> kernel_pmap
->stats
.resident_max
) {
188 kernel_pmap
->stats
.resident_max
= kernel_pmap
->stats
.resident_count
;
191 assert(pmap_valid_page(ppn
));
192 if (IS_MANAGED_PAGE(ppn
)) {
193 vm_page_create(ppn
, (ppn
+ 1));
196 map_size
-= PAGE_SIZE
;
197 vaddr_cur
+= PAGE_SIZE
;
201 vm_page_lockspin_queues();
202 vm_page_wire_count
-= freed_pages
;
203 vm_page_wire_count_initial
-= freed_pages
;
204 if (vm_page_wire_count_on_boot
!= 0) {
205 assert(vm_page_wire_count_on_boot
>= freed_pages
);
206 vm_page_wire_count_on_boot
-= freed_pages
;
208 vm_page_unlock_queues();
211 kprintf("ml_static_mfree: Released 0x%x pages at VA %p, size:0x%llx, last ppn: 0x%x\n", freed_pages
, (void *)vaddr
, (uint64_t)size
, ppn
);
216 /* virtual to physical on wired pages */
221 return (vm_offset_t
)kvtophys(vaddr
);
225 * Routine: ml_nofault_copy
226 * Function: Perform a physical mode copy if the source and
227 * destination have valid translations in the kernel pmap.
228 * If translations are present, they are assumed to
229 * be wired; i.e. no attempt is made to guarantee that the
230 * translations obtained remained valid for
231 * the duration of the copy process.
236 vm_offset_t virtsrc
, vm_offset_t virtdst
, vm_size_t size
)
238 addr64_t cur_phys_dst
, cur_phys_src
;
239 uint32_t count
, nbytes
= 0;
242 if (!(cur_phys_src
= kvtophys(virtsrc
))) {
245 if (!(cur_phys_dst
= kvtophys(virtdst
))) {
248 if (!pmap_valid_page(i386_btop(cur_phys_dst
)) || !pmap_valid_page(i386_btop(cur_phys_src
))) {
251 count
= (uint32_t)(PAGE_SIZE
- (cur_phys_src
& PAGE_MASK
));
252 if (count
> (PAGE_SIZE
- (cur_phys_dst
& PAGE_MASK
))) {
253 count
= (uint32_t)(PAGE_SIZE
- (cur_phys_dst
& PAGE_MASK
));
256 count
= (uint32_t)size
;
259 bcopy_phys(cur_phys_src
, cur_phys_dst
, count
);
271 * Routine: ml_validate_nofault
272 * Function: Validate that ths address range has a valid translations
273 * in the kernel pmap. If translations are present, they are
274 * assumed to be wired; i.e. no attempt is made to guarantee
275 * that the translation persist after the check.
276 * Returns: TRUE if the range is mapped and will not cause a fault,
282 vm_offset_t virtsrc
, vm_size_t size
)
284 addr64_t cur_phys_src
;
288 if (!(cur_phys_src
= kvtophys(virtsrc
))) {
291 if (!pmap_valid_page(i386_btop(cur_phys_src
))) {
294 count
= (uint32_t)(PAGE_SIZE
- (cur_phys_src
& PAGE_MASK
));
296 count
= (uint32_t)size
;
306 /* Interrupt handling */
308 /* Initialize Interrupts */
310 ml_init_interrupt(void)
312 (void) ml_set_interrupts_enabled(TRUE
);
316 /* Get Interrupts Enabled */
318 ml_get_interrupts_enabled(void)
322 __asm__
volatile ("pushf; pop %0": "=r" (flags
));
323 return (flags
& EFL_IF
) != 0;
326 /* Set Interrupts Enabled */
328 ml_set_interrupts_enabled(boolean_t enable
)
333 __asm__
volatile ("pushf; pop %0" : "=r" (flags
));
335 assert(get_interrupt_level() ? (enable
== FALSE
) : TRUE
);
337 istate
= ((flags
& EFL_IF
) != 0);
340 __asm__
volatile ("sti;nop");
342 if ((get_preemption_level() == 0) && (*ast_pending() & AST_URGENT
)) {
343 __asm__
volatile ("int %0" :: "N" (T_PREEMPT
));
347 __asm__
volatile ("cli");
354 /* Early Set Interrupts Enabled */
356 ml_early_set_interrupts_enabled(boolean_t enable
)
358 if (enable
== TRUE
) {
359 kprintf("Caller attempted to enable interrupts too early in "
360 "kernel startup. Halting.\n");
365 /* On x86, do not allow interrupts to be enabled very early */
369 /* Check if running at interrupt context */
371 ml_at_interrupt_context(void)
373 return get_interrupt_level() != 0;
377 ml_get_power_state(boolean_t
*icp
, boolean_t
*pidlep
)
379 *icp
= (get_interrupt_level() != 0);
380 /* These will be technically inaccurate for interrupts that occur
381 * successively within a single "idle exit" event, but shouldn't
382 * matter statistically.
384 *pidlep
= (current_cpu_datap()->lcpu
.package
->num_idle
== topoParms
.nLThreadsPerPackage
);
387 /* Generate a fake interrupt */
390 ml_cause_interrupt(void)
392 panic("ml_cause_interrupt not defined yet on Intel");
396 * TODO: transition users of this to kernel_thread_start_priority
397 * ml_thread_policy is an unsupported KPI
402 __unused
unsigned policy_id
,
403 unsigned policy_info
)
405 if (policy_info
& MACHINE_NETWORK_WORKLOOP
) {
406 thread_precedence_policy_data_t info
;
407 __assert_only kern_return_t kret
;
411 kret
= thread_policy_set_internal(thread
, THREAD_PRECEDENCE_POLICY
,
412 (thread_policy_t
)&info
,
413 THREAD_PRECEDENCE_POLICY_COUNT
);
414 assert(kret
== KERN_SUCCESS
);
418 /* Initialize Interrupts */
420 ml_install_interrupt_handler(
424 IOInterruptHandler handler
,
427 boolean_t current_state
;
429 current_state
= ml_set_interrupts_enabled(FALSE
);
431 PE_install_interrupt_handler(nub
, source
, target
,
432 (IOInterruptHandler
) handler
, refCon
);
434 (void) ml_set_interrupts_enabled(current_state
);
436 initialize_screen(NULL
, kPEAcquireScreen
);
442 processor_t processor
)
444 cpu_interrupt(processor
->cpu_id
);
449 machine_signal_idle_deferred(
450 __unused processor_t processor
)
452 panic("Unimplemented");
457 machine_signal_idle_cancel(
458 __unused processor_t processor
)
460 panic("Unimplemented");
466 processor_t
*processor_out
,
470 cpu_data_t
*this_cpu_datap
;
472 this_cpu_datap
= cpu_data_alloc(boot_cpu
);
473 if (this_cpu_datap
== NULL
) {
476 target_cpu
= this_cpu_datap
->cpu_number
;
477 assert((boot_cpu
&& (target_cpu
== 0)) ||
478 (!boot_cpu
&& (target_cpu
!= 0)));
480 lapic_cpu_map(lapic_id
, target_cpu
);
482 /* The cpu_id is not known at registration phase. Just do
485 this_cpu_datap
->cpu_phys_number
= lapic_id
;
487 this_cpu_datap
->cpu_console_buf
= console_cpu_alloc(boot_cpu
);
488 if (this_cpu_datap
->cpu_console_buf
== NULL
) {
493 if (kpc_register_cpu(this_cpu_datap
) != TRUE
) {
499 cpu_thread_alloc(this_cpu_datap
->cpu_number
);
500 if (this_cpu_datap
->lcpu
.core
== NULL
) {
504 #if NCOPY_WINDOWS > 0
505 this_cpu_datap
->cpu_pmap
= pmap_cpu_alloc(boot_cpu
);
506 if (this_cpu_datap
->cpu_pmap
== NULL
) {
511 this_cpu_datap
->cpu_processor
= cpu_processor_alloc(boot_cpu
);
512 if (this_cpu_datap
->cpu_processor
== NULL
) {
516 * processor_init() deferred to topology start
517 * because "slot numbers" a.k.a. logical processor numbers
518 * are not yet finalized.
522 *processor_out
= this_cpu_datap
->cpu_processor
;
527 cpu_processor_free(this_cpu_datap
->cpu_processor
);
528 #if NCOPY_WINDOWS > 0
529 pmap_cpu_free(this_cpu_datap
->cpu_pmap
);
531 console_cpu_free(this_cpu_datap
->cpu_console_buf
);
533 kpc_unregister_cpu(this_cpu_datap
);
541 ml_processor_register(
544 processor_t
*processor_out
,
548 static boolean_t done_topo_sort
= FALSE
;
549 static uint32_t num_registered
= 0;
551 /* Register all CPUs first, and track max */
552 if (start
== FALSE
) {
555 DBG( "registering CPU lapic id %d\n", lapic_id
);
557 return register_cpu( lapic_id
, processor_out
, boot_cpu
);
560 /* Sort by topology before we start anything */
561 if (!done_topo_sort
) {
562 DBG( "about to start CPUs. %d registered\n", num_registered
);
564 cpu_topology_sort( num_registered
);
565 done_topo_sort
= TRUE
;
568 /* Assign the cpu ID */
569 uint32_t cpunum
= -1;
570 cpu_data_t
*this_cpu_datap
= NULL
;
572 /* find cpu num and pointer */
573 cpunum
= ml_get_cpuid( lapic_id
);
575 if (cpunum
== 0xFFFFFFFF) { /* never heard of it? */
576 panic( "trying to start invalid/unregistered CPU %d\n", lapic_id
);
579 this_cpu_datap
= cpu_datap(cpunum
);
582 this_cpu_datap
->cpu_id
= cpu_id
;
584 /* allocate and initialize other per-cpu structures */
586 mp_cpus_call_cpu_init(cpunum
);
587 random_cpu_init(cpunum
);
591 *processor_out
= this_cpu_datap
->cpu_processor
;
593 /* OK, try and start this CPU */
594 return cpu_topology_start_cpu( cpunum
);
599 ml_cpu_get_info(ml_cpu_info_t
*cpu_infop
)
601 boolean_t os_supports_sse
;
602 i386_cpu_info_t
*cpuid_infop
;
604 if (cpu_infop
== NULL
) {
609 * Are we supporting MMX/SSE/SSE2/SSE3?
610 * As distinct from whether the cpu has these capabilities.
612 os_supports_sse
= !!(get_cr4() & CR4_OSXMM
);
614 if (ml_fpu_avx_enabled()) {
615 cpu_infop
->vector_unit
= 9;
616 } else if ((cpuid_features() & CPUID_FEATURE_SSE4_2
) && os_supports_sse
) {
617 cpu_infop
->vector_unit
= 8;
618 } else if ((cpuid_features() & CPUID_FEATURE_SSE4_1
) && os_supports_sse
) {
619 cpu_infop
->vector_unit
= 7;
620 } else if ((cpuid_features() & CPUID_FEATURE_SSSE3
) && os_supports_sse
) {
621 cpu_infop
->vector_unit
= 6;
622 } else if ((cpuid_features() & CPUID_FEATURE_SSE3
) && os_supports_sse
) {
623 cpu_infop
->vector_unit
= 5;
624 } else if ((cpuid_features() & CPUID_FEATURE_SSE2
) && os_supports_sse
) {
625 cpu_infop
->vector_unit
= 4;
626 } else if ((cpuid_features() & CPUID_FEATURE_SSE
) && os_supports_sse
) {
627 cpu_infop
->vector_unit
= 3;
628 } else if (cpuid_features() & CPUID_FEATURE_MMX
) {
629 cpu_infop
->vector_unit
= 2;
631 cpu_infop
->vector_unit
= 0;
634 cpuid_infop
= cpuid_info();
636 cpu_infop
->cache_line_size
= cpuid_infop
->cache_linesize
;
638 cpu_infop
->l1_icache_size
= cpuid_infop
->cache_size
[L1I
];
639 cpu_infop
->l1_dcache_size
= cpuid_infop
->cache_size
[L1D
];
641 if (cpuid_infop
->cache_size
[L2U
] > 0) {
642 cpu_infop
->l2_settings
= 1;
643 cpu_infop
->l2_cache_size
= cpuid_infop
->cache_size
[L2U
];
645 cpu_infop
->l2_settings
= 0;
646 cpu_infop
->l2_cache_size
= 0xFFFFFFFF;
649 if (cpuid_infop
->cache_size
[L3U
] > 0) {
650 cpu_infop
->l3_settings
= 1;
651 cpu_infop
->l3_cache_size
= cpuid_infop
->cache_size
[L3U
];
653 cpu_infop
->l3_settings
= 0;
654 cpu_infop
->l3_cache_size
= 0xFFFFFFFF;
659 ml_init_max_cpus(unsigned long max_cpus
)
661 boolean_t current_state
;
663 current_state
= ml_set_interrupts_enabled(FALSE
);
664 if (max_cpus_initialized
!= MAX_CPUS_SET
) {
665 if (max_cpus
> 0 && max_cpus
<= MAX_CPUS
) {
667 * Note: max_cpus is the number of enabled processors
668 * that ACPI found; max_ncpus is the maximum number
669 * that the kernel supports or that the "cpus="
670 * boot-arg has set. Here we take int minimum.
672 machine_info
.max_cpus
= (integer_t
)MIN(max_cpus
, max_ncpus
);
674 if (max_cpus_initialized
== MAX_CPUS_WAIT
) {
675 wakeup((event_t
)&max_cpus_initialized
);
677 max_cpus_initialized
= MAX_CPUS_SET
;
679 (void) ml_set_interrupts_enabled(current_state
);
683 ml_get_max_cpus(void)
685 boolean_t current_state
;
687 current_state
= ml_set_interrupts_enabled(FALSE
);
688 if (max_cpus_initialized
!= MAX_CPUS_SET
) {
689 max_cpus_initialized
= MAX_CPUS_WAIT
;
690 assert_wait((event_t
)&max_cpus_initialized
, THREAD_UNINT
);
691 (void)thread_block(THREAD_CONTINUE_NULL
);
693 (void) ml_set_interrupts_enabled(current_state
);
694 return machine_info
.max_cpus
;
698 ml_wants_panic_trap_to_debugger(void)
704 ml_panic_trap_to_debugger(__unused
const char *panic_format_str
,
705 __unused
va_list *panic_args
,
706 __unused
unsigned int reason
,
708 __unused
uint64_t panic_options_mask
,
709 __unused
unsigned long panic_caller
)
715 * Routine: ml_init_lock_timeout
719 ml_init_lock_timeout(void)
723 #if DEVELOPMENT || DEBUG
724 uint64_t default_timeout_ns
= NSEC_PER_SEC
>> 2;
726 uint64_t default_timeout_ns
= NSEC_PER_SEC
>> 1;
731 if (PE_parse_boot_argn("slto_us", &slto
, sizeof(slto
))) {
732 default_timeout_ns
= slto
* NSEC_PER_USEC
;
736 * LockTimeOut is absolutetime, LockTimeOutTSC is in TSC ticks,
737 * and LockTimeOutUsec is in microseconds and it's 32-bits.
739 LockTimeOutUsec
= (uint32_t) (default_timeout_ns
/ NSEC_PER_USEC
);
740 nanoseconds_to_absolutetime(default_timeout_ns
, &abstime
);
741 LockTimeOut
= abstime
;
742 LockTimeOutTSC
= tmrCvt(abstime
, tscFCvtn2t
);
745 * TLBTimeOut dictates the TLB flush timeout period. It defaults to
746 * LockTimeOut but can be overriden separately. In particular, a
747 * zero value inhibits the timeout-panic and cuts a trace evnt instead
748 * - see pmap_flush_tlbs().
750 if (PE_parse_boot_argn("tlbto_us", &slto
, sizeof(slto
))) {
751 default_timeout_ns
= slto
* NSEC_PER_USEC
;
752 nanoseconds_to_absolutetime(default_timeout_ns
, &abstime
);
753 TLBTimeOut
= (uint32_t) abstime
;
755 TLBTimeOut
= LockTimeOut
;
758 #if DEVELOPMENT || DEBUG
759 reportphyreaddelayabs
= LockTimeOut
>> 1;
761 if (PE_parse_boot_argn("phyreadmaxus", &slto
, sizeof(slto
))) {
762 default_timeout_ns
= slto
* NSEC_PER_USEC
;
763 nanoseconds_to_absolutetime(default_timeout_ns
, &abstime
);
764 reportphyreaddelayabs
= abstime
;
767 if (PE_parse_boot_argn("phywritemaxus", &slto
, sizeof(slto
))) {
768 nanoseconds_to_absolutetime((uint64_t)slto
* NSEC_PER_USEC
, &abstime
);
769 reportphywritedelayabs
= abstime
;
772 if (PE_parse_boot_argn("tracephyreadus", &slto
, sizeof(slto
))) {
773 nanoseconds_to_absolutetime((uint64_t)slto
* NSEC_PER_USEC
, &abstime
);
774 tracephyreaddelayabs
= abstime
;
777 if (PE_parse_boot_argn("tracephywriteus", &slto
, sizeof(slto
))) {
778 nanoseconds_to_absolutetime((uint64_t)slto
* NSEC_PER_USEC
, &abstime
);
779 tracephywritedelayabs
= abstime
;
782 if (PE_parse_boot_argn("mtxspin", &mtxspin
, sizeof(mtxspin
))) {
783 if (mtxspin
> USEC_PER_SEC
>> 4) {
784 mtxspin
= USEC_PER_SEC
>> 4;
786 nanoseconds_to_absolutetime(mtxspin
* NSEC_PER_USEC
, &abstime
);
788 nanoseconds_to_absolutetime(10 * NSEC_PER_USEC
, &abstime
);
790 MutexSpin
= (unsigned int)abstime
;
792 nanoseconds_to_absolutetime(4ULL * NSEC_PER_SEC
, &LastDebuggerEntryAllowance
);
793 if (PE_parse_boot_argn("panic_restart_timeout", &prt
, sizeof(prt
))) {
794 nanoseconds_to_absolutetime(prt
* NSEC_PER_SEC
, &panic_restart_timeout
);
797 virtualized
= ((cpuid_features() & CPUID_FEATURE_VMM
) != 0);
801 if (!PE_parse_boot_argn("vti", &vti
, sizeof(vti
))) {
804 printf("Timeouts adjusted for virtualization (<<%d)\n", vti
);
805 kprintf("Timeouts adjusted for virtualization (<<%d):\n", vti
);
806 #define VIRTUAL_TIMEOUT_INFLATE64(_timeout) \
808 kprintf("%24s: 0x%016llx ", #_timeout, _timeout); \
810 kprintf("-> 0x%016llx\n", _timeout); \
812 #define VIRTUAL_TIMEOUT_INFLATE32(_timeout) \
814 kprintf("%24s: 0x%08x ", #_timeout, _timeout); \
815 if ((_timeout <<vti) >> vti == _timeout) \
818 _timeout = ~0; /* cap rather than overflow */ \
819 kprintf("-> 0x%08x\n", _timeout); \
821 VIRTUAL_TIMEOUT_INFLATE32(LockTimeOutUsec
);
822 VIRTUAL_TIMEOUT_INFLATE64(LockTimeOut
);
823 VIRTUAL_TIMEOUT_INFLATE64(LockTimeOutTSC
);
824 VIRTUAL_TIMEOUT_INFLATE64(TLBTimeOut
);
825 VIRTUAL_TIMEOUT_INFLATE64(MutexSpin
);
826 VIRTUAL_TIMEOUT_INFLATE64(reportphyreaddelayabs
);
829 interrupt_latency_tracker_setup();
830 simple_lock_init(&ml_timer_evaluation_slock
, 0);
834 * Threshold above which we should attempt to block
835 * instead of spinning for clock_delay_until().
839 ml_init_delay_spin_threshold(int threshold_us
)
841 nanoseconds_to_absolutetime(threshold_us
* NSEC_PER_USEC
, &delay_spin_threshold
);
845 ml_delay_should_spin(uint64_t interval
)
847 return (interval
< delay_spin_threshold
) ? TRUE
: FALSE
;
850 uint32_t yield_delay_us
= 0;
853 ml_delay_on_yield(void)
855 #if DEVELOPMENT || DEBUG
856 if (yield_delay_us
) {
857 delay(yield_delay_us
);
863 * This is called from the machine-independent layer
864 * to perform machine-dependent info updates. Defer to cpu_thread_init().
873 * This is called from the machine-independent layer
874 * to perform machine-dependent info updates.
879 i386_deactivate_cpu();
885 * The following are required for parts of the kernel
886 * that cannot resolve these functions as inlines:
888 extern thread_t
current_act(void) __attribute__((const));
892 return current_thread_fast();
895 #undef current_thread
896 extern thread_t
current_thread(void) __attribute__((const));
900 return current_thread_fast();
907 return cpu_mode_is64bit();
912 ml_thread_is64bit(thread_t thread
)
914 return thread_is_64bit_addr(thread
);
919 ml_state_is64bit(void *saved_state
)
921 return is_saved_state64(saved_state
);
925 ml_cpu_set_ldt(int selector
)
928 * Avoid loading the LDT
929 * if we're setting the KERNEL LDT and it's already set.
931 if (selector
== KERNEL_LDT
&&
932 current_cpu_datap()->cpu_ldt
== KERNEL_LDT
) {
937 current_cpu_datap()->cpu_ldt
= selector
;
941 ml_fp_setvalid(boolean_t value
)
947 ml_cpu_int_event_time(void)
949 return current_cpu_datap()->cpu_int_event_time
;
953 ml_stack_remaining(void)
955 uintptr_t local
= (uintptr_t) &local
;
957 if (ml_at_interrupt_context() != 0) {
958 return local
- (current_cpu_datap()->cpu_int_stack_top
- INTSTACK_SIZE
);
960 return local
- current_thread()->kernel_stack
;
965 vm_offset_t
ml_stack_base(void);
966 vm_size_t
ml_stack_size(void);
971 if (ml_at_interrupt_context()) {
972 return current_cpu_datap()->cpu_int_stack_top
- INTSTACK_SIZE
;
974 return current_thread()->kernel_stack
;
981 if (ml_at_interrupt_context()) {
982 return INTSTACK_SIZE
;
984 return kernel_stack_size
;
990 kernel_preempt_check(void)
995 assert(get_preemption_level() == 0);
997 if (__improbable(*ast_pending() & AST_URGENT
)) {
999 * can handle interrupts and preemptions
1002 __asm__
volatile ("pushf; pop %0" : "=r" (flags
));
1004 intr
= ((flags
& EFL_IF
) != 0);
1007 * now cause the PRE-EMPTION trap
1010 __asm__
volatile ("int %0" :: "N" (T_PREEMPT
));
1016 machine_timeout_suspended(void)
1018 return pmap_tlb_flush_timeout
|| spinlock_timed_out
|| panic_active() || mp_recent_debugger_activity() || ml_recent_wake();
1021 /* Eagerly evaluate all pending timer and thread callouts
1024 ml_timer_evaluate(void)
1026 KERNEL_DEBUG_CONSTANT(DECR_TIMER_RESCAN
| DBG_FUNC_START
, 0, 0, 0, 0, 0);
1028 uint64_t te_end
, te_start
= mach_absolute_time();
1029 simple_lock(&ml_timer_evaluation_slock
, LCK_GRP_NULL
);
1030 ml_timer_evaluation_in_progress
= TRUE
;
1031 thread_call_delayed_timer_rescan_all();
1032 mp_cpus_call(CPUMASK_ALL
, ASYNC
, timer_queue_expire_rescan
, NULL
);
1033 ml_timer_evaluation_in_progress
= FALSE
;
1034 ml_timer_eager_evaluations
++;
1035 te_end
= mach_absolute_time();
1036 ml_timer_eager_evaluation_max
= MAX(ml_timer_eager_evaluation_max
, (te_end
- te_start
));
1037 simple_unlock(&ml_timer_evaluation_slock
);
1039 KERNEL_DEBUG_CONSTANT(DECR_TIMER_RESCAN
| DBG_FUNC_END
, 0, 0, 0, 0, 0);
1043 ml_timer_forced_evaluation(void)
1045 return ml_timer_evaluation_in_progress
;
1048 /* 32-bit right-rotate n bits */
1049 static inline uint32_t
1050 ror32(uint32_t val
, const unsigned int n
)
1052 __asm__
volatile ("rorl %%cl,%0" : "=r" (val
) : "0" (val
), "c" (n
));
1057 ml_entropy_collect(void)
1059 uint32_t tsc_lo
, tsc_hi
;
1062 assert(cpu_number() == master_cpu
);
1064 /* update buffer pointer cyclically */
1065 ep
= EntropyData
.buffer
+ (EntropyData
.sample_count
& ENTROPY_BUFFER_INDEX_MASK
);
1066 EntropyData
.sample_count
+= 1;
1068 rdtsc_nofence(tsc_lo
, tsc_hi
);
1069 *ep
= ror32(*ep
, 9) ^ tsc_lo
;
1073 ml_energy_stat(__unused thread_t t
)
1079 ml_gpu_stat_update(uint64_t gpu_ns_delta
)
1081 current_thread()->machine
.thread_gpu_ns
+= gpu_ns_delta
;
1085 ml_gpu_stat(thread_t t
)
1087 return t
->machine
.thread_gpu_ns
;
1090 int plctrace_enabled
= 0;
1093 _disable_preemption(void)
1095 disable_preemption_internal();
1099 _enable_preemption(void)
1101 enable_preemption_internal();
1105 plctrace_disable(void)
1107 plctrace_enabled
= 0;
1110 static boolean_t ml_quiescing
;
1113 ml_set_is_quiescing(boolean_t quiescing
)
1115 assert(FALSE
== ml_get_interrupts_enabled());
1116 ml_quiescing
= quiescing
;
1120 ml_is_quiescing(void)
1122 assert(FALSE
== ml_get_interrupts_enabled());
1123 return ml_quiescing
;
1127 ml_get_booter_memory_size(void)