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31 * Microcode updater interface sysctl
34 #include <kern/locks.h>
35 #include <i386/ucode.h>
36 #include <sys/errno.h>
37 #include <i386/proc_reg.h>
38 #include <i386/cpuid.h>
39 #include <vm/vm_kern.h>
40 #include <i386/mp.h> // mp_cpus_call
41 #include <i386/commpage/commpage.h>
43 #include <machine/cpu_number.h> // cpu_number
44 #include <pexpert/pexpert.h> // boot-args
46 #define IA32_BIOS_UPDT_TRIG (0x79) /* microcode update trigger MSR */
48 struct intel_ucupdate
*global_update
= NULL
;
50 /* Exceute the actual update! */
52 update_microcode(void)
54 /* SDM Example 9-8 code shows that we load the
55 * address of the UpdateData within the microcode blob,
56 * not the address of the header.
58 wrmsr64(IA32_BIOS_UPDT_TRIG
, (uint64_t)(uintptr_t)&global_update
->data
);
62 static lck_grp_attr_t
*ucode_slock_grp_attr
= NULL
;
63 static lck_grp_t
*ucode_slock_grp
= NULL
;
64 static lck_attr_t
*ucode_slock_attr
= NULL
;
65 static lck_spin_t
*ucode_slock
= NULL
;
70 /* already allocated? */
71 if (ucode_slock_grp_attr
&& ucode_slock_grp
&& ucode_slock_attr
&& ucode_slock
) {
75 /* allocate lock group attribute and group */
76 if (!(ucode_slock_grp_attr
= lck_grp_attr_alloc_init())) {
80 if (!(ucode_slock_grp
= lck_grp_alloc_init("uccode_lock", ucode_slock_grp_attr
))) {
84 /* Allocate lock attribute */
85 if (!(ucode_slock_attr
= lck_attr_alloc_init())) {
89 /* Allocate the spin lock */
90 /* We keep one global spin-lock. We could have one per update
91 * request... but srsly, why would you update microcode like that?
93 if (!(ucode_slock
= lck_spin_alloc_init(ucode_slock_grp
, ucode_slock_attr
))) {
102 lck_spin_free(ucode_slock
, ucode_slock_grp
);
104 if (ucode_slock_attr
) {
105 lck_attr_free(ucode_slock_attr
);
107 if (ucode_slock_grp
) {
108 lck_grp_free(ucode_slock_grp
);
110 if (ucode_slock_grp_attr
) {
111 lck_grp_attr_free(ucode_slock_grp_attr
);
114 return KERN_NO_SPACE
;
117 /* Copy in an update */
119 copyin_update(uint64_t inaddr
)
121 struct intel_ucupdate update_header
;
122 struct intel_ucupdate
*update
;
127 /* Copy in enough header to peek at the size */
128 error
= copyin((user_addr_t
)inaddr
, (void *)&update_header
, sizeof(update_header
));
133 /* Get the actual, alleged size */
134 size
= update_header
.total_size
;
136 /* huge bogus piece of data that somehow made it through? */
137 if (size
>= 1024 * 1024) {
141 /* Old microcodes? */
143 size
= 2048; /* default update size; see SDM */
146 * create the buffer for the update
147 * It need only be aligned to 16-bytes, according to the SDM.
148 * This also wires it down
150 ret
= kmem_alloc_kobject(kernel_map
, (vm_offset_t
*)&update
, size
, VM_KERN_MEMORY_OSFMK
);
151 if (ret
!= KERN_SUCCESS
) {
156 error
= copyin((user_addr_t
)inaddr
, (void*)update
, size
);
158 kmem_free(kernel_map
, (vm_offset_t
)update
, size
);
162 global_update
= update
;
167 cpu_apply_microcode(void)
170 lck_spin_lock(ucode_slock
);
172 /* execute the update */
175 /* release the lock */
176 lck_spin_unlock(ucode_slock
);
180 cpu_update(__unused
void *arg
)
182 cpu_apply_microcode();
188 * This is called once by every CPU on a wake from sleep/hibernate
189 * and is meant to re-apply a microcode update that got lost
196 kprintf("ucode: Re-applying update after wake (CPU #%d)\n", cpu_number());
200 kprintf("ucode: No update to apply (CPU #%d)\n", cpu_number());
206 ucode_cpuid_set_info(void)
208 uint64_t saved_xcr0
, dest_xcr0
;
209 int need_xcr0_restore
= 0;
210 boolean_t intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
213 * Before we cache the CPUID information, we must configure XCR0 with the maximal set of
214 * features to ensure the save area returned in the xsave leaf is correctly-sized.
216 * Since we are guaranteed that init_fpu() has already happened, we can use state
217 * variables set there that were already predicated on the presence of explicit
218 * boot-args enables/disables.
221 if (fpu_capability
== AVX512
|| fpu_capability
== AVX
) {
222 saved_xcr0
= xgetbv(XCR0
);
223 dest_xcr0
= (fpu_capability
== AVX512
) ? AVX512_XMASK
: AVX_XMASK
;
224 assert((get_cr4() & CR4_OSXSAVE
) != 0);
225 if (saved_xcr0
!= dest_xcr0
) {
226 need_xcr0_restore
= 1;
227 xsetbv(dest_xcr0
>> 32, dest_xcr0
& 0xFFFFFFFFUL
);
233 if (need_xcr0_restore
) {
234 xsetbv(saved_xcr0
>> 32, saved_xcr0
& 0xFFFFFFFFUL
);
237 ml_set_interrupts_enabled(intrs_enabled
);
240 /* Farm an update out to all CPUs */
244 cpumask_t dest_cpumask
;
246 if (register_locks() != KERN_SUCCESS
) {
250 mp_disable_preemption();
251 dest_cpumask
= CPUMASK_OTHERS
;
252 cpu_apply_microcode();
253 /* Update the cpuid info */
254 ucode_cpuid_set_info();
255 mp_enable_preemption();
257 /* Get all other CPUs to perform the update */
259 * Calling mp_cpus_call with the ASYNC flag ensures that the
260 * IPI dispatch occurs in parallel, but that we will not
261 * proceed until all targeted CPUs complete the microcode
264 mp_cpus_call(dest_cpumask
, ASYNC
, cpu_update
, NULL
);
266 /* Update the commpage only after we update all CPUs' microcode */
267 commpage_post_ucode_update();
275 ucode_interface(uint64_t addr
)
280 if (PE_parse_boot_argn("-x", arg
, sizeof(arg
))) {
281 printf("ucode: no updates in safe mode\n");
287 * Userland may only call this once per boot. Anything else
288 * would not make sense (all updates are cumulative), and also
289 * leak memory, because we don't free previous updates.
296 /* Get the whole microcode */
297 error
= copyin_update(addr
);
303 /* Farm out the updates */