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1 | /* | |
2 | * Copyright (c) 2007-2016 Apple, Inc. All rights reserved. | |
3 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
4 | * | |
5 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
6 | * | |
7 | * This file contains Original Code and/or Modifications of Original Code | |
8 | * as defined in and that are subject to the Apple Public Source License | |
9 | * Version 2.0 (the 'License'). You may not use this file except in | |
10 | * compliance with the License. The rights granted to you under the License | |
11 | * may not be used to create, or enable the creation or redistribution of, | |
12 | * unlawful or unlicensed copies of an Apple operating system, or to | |
13 | * circumvent, violate, or enable the circumvention or violation of, any | |
14 | * terms of an Apple operating system software license agreement. | |
15 | * | |
16 | * Please obtain a copy of the License at | |
17 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
18 | * | |
19 | * The Original Code and all software distributed under the License are | |
20 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
21 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
22 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
23 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
24 | * Please see the License for the specific language governing rights and | |
25 | * limitations under the License. | |
26 | * | |
27 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
28 | */ | |
29 | /* | |
30 | * Mach Operating System | |
31 | * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University | |
32 | * All Rights Reserved. | |
33 | * | |
34 | * Permission to use, copy, modify and distribute this software and its | |
35 | * documentation is hereby granted, provided that both the copyright | |
36 | * notice and this permission notice appear in all copies of the | |
37 | * software, derivative works or modified versions, and any portions | |
38 | * thereof, and that both notices appear in supporting documentation. | |
39 | * | |
40 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" | |
41 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
42 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
43 | * | |
44 | * Carnegie Mellon requests users of this software to return to | |
45 | * | |
46 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
47 | * School of Computer Science | |
48 | * Carnegie Mellon University | |
49 | * Pittsburgh PA 15213-3890 | |
50 | * | |
51 | * any improvements or extensions that they make and grant Carnegie Mellon | |
52 | * the rights to redistribute these changes. | |
53 | */ | |
54 | /* File: machine.h | |
55 | * Author: Avadis Tevanian, Jr. | |
56 | * Date: 1986 | |
57 | * | |
58 | * Machine independent machine abstraction. | |
59 | */ | |
60 | ||
61 | #ifndef _MACH_MACHINE_H_ | |
62 | #define _MACH_MACHINE_H_ | |
63 | ||
64 | #ifndef __ASSEMBLER__ | |
65 | ||
66 | #include <stdint.h> | |
67 | #include <mach/machine/vm_types.h> | |
68 | #include <mach/boolean.h> | |
69 | ||
70 | typedef integer_t cpu_type_t; | |
71 | typedef integer_t cpu_subtype_t; | |
72 | typedef integer_t cpu_threadtype_t; | |
73 | ||
74 | #define CPU_STATE_MAX 4 | |
75 | ||
76 | #define CPU_STATE_USER 0 | |
77 | #define CPU_STATE_SYSTEM 1 | |
78 | #define CPU_STATE_IDLE 2 | |
79 | #define CPU_STATE_NICE 3 | |
80 | ||
81 | #ifdef KERNEL_PRIVATE | |
82 | ||
83 | #include <sys/cdefs.h> | |
84 | ||
85 | __BEGIN_DECLS | |
86 | cpu_type_t cpu_type(void); | |
87 | ||
88 | cpu_subtype_t cpu_subtype(void); | |
89 | ||
90 | cpu_threadtype_t cpu_threadtype(void); | |
91 | __END_DECLS | |
92 | ||
93 | #ifdef MACH_KERNEL_PRIVATE | |
94 | ||
95 | struct machine_info { | |
96 | integer_t major_version; /* kernel major version id */ | |
97 | integer_t minor_version; /* kernel minor version id */ | |
98 | integer_t max_cpus; /* max number of CPUs possible */ | |
99 | uint32_t memory_size; /* size of memory in bytes, capped at 2 GB */ | |
100 | uint64_t max_mem; /* actual size of physical memory */ | |
101 | uint32_t physical_cpu; /* number of physical CPUs now available */ | |
102 | integer_t physical_cpu_max; /* max number of physical CPUs possible */ | |
103 | uint32_t logical_cpu; /* number of logical cpu now available */ | |
104 | integer_t logical_cpu_max; /* max number of physical CPUs possible */ | |
105 | }; | |
106 | ||
107 | typedef struct machine_info *machine_info_t; | |
108 | typedef struct machine_info machine_info_data_t; | |
109 | ||
110 | extern struct machine_info machine_info; | |
111 | ||
112 | __BEGIN_DECLS | |
113 | cpu_type_t slot_type( | |
114 | int slot_num); | |
115 | ||
116 | cpu_subtype_t slot_subtype( | |
117 | int slot_num); | |
118 | ||
119 | cpu_threadtype_t slot_threadtype( | |
120 | int slot_num); | |
121 | __END_DECLS | |
122 | ||
123 | #endif /* MACH_KERNEL_PRIVATE */ | |
124 | #endif /* KERNEL_PRIVATE */ | |
125 | ||
126 | ||
127 | /* | |
128 | * Capability bits used in the definition of cpu_type. | |
129 | */ | |
130 | #define CPU_ARCH_MASK 0xff000000 /* mask for architecture bits */ | |
131 | #define CPU_ARCH_ABI64 0x01000000 /* 64 bit ABI */ | |
132 | ||
133 | /* | |
134 | * Machine types known by all. | |
135 | */ | |
136 | ||
137 | #define CPU_TYPE_ANY ((cpu_type_t) -1) | |
138 | ||
139 | #define CPU_TYPE_VAX ((cpu_type_t) 1) | |
140 | /* skip ((cpu_type_t) 2) */ | |
141 | /* skip ((cpu_type_t) 3) */ | |
142 | /* skip ((cpu_type_t) 4) */ | |
143 | /* skip ((cpu_type_t) 5) */ | |
144 | #define CPU_TYPE_MC680x0 ((cpu_type_t) 6) | |
145 | #define CPU_TYPE_X86 ((cpu_type_t) 7) | |
146 | #define CPU_TYPE_I386 CPU_TYPE_X86 /* compatibility */ | |
147 | #define CPU_TYPE_X86_64 (CPU_TYPE_X86 | CPU_ARCH_ABI64) | |
148 | ||
149 | /* skip CPU_TYPE_MIPS ((cpu_type_t) 8) */ | |
150 | /* skip ((cpu_type_t) 9) */ | |
151 | #define CPU_TYPE_MC98000 ((cpu_type_t) 10) | |
152 | #define CPU_TYPE_HPPA ((cpu_type_t) 11) | |
153 | #define CPU_TYPE_ARM ((cpu_type_t) 12) | |
154 | #define CPU_TYPE_ARM64 (CPU_TYPE_ARM | CPU_ARCH_ABI64) | |
155 | #define CPU_TYPE_MC88000 ((cpu_type_t) 13) | |
156 | #define CPU_TYPE_SPARC ((cpu_type_t) 14) | |
157 | #define CPU_TYPE_I860 ((cpu_type_t) 15) | |
158 | /* skip CPU_TYPE_ALPHA ((cpu_type_t) 16) */ | |
159 | /* skip ((cpu_type_t) 17) */ | |
160 | #define CPU_TYPE_POWERPC ((cpu_type_t) 18) | |
161 | #define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | CPU_ARCH_ABI64) | |
162 | ||
163 | /* | |
164 | * Machine subtypes (these are defined here, instead of in a machine | |
165 | * dependent directory, so that any program can get all definitions | |
166 | * regardless of where is it compiled). | |
167 | */ | |
168 | ||
169 | /* | |
170 | * Capability bits used in the definition of cpu_subtype. | |
171 | */ | |
172 | #define CPU_SUBTYPE_MASK 0xff000000 /* mask for feature flags */ | |
173 | #define CPU_SUBTYPE_LIB64 0x80000000 /* 64 bit libraries */ | |
174 | ||
175 | ||
176 | /* | |
177 | * Object files that are hand-crafted to run on any | |
178 | * implementation of an architecture are tagged with | |
179 | * CPU_SUBTYPE_MULTIPLE. This functions essentially the same as | |
180 | * the "ALL" subtype of an architecture except that it allows us | |
181 | * to easily find object files that may need to be modified | |
182 | * whenever a new implementation of an architecture comes out. | |
183 | * | |
184 | * It is the responsibility of the implementor to make sure the | |
185 | * software handles unsupported implementations elegantly. | |
186 | */ | |
187 | #define CPU_SUBTYPE_MULTIPLE ((cpu_subtype_t) -1) | |
188 | #define CPU_SUBTYPE_LITTLE_ENDIAN ((cpu_subtype_t) 0) | |
189 | #define CPU_SUBTYPE_BIG_ENDIAN ((cpu_subtype_t) 1) | |
190 | ||
191 | /* | |
192 | * Machine threadtypes. | |
193 | * This is none - not defined - for most machine types/subtypes. | |
194 | */ | |
195 | #define CPU_THREADTYPE_NONE ((cpu_threadtype_t) 0) | |
196 | ||
197 | /* | |
198 | * VAX subtypes (these do *not* necessary conform to the actual cpu | |
199 | * ID assigned by DEC available via the SID register). | |
200 | */ | |
201 | ||
202 | #define CPU_SUBTYPE_VAX_ALL ((cpu_subtype_t) 0) | |
203 | #define CPU_SUBTYPE_VAX780 ((cpu_subtype_t) 1) | |
204 | #define CPU_SUBTYPE_VAX785 ((cpu_subtype_t) 2) | |
205 | #define CPU_SUBTYPE_VAX750 ((cpu_subtype_t) 3) | |
206 | #define CPU_SUBTYPE_VAX730 ((cpu_subtype_t) 4) | |
207 | #define CPU_SUBTYPE_UVAXI ((cpu_subtype_t) 5) | |
208 | #define CPU_SUBTYPE_UVAXII ((cpu_subtype_t) 6) | |
209 | #define CPU_SUBTYPE_VAX8200 ((cpu_subtype_t) 7) | |
210 | #define CPU_SUBTYPE_VAX8500 ((cpu_subtype_t) 8) | |
211 | #define CPU_SUBTYPE_VAX8600 ((cpu_subtype_t) 9) | |
212 | #define CPU_SUBTYPE_VAX8650 ((cpu_subtype_t) 10) | |
213 | #define CPU_SUBTYPE_VAX8800 ((cpu_subtype_t) 11) | |
214 | #define CPU_SUBTYPE_UVAXIII ((cpu_subtype_t) 12) | |
215 | ||
216 | /* | |
217 | * 680x0 subtypes | |
218 | * | |
219 | * The subtype definitions here are unusual for historical reasons. | |
220 | * NeXT used to consider 68030 code as generic 68000 code. For | |
221 | * backwards compatability: | |
222 | * | |
223 | * CPU_SUBTYPE_MC68030 symbol has been preserved for source code | |
224 | * compatability. | |
225 | * | |
226 | * CPU_SUBTYPE_MC680x0_ALL has been defined to be the same | |
227 | * subtype as CPU_SUBTYPE_MC68030 for binary comatability. | |
228 | * | |
229 | * CPU_SUBTYPE_MC68030_ONLY has been added to allow new object | |
230 | * files to be tagged as containing 68030-specific instructions. | |
231 | */ | |
232 | ||
233 | #define CPU_SUBTYPE_MC680x0_ALL ((cpu_subtype_t) 1) | |
234 | #define CPU_SUBTYPE_MC68030 ((cpu_subtype_t) 1) /* compat */ | |
235 | #define CPU_SUBTYPE_MC68040 ((cpu_subtype_t) 2) | |
236 | #define CPU_SUBTYPE_MC68030_ONLY ((cpu_subtype_t) 3) | |
237 | ||
238 | /* | |
239 | * I386 subtypes | |
240 | */ | |
241 | ||
242 | #define CPU_SUBTYPE_INTEL(f, m) ((cpu_subtype_t) (f) + ((m) << 4)) | |
243 | ||
244 | #define CPU_SUBTYPE_I386_ALL CPU_SUBTYPE_INTEL(3, 0) | |
245 | #define CPU_SUBTYPE_386 CPU_SUBTYPE_INTEL(3, 0) | |
246 | #define CPU_SUBTYPE_486 CPU_SUBTYPE_INTEL(4, 0) | |
247 | #define CPU_SUBTYPE_486SX CPU_SUBTYPE_INTEL(4, 8) // 8 << 4 = 128 | |
248 | #define CPU_SUBTYPE_586 CPU_SUBTYPE_INTEL(5, 0) | |
249 | #define CPU_SUBTYPE_PENT CPU_SUBTYPE_INTEL(5, 0) | |
250 | #define CPU_SUBTYPE_PENTPRO CPU_SUBTYPE_INTEL(6, 1) | |
251 | #define CPU_SUBTYPE_PENTII_M3 CPU_SUBTYPE_INTEL(6, 3) | |
252 | #define CPU_SUBTYPE_PENTII_M5 CPU_SUBTYPE_INTEL(6, 5) | |
253 | #define CPU_SUBTYPE_CELERON CPU_SUBTYPE_INTEL(7, 6) | |
254 | #define CPU_SUBTYPE_CELERON_MOBILE CPU_SUBTYPE_INTEL(7, 7) | |
255 | #define CPU_SUBTYPE_PENTIUM_3 CPU_SUBTYPE_INTEL(8, 0) | |
256 | #define CPU_SUBTYPE_PENTIUM_3_M CPU_SUBTYPE_INTEL(8, 1) | |
257 | #define CPU_SUBTYPE_PENTIUM_3_XEON CPU_SUBTYPE_INTEL(8, 2) | |
258 | #define CPU_SUBTYPE_PENTIUM_M CPU_SUBTYPE_INTEL(9, 0) | |
259 | #define CPU_SUBTYPE_PENTIUM_4 CPU_SUBTYPE_INTEL(10, 0) | |
260 | #define CPU_SUBTYPE_PENTIUM_4_M CPU_SUBTYPE_INTEL(10, 1) | |
261 | #define CPU_SUBTYPE_ITANIUM CPU_SUBTYPE_INTEL(11, 0) | |
262 | #define CPU_SUBTYPE_ITANIUM_2 CPU_SUBTYPE_INTEL(11, 1) | |
263 | #define CPU_SUBTYPE_XEON CPU_SUBTYPE_INTEL(12, 0) | |
264 | #define CPU_SUBTYPE_XEON_MP CPU_SUBTYPE_INTEL(12, 1) | |
265 | ||
266 | #define CPU_SUBTYPE_INTEL_FAMILY(x) ((x) & 15) | |
267 | #define CPU_SUBTYPE_INTEL_FAMILY_MAX 15 | |
268 | ||
269 | #define CPU_SUBTYPE_INTEL_MODEL(x) ((x) >> 4) | |
270 | #define CPU_SUBTYPE_INTEL_MODEL_ALL 0 | |
271 | ||
272 | /* | |
273 | * X86 subtypes. | |
274 | */ | |
275 | ||
276 | #define CPU_SUBTYPE_X86_ALL ((cpu_subtype_t)3) | |
277 | #define CPU_SUBTYPE_X86_64_ALL ((cpu_subtype_t)3) | |
278 | #define CPU_SUBTYPE_X86_ARCH1 ((cpu_subtype_t)4) | |
279 | #define CPU_SUBTYPE_X86_64_H ((cpu_subtype_t)8) /* Haswell feature subset */ | |
280 | ||
281 | ||
282 | #define CPU_THREADTYPE_INTEL_HTT ((cpu_threadtype_t) 1) | |
283 | ||
284 | /* | |
285 | * Mips subtypes. | |
286 | */ | |
287 | ||
288 | #define CPU_SUBTYPE_MIPS_ALL ((cpu_subtype_t) 0) | |
289 | #define CPU_SUBTYPE_MIPS_R2300 ((cpu_subtype_t) 1) | |
290 | #define CPU_SUBTYPE_MIPS_R2600 ((cpu_subtype_t) 2) | |
291 | #define CPU_SUBTYPE_MIPS_R2800 ((cpu_subtype_t) 3) | |
292 | #define CPU_SUBTYPE_MIPS_R2000a ((cpu_subtype_t) 4) /* pmax */ | |
293 | #define CPU_SUBTYPE_MIPS_R2000 ((cpu_subtype_t) 5) | |
294 | #define CPU_SUBTYPE_MIPS_R3000a ((cpu_subtype_t) 6) /* 3max */ | |
295 | #define CPU_SUBTYPE_MIPS_R3000 ((cpu_subtype_t) 7) | |
296 | ||
297 | /* | |
298 | * MC98000 (PowerPC) subtypes | |
299 | */ | |
300 | #define CPU_SUBTYPE_MC98000_ALL ((cpu_subtype_t) 0) | |
301 | #define CPU_SUBTYPE_MC98601 ((cpu_subtype_t) 1) | |
302 | ||
303 | /* | |
304 | * HPPA subtypes for Hewlett-Packard HP-PA family of | |
305 | * risc processors. Port by NeXT to 700 series. | |
306 | */ | |
307 | ||
308 | #define CPU_SUBTYPE_HPPA_ALL ((cpu_subtype_t) 0) | |
309 | #define CPU_SUBTYPE_HPPA_7100 ((cpu_subtype_t) 0) /* compat */ | |
310 | #define CPU_SUBTYPE_HPPA_7100LC ((cpu_subtype_t) 1) | |
311 | ||
312 | /* | |
313 | * MC88000 subtypes. | |
314 | */ | |
315 | #define CPU_SUBTYPE_MC88000_ALL ((cpu_subtype_t) 0) | |
316 | #define CPU_SUBTYPE_MC88100 ((cpu_subtype_t) 1) | |
317 | #define CPU_SUBTYPE_MC88110 ((cpu_subtype_t) 2) | |
318 | ||
319 | /* | |
320 | * SPARC subtypes | |
321 | */ | |
322 | #define CPU_SUBTYPE_SPARC_ALL ((cpu_subtype_t) 0) | |
323 | ||
324 | /* | |
325 | * I860 subtypes | |
326 | */ | |
327 | #define CPU_SUBTYPE_I860_ALL ((cpu_subtype_t) 0) | |
328 | #define CPU_SUBTYPE_I860_860 ((cpu_subtype_t) 1) | |
329 | ||
330 | /* | |
331 | * PowerPC subtypes | |
332 | */ | |
333 | #define CPU_SUBTYPE_POWERPC_ALL ((cpu_subtype_t) 0) | |
334 | #define CPU_SUBTYPE_POWERPC_601 ((cpu_subtype_t) 1) | |
335 | #define CPU_SUBTYPE_POWERPC_602 ((cpu_subtype_t) 2) | |
336 | #define CPU_SUBTYPE_POWERPC_603 ((cpu_subtype_t) 3) | |
337 | #define CPU_SUBTYPE_POWERPC_603e ((cpu_subtype_t) 4) | |
338 | #define CPU_SUBTYPE_POWERPC_603ev ((cpu_subtype_t) 5) | |
339 | #define CPU_SUBTYPE_POWERPC_604 ((cpu_subtype_t) 6) | |
340 | #define CPU_SUBTYPE_POWERPC_604e ((cpu_subtype_t) 7) | |
341 | #define CPU_SUBTYPE_POWERPC_620 ((cpu_subtype_t) 8) | |
342 | #define CPU_SUBTYPE_POWERPC_750 ((cpu_subtype_t) 9) | |
343 | #define CPU_SUBTYPE_POWERPC_7400 ((cpu_subtype_t) 10) | |
344 | #define CPU_SUBTYPE_POWERPC_7450 ((cpu_subtype_t) 11) | |
345 | #define CPU_SUBTYPE_POWERPC_970 ((cpu_subtype_t) 100) | |
346 | ||
347 | /* | |
348 | * ARM subtypes | |
349 | */ | |
350 | #define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0) | |
351 | #define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5) | |
352 | #define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6) | |
353 | #define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7) | |
354 | #define CPU_SUBTYPE_ARM_XSCALE ((cpu_subtype_t) 8) | |
355 | #define CPU_SUBTYPE_ARM_V7 ((cpu_subtype_t) 9) | |
356 | #define CPU_SUBTYPE_ARM_V7F ((cpu_subtype_t) 10) /* Cortex A9 */ | |
357 | #define CPU_SUBTYPE_ARM_V7S ((cpu_subtype_t) 11) /* Swift */ | |
358 | #define CPU_SUBTYPE_ARM_V7K ((cpu_subtype_t) 12) | |
359 | #define CPU_SUBTYPE_ARM_V6M ((cpu_subtype_t) 14) /* Not meant to be run under xnu */ | |
360 | #define CPU_SUBTYPE_ARM_V7M ((cpu_subtype_t) 15) /* Not meant to be run under xnu */ | |
361 | #define CPU_SUBTYPE_ARM_V7EM ((cpu_subtype_t) 16) /* Not meant to be run under xnu */ | |
362 | ||
363 | #define CPU_SUBTYPE_ARM_V8 ((cpu_subtype_t) 13) | |
364 | ||
365 | /* | |
366 | * ARM64 subtypes | |
367 | */ | |
368 | #define CPU_SUBTYPE_ARM64_ALL ((cpu_subtype_t) 0) | |
369 | #define CPU_SUBTYPE_ARM64_V8 ((cpu_subtype_t) 1) | |
370 | ||
371 | ||
372 | #endif /* !__ASSEMBLER__ */ | |
373 | ||
374 | /* | |
375 | * CPU families (sysctl hw.cpufamily) | |
376 | * | |
377 | * These are meant to identify the CPU's marketing name - an | |
378 | * application can map these to (possibly) localized strings. | |
379 | * NB: the encodings of the CPU families are intentionally arbitrary. | |
380 | * There is no ordering, and you should never try to deduce whether | |
381 | * or not some feature is available based on the family. | |
382 | * Use feature flags (eg, hw.optional.altivec) to test for optional | |
383 | * functionality. | |
384 | */ | |
385 | #define CPUFAMILY_UNKNOWN 0 | |
386 | #define CPUFAMILY_POWERPC_G3 0xcee41549 | |
387 | #define CPUFAMILY_POWERPC_G4 0x77c184ae | |
388 | #define CPUFAMILY_POWERPC_G5 0xed76d8aa | |
389 | #define CPUFAMILY_INTEL_6_13 0xaa33392b | |
390 | #define CPUFAMILY_INTEL_PENRYN 0x78ea4fbc | |
391 | #define CPUFAMILY_INTEL_NEHALEM 0x6b5a4cd2 | |
392 | #define CPUFAMILY_INTEL_WESTMERE 0x573b5eec | |
393 | #define CPUFAMILY_INTEL_SANDYBRIDGE 0x5490b78c | |
394 | #define CPUFAMILY_INTEL_IVYBRIDGE 0x1f65e835 | |
395 | #define CPUFAMILY_INTEL_HASWELL 0x10b282dc | |
396 | #define CPUFAMILY_INTEL_BROADWELL 0x582ed09c | |
397 | #define CPUFAMILY_INTEL_SKYLAKE 0x37fc219f | |
398 | #define CPUFAMILY_INTEL_KABYLAKE 0x0f817246 | |
399 | #define CPUFAMILY_ARM_9 0xe73283ae | |
400 | #define CPUFAMILY_ARM_11 0x8ff620d8 | |
401 | #define CPUFAMILY_ARM_XSCALE 0x53b005f5 | |
402 | #define CPUFAMILY_ARM_12 0xbd1b0ae9 | |
403 | #define CPUFAMILY_ARM_13 0x0cc90e64 | |
404 | #define CPUFAMILY_ARM_14 0x96077ef1 | |
405 | #define CPUFAMILY_ARM_15 0xa8511bca | |
406 | #define CPUFAMILY_ARM_SWIFT 0x1e2d6381 | |
407 | #define CPUFAMILY_ARM_CYCLONE 0x37a09642 | |
408 | #define CPUFAMILY_ARM_TYPHOON 0x2c91a47e | |
409 | #define CPUFAMILY_ARM_TWISTER 0x92fb37c8 | |
410 | #define CPUFAMILY_ARM_HURRICANE 0x67ceee93 | |
411 | #define CPUFAMILY_ARM_MONSOON_MISTRAL 0xe81e7ef6 | |
412 | ||
413 | /* The following synonyms are deprecated: */ | |
414 | #define CPUFAMILY_INTEL_6_23 CPUFAMILY_INTEL_PENRYN | |
415 | #define CPUFAMILY_INTEL_6_26 CPUFAMILY_INTEL_NEHALEM | |
416 | ||
417 | ||
418 | #endif /* _MACH_MACHINE_H_ */ |