projects / apple / xnu.git / blame
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|---|---|---|
| 1c79356b A |
1 | /* |
| 2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
| 3 | * | |
| 4 | * @APPLE_LICENSE_HEADER_START@ | |
| 5 | * | |
| d7e50217 | 6 | * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. |
| 1c79356b | 7 | * |
| d7e50217 A |
8 | * This file contains Original Code and/or Modifications of Original Code |
| 9 | * as defined in and that are subject to the Apple Public Source License | |
| 10 | * Version 2.0 (the 'License'). You may not use this file except in | |
| 11 | * compliance with the License. Please obtain a copy of the License at | |
| 12 | * http://www.opensource.apple.com/apsl/ and read it before using this | |
| 13 | * file. | |
| 14 | * | |
| 15 | * The Original Code and all software distributed under the License are | |
| 16 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
| 1c79356b A |
17 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
| 18 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
| d7e50217 A |
19 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
| 20 | * Please see the License for the specific language governing rights and | |
| 21 | * limitations under the License. | |
| 1c79356b A |
22 | * |
| 23 | * @APPLE_LICENSE_HEADER_END@ | |
| 24 | */ | |
| 25 | /* | |
| 26 | * @OSF_FREE_COPYRIGHT@ | |
| 27 | * | |
| 28 | */ | |
| 29 | ||
| 30 | /* Routines to perform high-speed scrolling, assuming that the memory is | |
| 31 | * non-cached, and that the amount of memory to be scrolled is a multiple | |
| 32 | * of (at least) 16. | |
| 33 | */ | |
| 34 | ||
| 35 | #include <ppc/asm.h> | |
| 36 | #include <ppc/proc_reg.h> | |
| 37 | ||
| 38 | /* | |
| 39 | * void video_scroll_up(unsigned long start, | |
| 40 | * unsigned long end, | |
| 41 | * unsigned long dest) | |
| 42 | */ | |
| 43 | ||
| 44 | ENTRY(video_scroll_up, TAG_NO_FRAME_USED) | |
| 45 | ||
| d7e50217 A |
46 | |
| 47 | lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag | |
| 48 | mfmsr r0 ; Get the MSR | |
| 49 | ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag | |
| 50 | mflr r6 ; Get the LR | |
| 51 | andc r0,r0,r8 ; Clear VEC and FP | |
| 52 | ori r7,r8,lo16(MASK(MSR_EE)) ; Drop EE and DR | |
| 53 | andc r7,r0,r7 ; Clear VEC, FP, and EE | |
| 54 | ori r7,r7,MASK(MSR_FP) ; Turn floating point back on | |
| 55 | stwu r1,-(FM_SIZE+16)(r1) ; Get space for a couple of registers on stack | |
| 56 | stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) ; Save the return | |
| 1c79356b | 57 | |
| d7e50217 A |
58 | mtmsr r7 ; Turn on FPU |
| 59 | isync ; Wait for it | |
| 1c79356b | 60 | |
| d7e50217 A |
61 | vsufpuon1: stfd f0,(FM_SIZE+0)(r1) ; Save one register |
| 62 | stfd f1,(FM_SIZE+8)(r1) ; and the second | |
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63 | |
| 64 | /* ok, now we can use the FPU registers to do some fast copying | |
| 65 | */ | |
| 66 | ||
| 67 | .L_vscr_up_loop: | |
| 68 | lfd f0, 0(r3) | |
| 69 | lfd f1, 8(r3) | |
| 70 | ||
| 71 | addi r3, r3, 16 | |
| 72 | ||
| 73 | stfd f0, 0(r5) | |
| 74 | ||
| 75 | cmpl cr0, r3, r4 | |
| 76 | ||
| 77 | stfd f1, 8(r5) | |
| 78 | ||
| 79 | addi r5, r5, 16 | |
| 80 | ||
| 81 | blt+ cr0, .L_vscr_up_loop | |
| 82 | ||
| 83 | lfd f0,(FM_SIZE+0)(r1) /* Load back one register */ | |
| 84 | lfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
| 85 | lwz r1,0(r1) /* Pop the stack */ | |
| 86 | ||
| 87 | mtmsr r0 /* Turn off FPU again */ | |
| 88 | isync /* Wait for it */ | |
| 89 | blr /* Go away, don't bother me... */ | |
| 90 | ||
| 91 | ||
| 92 | /* | |
| 93 | * void video_scroll_down(unsigned long start, HIGH address to scroll from | |
| 94 | * unsigned long end, LOW address | |
| 95 | * unsigned long dest) HIGH address | |
| 96 | */ | |
| 97 | ||
| 98 | ENTRY(video_scroll_down, TAG_NO_FRAME_USED) | |
| 99 | ||
| 100 | /* Save off the link register, we want to call fpu_save. | |
| 101 | */ | |
| 102 | ||
| 103 | ||
| d7e50217 A |
104 | lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag |
| 105 | mfmsr r0 ; Get the MSR | |
| 106 | ori r8,r8,lo16(MASK(MSR_FP)) ; Add the FP flag | |
| 107 | mflr r6 ; Get the LR | |
| 108 | andc r0,r0,r8 ; Clear VEC and FP | |
| 109 | ori r7,r8,lo16(MASK(MSR_EE)) ; Drop EE and DR | |
| 110 | andc r7,r0,r7 ; Clear VEC, FP, DR, and EE | |
| 111 | ori r7,r7,MASK(MSR_FP) ; Turn on floating point | |
| 112 | stwu r1,-(FM_SIZE+16)(r1) ; Get space for a couple of registers on stack | |
| 113 | stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) ; Save the return | |
| 1c79356b | 114 | |
| d7e50217 A |
115 | mtmsr r7 ; Turn on FPU |
| 116 | isync ; Wait for it | |
| 1c79356b | 117 | |
| d7e50217 A |
118 | vsdfpuon1: stfd f0,(FM_SIZE+0)(r1) ; Save one register |
| 119 | stfd f1,(FM_SIZE+8)(r1) ; and the second | |
| 120 | ||
| 1c79356b A |
121 | |
| 122 | /* ok, now we can use the FPU registers to do some fast copying */ | |
| 123 | ||
| 124 | .L_vscr_down_loop: | |
| 125 | lfd f0, -16(r3) | |
| 126 | lfd f1, -8(r3) | |
| 127 | ||
| 128 | subi r3, r3, 16 | |
| 129 | ||
| 130 | stfd f0, -16(r5) | |
| 131 | ||
| 132 | cmpl cr0, r3, r4 | |
| 133 | ||
| 134 | stfd f1, -8(r5) | |
| 135 | ||
| 136 | subi r5, r5, 16 | |
| 137 | ||
| 138 | bgt+ cr0, .L_vscr_down_loop | |
| 139 | ||
| 140 | ||
| 141 | lfd f0,(FM_SIZE+0)(r1) /* Load back one register */ | |
| 142 | lfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
| 143 | lwz r1,0(r1) /* Pop the stack */ | |
| 144 | ||
| 145 | mtmsr r0 /* Turn off FPU again */ | |
| 146 | isync /* Wait for it */ | |
| 147 | blr /* Go away, don't bother me... */ | |
| 148 |