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1c79356b A |
1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * The contents of this file constitute Original Code as defined in and | |
7 | * are subject to the Apple Public Source License Version 1.1 (the | |
8 | * "License"). You may not use this file except in compliance with the | |
9 | * License. Please obtain a copy of the License at | |
10 | * http://www.apple.com/publicsource and read it before using this file. | |
11 | * | |
12 | * This Original Code and all software distributed under the License are | |
13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the | |
17 | * License for the specific language governing rights and limitations | |
18 | * under the License. | |
19 | * | |
20 | * @APPLE_LICENSE_HEADER_END@ | |
21 | */ | |
22 | /* | |
23 | * @OSF_COPYRIGHT@ | |
24 | */ | |
25 | ||
26 | /* Low level routines dealing with exception entry and exit. | |
27 | * There are various types of exception: | |
28 | * | |
29 | * Interrupt, trap, system call and debugger entry. Each has it's own | |
30 | * handler since the state save routine is different for each. The | |
31 | * code is very similar (a lot of cut and paste). | |
32 | * | |
33 | * The code for the FPU disabled handler (lazy fpu) is in cswtch.s | |
34 | */ | |
35 | ||
36 | #include <debug.h> | |
37 | #include <mach_assert.h> | |
38 | #include <mach/exception_types.h> | |
39 | #include <mach/ppc/vm_param.h> | |
40 | ||
41 | #include <assym.s> | |
42 | ||
43 | #include <ppc/asm.h> | |
44 | #include <ppc/proc_reg.h> | |
45 | #include <ppc/trap.h> | |
46 | #include <ppc/exception.h> | |
9bccf70c | 47 | #include <ppc/savearea.h> |
1c79356b A |
48 | #include <ppc/spl.h> |
49 | ||
50 | ||
51 | #define VERIFYSAVE 0 | |
52 | #define FPVECDBG 0 | |
53 | ||
54 | /* | |
55 | * thandler(type) | |
56 | * | |
57 | * ENTRY: VM switched ON | |
58 | * Interrupts OFF | |
59 | * R3 contains exception code | |
60 | * R4 points to the saved context (virtual address) | |
61 | * Everything is saved in savearea | |
62 | */ | |
63 | ||
64 | /* | |
65 | * If pcb.ksp == 0 then the kernel stack is already busy, | |
9bccf70c | 66 | * we make a stack frame |
1c79356b A |
67 | * leaving enough space for the 'red zone' in case the |
68 | * trapped thread was in the middle of saving state below | |
69 | * its stack pointer. | |
70 | * | |
9bccf70c | 71 | * otherwise we make a stack frame and |
1c79356b A |
72 | * the kernel stack (setting pcb.ksp to 0) |
73 | * | |
74 | * on return, we do the reverse, the last state is popped from the pcb | |
75 | * and pcb.ksp is set to the top of stack | |
76 | */ | |
77 | ||
1c79356b A |
78 | /* TRAP_SPACE_NEEDED is the space assumed free on the kernel stack when |
79 | * another trap is taken. We need at least enough space for a saved state | |
80 | * structure plus two small backpointer frames, and we add a few | |
81 | * hundred bytes for the space needed by the C (which may be less but | |
82 | * may be much more). We're trying to catch kernel stack overflows :-) | |
83 | */ | |
84 | ||
85 | #define TRAP_SPACE_NEEDED FM_REDZONE+(2*FM_SIZE)+256 | |
86 | ||
1c79356b A |
87 | .text |
88 | ||
0b4e3aa0 A |
89 | .align 5 |
90 | .globl EXT(thandler) | |
9bccf70c | 91 | LEXT(thandler) ; Trap handler |
0b4e3aa0 | 92 | |
9bccf70c | 93 | mfsprg r25,0 ; Get the per_proc |
1c79356b | 94 | |
9bccf70c | 95 | lwz r1,PP_ISTACKPTR(r25) ; Get interrupt stack pointer |
1c79356b | 96 | |
9bccf70c A |
97 | cmpwi cr0,r1,0 ; Are we on interrupt stack? |
98 | lwz r6,PP_ACTIVE_THREAD(r25) ; Get the pointer to the currently active thread | |
99 | beq- cr0,EXT(ihandler) ; If on interrupt stack, treat this as interrupt... | |
100 | lwz r13,THREAD_TOP_ACT(r6) ; Point to the active activation | |
101 | lwz r26,ACT_MACT_SPF(r13) ; Get special flags | |
102 | lwz r8,ACT_MACT_PCB(r13) ; Get the last savearea used | |
0b4e3aa0 | 103 | rlwinm. r26,r26,0,bbThreadbit,bbThreadbit ; Do we have Blue Box Assist active? |
9bccf70c A |
104 | lwz r1,ACT_MACT_KSP(r13) ; Get the top of kernel stack |
105 | bnel- checkassist ; See if we should assist this | |
106 | stw r4,ACT_MACT_PCB(r13) ; Point to our savearea | |
107 | stw r8,SAVprev(r4) ; Queue the new save area in the front | |
1c79356b A |
108 | |
109 | #if VERIFYSAVE | |
9bccf70c | 110 | bl versave ; (TEST/DEBUG) |
1c79356b A |
111 | #endif |
112 | ||
9bccf70c A |
113 | lwz r9,THREAD_KERNEL_STACK(r6) ; Get our kernel stack start |
114 | cmpwi cr1,r1,0 ; Are we already on kernel stack? | |
115 | stw r13,SAVact(r4) ; Mark the savearea as belonging to this activation | |
116 | lwz r26,saver1(r4) ; Get the stack at interrupt time | |
1c79356b | 117 | |
9bccf70c | 118 | bne+ cr1,.L_kstackfree ; We are not on kernel stack yet... |
1c79356b | 119 | |
9bccf70c | 120 | subi r1,r26,FM_REDZONE ; Make a red zone on interrupt time kernel stack |
1c79356b A |
121 | |
122 | .L_kstackfree: | |
9bccf70c A |
123 | lwz r7,savesrr1(r4) ; Pick up the entry MSR |
124 | sub r9,r1,r9 ; Get displacment into the kernel stack | |
125 | li r0,0 ; Make this 0 | |
126 | cmplwi cr2,r9,KERNEL_STACK_SIZE ; Do we still have room on the stack? | |
127 | beq cr1,.L_state_on_kstack ; using above test for pcb/stack | |
1c79356b | 128 | |
9bccf70c | 129 | stw r0,ACT_MACT_KSP(r13) ; Show that we have taken the stack |
1c79356b A |
130 | |
131 | .L_state_on_kstack: | |
9bccf70c | 132 | lwz r9,savevrsave(r4) ; Get the VRSAVE register |
1c79356b | 133 | rlwinm. r6,r7,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on? |
9bccf70c A |
134 | subi r1,r1,FM_SIZE ; Push a header onto the current stack |
135 | bgt- cr2,kernelStackBad ; Kernel stack is bogus... | |
136 | ||
137 | kernelStackNotBad: ; Vector was off | |
138 | beq+ tvecoff ; Vector off, do not save vrsave... | |
139 | stw r9,liveVRS(r25) ; Set the live value | |
140 | ||
141 | tvecoff: stw r26,FM_BACKPTR(r1) ; Link back to the previous frame | |
1c79356b A |
142 | |
143 | #if DEBUG | |
144 | /* If debugging, we need two frames, the first being a dummy | |
145 | * which links back to the trapped routine. The second is | |
146 | * that which the C routine below will need | |
147 | */ | |
9bccf70c A |
148 | lwz r3,savesrr0(r4) ; Get the point of interruption |
149 | stw r3,FM_LR_SAVE(r1) ; save old instr ptr as LR value | |
150 | stwu r1, -FM_SIZE(r1) ; and make new frame | |
1c79356b A |
151 | #endif /* DEBUG */ |
152 | ||
153 | ||
154 | /* call trap handler proper, with | |
155 | * ARG0 = type (not yet, holds pcb ptr) | |
156 | * ARG1 = saved_state ptr (already there) | |
157 | * ARG2 = dsisr (already there) | |
158 | * ARG3 = dar (already there) | |
159 | */ | |
160 | ||
161 | ||
9bccf70c A |
162 | lwz r3,saveexception(r4) ; Get the exception code |
163 | lwz r0,ACT_MACT_SPF(r13) ; Get the special flags | |
1c79356b | 164 | |
9bccf70c | 165 | addi r5,r3,-T_DATA_ACCESS ; Adjust to start of range |
1c79356b | 166 | rlwinm. r0,r0,0,runningVMbit,runningVMbit ; Are we in VM state? (cr0_eq == 0 if yes) |
9bccf70c | 167 | cmplwi cr2,r5,T_TRACE-T_DATA_ACCESS ; Are we still in range? (cr_gt if not) |
1c79356b | 168 | |
9bccf70c | 169 | lwz r5,savedsisr(r4) ; Get the saved DSISR |
1c79356b | 170 | |
9bccf70c | 171 | crnor cr7_eq,cr0_eq,cr2_gt ; We should intercept if in VM and is a true trap (cr7_eq == 1 if yes) |
1c79356b A |
172 | rlwinm. r0,r7,0,MSR_PR_BIT,MSR_PR_BIT ; Are we trapping from supervisor state? (cr0_eq == 1 if yes) |
173 | ||
9bccf70c | 174 | cmpi cr2,r3,T_PREEMPT ; Is this a preemption? |
1c79356b | 175 | |
9bccf70c | 176 | crandc cr0_eq,cr7_eq,cr0_eq ; Do not intercept if we are in the kernel (cr0_eq == 1 if yes) |
1c79356b | 177 | |
9bccf70c | 178 | lwz r6,savedar(r4) ; Get the DAR |
1c79356b | 179 | |
9bccf70c A |
180 | beq- cr2, .L_call_trap ; Do not turn on interrupts for T_PREEMPT |
181 | beq- exitFromVM ; Any true trap but T_MACHINE_CHECK exits us from the VM... | |
1c79356b A |
182 | |
183 | /* syscall exception might warp here if there's nothing left | |
184 | * to do except generate a trap | |
185 | */ | |
186 | ||
187 | .L_call_trap: | |
1c79356b A |
188 | |
189 | bl EXT(trap) | |
190 | ||
9bccf70c A |
191 | mfmsr r7 ; Get the MSR |
192 | rlwinm r7,r7,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off | |
193 | rlwinm r7,r7,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off | |
194 | rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear the interrupt enable mask | |
195 | mtmsr r7 ; Disable for interrupts | |
196 | mfsprg r10,0 ; Restore the per_proc info | |
1c79356b | 197 | /* |
1c79356b A |
198 | * This is also the point where new threads come when they are created. |
199 | * The new thread is setup to look like a thread that took an | |
200 | * interrupt and went immediatly into trap. | |
1c79356b A |
201 | */ |
202 | ||
203 | thread_return: | |
9bccf70c A |
204 | lwz r4,SAVprev(r3) ; Pick up the previous savearea |
205 | lwz r11,SAVflags(r3) ; Get the flags of the current savearea | |
206 | lwz r8,savesrr1(r3) ; Get the MSR we are going to | |
207 | rlwinm r11,r11,0,15,13 ; Clear the syscall flag | |
208 | lwz r1,PP_ACTIVE_THREAD(r10) ; Get the active thread | |
1c79356b | 209 | rlwinm. r8,r8,0,MSR_PR_BIT,MSR_PR_BIT ; Are we going to the user? |
9bccf70c A |
210 | mfsprg r8,1 ; Get the current activation |
211 | stw r11,SAVflags(r3) ; Save back the flags (with reset stack cleared) | |
1c79356b | 212 | |
9bccf70c | 213 | stw r4,ACT_MACT_PCB(r8) ; Point to the previous savearea (or 0 if none) |
1c79356b | 214 | |
9bccf70c | 215 | beq- chkfac ; We are not leaving the kernel yet... |
1c79356b | 216 | |
9bccf70c A |
217 | lwz r5,THREAD_KERNEL_STACK(r1) ; Get the base pointer to the stack |
218 | addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty | |
219 | stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer | |
220 | b chkfac ; Go end it all... | |
1c79356b A |
221 | |
222 | ||
0b4e3aa0 A |
223 | ; |
224 | ; Here is where we go when we detect that the kernel stack is all messed up. | |
225 | ; We just try to dump some info and get into the debugger. | |
226 | ; | |
227 | ||
228 | kernelStackBad: | |
229 | ||
9bccf70c | 230 | lwz r3,PP_DEBSTACK_TOP_SS(r25) ; Pick up debug stack top |
0b4e3aa0 | 231 | subi r3,r3,KERNEL_STACK_SIZE-FM_SIZE ; Adjust to start of stack |
9bccf70c | 232 | sub r3,r1,r3 ; Get displacement into debug stack |
0b4e3aa0 | 233 | cmplwi cr2,r3,KERNEL_STACK_SIZE-FM_SIZE ; Check if we are on debug stack |
9bccf70c | 234 | blt+ cr2,kernelStackNotBad ; Yeah, that is ok too... |
0b4e3aa0 | 235 | |
9bccf70c A |
236 | lis r0,hi16(Choke) ; Choke code |
237 | ori r0,r0,lo16(Choke) ; and the rest | |
238 | li r3,failStack ; Bad stack code | |
239 | sc ; System ABEND | |
0b4e3aa0 | 240 | |
1c79356b A |
241 | |
242 | /* | |
243 | * shandler(type) | |
244 | * | |
245 | * ENTRY: VM switched ON | |
246 | * Interrupts OFF | |
247 | * R3 contains exception code | |
248 | * R4 points to the saved context (virtual address) | |
249 | * Everything is saved in savearea | |
250 | */ | |
251 | ||
252 | /* | |
253 | * If pcb.ksp == 0 then the kernel stack is already busy, | |
254 | * this is an error - jump to the debugger entry | |
255 | * | |
256 | * otherwise depending upon the type of | |
257 | * syscall, look it up in the kernel table | |
258 | * or pass it to the server. | |
259 | * | |
260 | * on return, we do the reverse, the state is popped from the pcb | |
261 | * and pcb.ksp is set to the top of stack. | |
262 | */ | |
263 | ||
264 | /* | |
265 | * NOTE: | |
266 | * mach system calls are negative | |
267 | * BSD system calls are low positive | |
268 | * PPC-only system calls are in the range 0x6xxx | |
269 | * PPC-only "fast" traps are in the range 0x7xxx | |
270 | */ | |
271 | ||
0b4e3aa0 A |
272 | .align 5 |
273 | .globl EXT(shandler) | |
9bccf70c A |
274 | LEXT(shandler) ; System call handler |
275 | ||
276 | mfsprg r25,0 ; Get the per proc area | |
277 | lwz r0,saver0(r4) ; Get the original syscall number | |
278 | lwz r17,PP_ISTACKPTR(r25) ; Get interrupt stack pointer | |
279 | rlwinm r15,r0,0,0,19 ; Clear the bottom of call number for fast check | |
280 | mr. r17,r17 ; Are we on interrupt stack? | |
281 | lwz r7,savesrr1(r4) ; Get the SRR1 value | |
282 | beq- EXT(ihandler) ; On interrupt stack, not allowed... | |
283 | lwz r9,savevrsave(r4) ; Get the VRsave register | |
1c79356b | 284 | rlwinm. r6,r7,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on? |
9bccf70c A |
285 | lwz r16,PP_ACTIVE_THREAD(r25) ; Get the thread pointer |
286 | mfsprg r13,1 ; Pick up the active thread | |
1c79356b | 287 | |
9bccf70c A |
288 | beq+ svecoff ; Vector off, do not save vrsave... |
289 | stw r9,liveVRS(r25) ; Set the live value | |
290 | ; | |
1c79356b | 291 | ; Check if SCs are being redirected for the BlueBox or to VMM |
9bccf70c | 292 | ; |
1c79356b | 293 | |
9bccf70c A |
294 | svecoff: lwz r6,ACT_MACT_SPF(r13) ; Pick up activation special flags |
295 | mtcrf 0x41,r6 ; Check special flags | |
296 | crmove cr6_eq,runningVMbit ; Remember if we are in VMM | |
297 | bf+ bbNoMachSCbit,noassist ; Take branch if SCs are not redirected | |
298 | lwz r26,ACT_MACT_BEDA(r13) ; Pick up the pointer to the blue box exception area | |
299 | b EXT(atomic_switch_syscall) ; Go to the assist... | |
1c79356b | 300 | |
9bccf70c A |
301 | noassist: cmplwi r15,0x7000 ; Do we have a fast path trap? |
302 | lwz r14,ACT_MACT_PCB(r13) ; Now point to the PCB | |
303 | beql+ fastpath ; We think it is a fastpath... | |
1c79356b | 304 | |
9bccf70c | 305 | lwz r1,ACT_MACT_KSP(r13) ; Get the kernel stack pointer |
1c79356b | 306 | #if DEBUG |
9bccf70c A |
307 | mr. r1,r1 ; Are we already on the kernel stack? |
308 | li r3,T_SYSTEM_CALL ; Yup, pretend we had an interrupt... | |
309 | beq- EXT(ihandler) ; Bad boy, bad boy... What cha gonna do when they come for you? | |
1c79356b A |
310 | #endif /* DEBUG */ |
311 | ||
9bccf70c A |
312 | stw r4,ACT_MACT_PCB(r13) ; Point to our savearea |
313 | li r0,0 ; Clear this out | |
314 | stw r14,SAVprev(r4) ; Queue the new save area in the front | |
315 | stw r13,SAVact(r4) ; Point the savearea at its activation | |
1c79356b A |
316 | |
317 | #if VERIFYSAVE | |
9bccf70c | 318 | bl versave ; (TEST/DEBUG) |
1c79356b A |
319 | #endif |
320 | ||
9bccf70c A |
321 | mr r30,r4 ; Save pointer to the new context savearea |
322 | lwz r15,saver1(r4) ; Grab interrupt time stack | |
323 | stw r0,ACT_MACT_KSP(r13) ; Mark stack as busy with 0 val | |
324 | stw r15,FM_BACKPTR(r1) ; Link stack frame backwards | |
1c79356b A |
325 | |
326 | #if DEBUG | |
9bccf70c A |
327 | /* If debugging, we need two frames, the first being a dummy |
328 | * which links back to the trapped routine. The second is | |
329 | * that which the C routine below will need | |
330 | */ | |
331 | lwz r8,savesrr0(r30) ; Get the point of interruption | |
332 | stw r8,FM_LR_SAVE(r1) ; Save old instr ptr as LR value | |
333 | stwu r1, -FM_SIZE(r1) ; and make new frame | |
1c79356b A |
334 | #endif /* DEBUG */ |
335 | ||
9bccf70c A |
336 | mfmsr r11 ; Get the MSR |
337 | lwz r15,SAVflags(r30) ; Get the savearea flags | |
338 | ori r11,r11,lo16(MASK(MSR_EE)) ; Turn on interruption enabled bit | |
339 | lwz r0,saver0(r30) ; Get R0 back | |
340 | oris r15,r15,SAVsyscall >> 16 ; Mark that it this is a syscall | |
341 | rlwinm r10,r0,0,0,19 ; Keep only the top part | |
342 | stwu r1,-(FM_SIZE+ARG_SIZE)(r1) ; Make a stack frame | |
343 | cmplwi r10,0x6000 ; Is it the special ppc-only guy? | |
344 | stw r15,SAVflags(r30) ; Save syscall marker | |
345 | beq- cr6,exitFromVM ; It is time to exit from alternate context... | |
346 | ||
347 | beq- ppcscall ; Call the ppc-only system call handler... | |
348 | ||
349 | mtmsr r11 ; Enable interruptions | |
350 | ||
351 | lwz r0,saver0(r30) ; Get the system call selector | |
352 | mr. r0,r0 ; What kind is it? | |
353 | blt- .L_kernel_syscall ; System call number if negative, this is a mach call... | |
354 | ||
355 | cmpwi cr0,r0,0x7FFA ; Special blue box call? | |
356 | beq- .L_notify_interrupt_syscall ; Yeah, call it... | |
357 | ||
358 | lwz r8,ACT_TASK(r13) ; Get our task | |
359 | lis r10,hi16(EXT(c_syscalls_unix)) ; Get top half of counter address | |
360 | lwz r7,TASK_SYSCALLS_UNIX(r8) ; Get the current count | |
361 | ori r10,r10,lo16(EXT(c_syscalls_unix)) ; Get low half of counter address | |
362 | addi r7,r7,1 ; Bump it | |
363 | lwz r9,0(r10) ; Get counter | |
364 | stw r7,TASK_SYSCALLS_UNIX(r8) ; Save it | |
365 | mr r3,r30 ; Get PCB/savearea | |
366 | mr r4,r13 ; current activation | |
367 | addi r9,r9,1 ; Add 1 | |
368 | stw r9,0(r10) ; Save it back | |
369 | bl EXT(unix_syscall) ; Check out unix... | |
1c79356b A |
370 | |
371 | .L_call_server_syscall_exception: | |
9bccf70c | 372 | li r3,EXC_SYSCALL ; doexception(EXC_SYSCALL, num, 1) |
1c79356b A |
373 | |
374 | .L_call_server_exception: | |
9bccf70c | 375 | mr r4,r0 ; Set syscall selector |
1c79356b | 376 | li r5,1 |
9bccf70c | 377 | b EXT(doexception) ; Go away, never to return... |
1c79356b A |
378 | |
379 | .L_notify_interrupt_syscall: | |
9bccf70c | 380 | lwz r3,saver3(r30) ; Get the new PC address to pass in |
1c79356b A |
381 | bl EXT(syscall_notify_interrupt) |
382 | b .L_syscall_return | |
383 | ||
384 | ; | |
385 | ; Handle PPC-only system call interface | |
386 | ; These are called with interruptions disabled | |
387 | ; and the savearea/pcb as the first parameter. | |
388 | ; It is up to the callee to enable interruptions if | |
389 | ; they should be. We are in a state here where | |
390 | ; both interrupts and preemption is ok, but because we could | |
391 | ; be calling diagnostic code we will not enable. | |
392 | ; | |
393 | ; Also, the callee is responsible for finding any parameters | |
394 | ; in the savearea/pcb. It also must set saver3 with any return | |
395 | ; code before returning. | |
396 | ; | |
397 | ; There are 3 possible return codes: | |
398 | ; 0 the call is disabled or something, we treat this like it was bogus | |
399 | ; + the call finished ok, check for AST | |
400 | ; - the call finished ok, do not check for AST | |
401 | ; | |
402 | ; Note: the last option is intended for special diagnostics calls that | |
403 | ; want the thread to return and execute before checking for preemption. | |
404 | ; | |
9bccf70c A |
405 | ; NOTE: Both R16 (thread) and R30 (savearea) need to be preserved over this call!!!! |
406 | ; | |
407 | ||
408 | .align 5 | |
1c79356b | 409 | |
9bccf70c A |
410 | ppcscall: rlwinm r11,r0,2,18,29 ; Make an index into the table |
411 | lis r10,hi16(EXT(PPCcalls)) ; Get PPC-only system call table | |
412 | cmplwi r11,PPCcallmax ; See if we are too big | |
413 | ori r10,r10,lo16(EXT(PPCcalls)) ; Merge in low half | |
1c79356b | 414 | bgt- .L_call_server_syscall_exception ; Bogus call... |
9bccf70c | 415 | lwzx r11,r10,r11 ; Get function address |
1c79356b A |
416 | |
417 | ; | |
418 | ; Note: make sure we do not change the savearea in R30 to | |
419 | ; a different register without checking. Some of the PPCcalls | |
420 | ; depend upon it being there. | |
421 | ; | |
422 | ||
9bccf70c A |
423 | mr r3,r30 ; Pass the savearea |
424 | mr r4,r13 ; Pass the activation | |
425 | mr. r11,r11 ; See if there is a function here | |
426 | mtlr r11 ; Set the function address | |
1c79356b | 427 | beq- .L_call_server_syscall_exception ; Disabled call... |
9bccf70c A |
428 | blrl ; Call it |
429 | ||
1c79356b | 430 | .globl EXT(ppcscret) |
9bccf70c | 431 | |
1c79356b | 432 | LEXT(ppcscret) |
9bccf70c A |
433 | mr. r3,r3 ; See what we should do |
434 | mr r31,r16 ; Restore the current thread pointer | |
1c79356b | 435 | bgt+ .L_thread_syscall_ret_check_ast ; Take normal AST checking return.... |
9bccf70c A |
436 | mfsprg r10,0 ; Get the per_proc |
437 | blt+ .L_thread_syscall_return ; Return, but no ASTs.... | |
438 | lwz r0,saver0(r30) ; Restore the system call number | |
1c79356b A |
439 | b .L_call_server_syscall_exception ; Go to common exit... |
440 | ||
441 | ||
442 | /* Once here, we know that the syscall was -ve | |
443 | * we should still have r1=ksp, | |
444 | * r16 = pointer to current thread, | |
445 | * r13 = pointer to top activation, | |
446 | * r0 = syscall number | |
447 | * r30 = pointer to saved state (in pcb) | |
448 | */ | |
1c79356b | 449 | |
9bccf70c | 450 | .align 5 |
1c79356b | 451 | |
9bccf70c A |
452 | .L_kernel_syscall: |
453 | ; | |
454 | ; Call a function that can print out our syscall info | |
455 | ; Note that we don t care about any volatiles yet | |
456 | ; | |
457 | mr r4,r30 | |
458 | bl EXT(syscall_trace) | |
459 | lwz r0,saver0(r30) ; Get the system call selector */ | |
460 | neg r31,r0 ; Make system call number positive and put in r31 | |
461 | lis r29,hi16(EXT(mach_trap_count)) ; High part of valid trap number | |
462 | ori r29,r29,lo16(EXT(mach_trap_count)) ; Low part of valid trap number | |
463 | lis r28,hi16(EXT(mach_trap_table)) ; High part of trap table | |
464 | lwz r29,0(r29) ; Get the first invalid system call number | |
465 | ori r28,r28,lo16(EXT(mach_trap_table)) ; Low part of trap table | |
466 | ||
467 | cmplw r31,r29 ; See if we have a valid system call number | |
468 | slwi r31,r31,MACH_TRAP_OFFSET_POW2 ; Get offset into table | |
469 | ||
470 | bge- .L_call_server_syscall_exception ; System call number of bogus | |
471 | ||
472 | add r31,r31,r28 ; Point to the system call entry | |
473 | lis r28,hi16(EXT(kern_invalid)) ; Get the high invalid routine address | |
474 | lwz r0,MACH_TRAP_FUNCTION(r31) ; Grab the system call routine address | |
475 | ori r28,r28,lo16(EXT(kern_invalid)) ; Get the low part of the invalid routine address | |
476 | lwz r29,MACH_TRAP_ARGC(r31) ; Get the number of arguments in the call | |
477 | cmplw r0,r28 ; Is this an invalid entry? | |
478 | beq- .L_call_server_syscall_exception ; Yes, it is invalid... | |
479 | ||
480 | /* get arg count. If argc > 8 then not all args were in regs, | |
481 | * so we must perform copyin. | |
482 | */ | |
483 | cmpwi cr0,r29,8 ; Do we have more than 8 arguments? | |
484 | ble+ .L_syscall_got_args ; Nope, no copy in needed... | |
1c79356b A |
485 | |
486 | /* argc > 8 - perform a copyin */ | |
487 | /* if the syscall came from kernel space, we can just copy */ | |
488 | ||
9bccf70c A |
489 | lwz r0,savesrr1(r30) ; Pick up exception time MSR |
490 | andi. r0,r0,MASK(MSR_PR) ; Check the priv bit | |
491 | bne+ .L_syscall_arg_copyin ; We are not priviliged... | |
1c79356b A |
492 | |
493 | /* we came from a privilaged task, just do a copy */ | |
494 | /* get user's stack pointer */ | |
495 | ||
9bccf70c | 496 | lwz r28,saver1(r30) ; Get the stack pointer |
1c79356b | 497 | |
9bccf70c | 498 | subi r29,r29,8 ; Get the number of arguments to copy |
1c79356b | 499 | |
9bccf70c A |
500 | addi r28,r28,COPYIN_ARG0_OFFSET-4 ; Point to source - 4 |
501 | addi r27,r1,FM_ARG0-4 ; Point to sink - 4 | |
1c79356b A |
502 | |
503 | .L_syscall_copy_word_loop: | |
9bccf70c A |
504 | addic. r29,r29,-1 ; Count down the number of arguments left |
505 | lwz r0,4(r28) ; Pick up the argument from the stack | |
506 | addi r28,r28,4 ; Point to the next source | |
507 | stw r0,4(r27) ; Store the argument | |
508 | addi r27,r27,4 ; Point to the next sink | |
509 | bne+ .L_syscall_copy_word_loop ; Move all arguments... | |
510 | b .L_syscall_got_args ; Go call it now... | |
1c79356b A |
511 | |
512 | ||
513 | /* we came from a user task, pay the price of a real copyin */ | |
514 | /* set recovery point */ | |
515 | ||
9bccf70c A |
516 | .align 5 |
517 | ||
1c79356b A |
518 | .L_syscall_arg_copyin: |
519 | lwz r8,ACT_VMMAP(r13) ; Get the vm_map for this activation | |
520 | lis r28,hi16(.L_syscall_copyin_recover) | |
521 | lwz r8,VMMAP_PMAP(r8) ; Get the pmap | |
522 | ori r28,r28,lo16(.L_syscall_copyin_recover) | |
523 | addi r8,r8,PMAP_SEGS ; Point to the pmap SR slots | |
9bccf70c | 524 | stw r28,THREAD_RECOVER(r16) ; R16 still holds thread ptr |
1c79356b A |
525 | |
526 | /* We can manipulate the COPYIN segment register quite easily | |
527 | * here, but we've also got to make sure we don't go over a | |
528 | * segment boundary - hence some mess. | |
529 | * Registers from 12-29 are free for our use. | |
530 | */ | |
531 | ||
532 | ||
9bccf70c A |
533 | lwz r28,saver1(r30) ; Get the stack pointer |
534 | subi r29,r29,8 ; Get the number of arguments to copy | |
535 | addi r28,r28,COPYIN_ARG0_OFFSET ; Set source in user land | |
1c79356b A |
536 | |
537 | /* set up SR_COPYIN to allow us to copy, we may need to loop | |
538 | * around if we change segments. We know that this previously | |
539 | * pointed to user space, so the sid doesn't need setting. | |
540 | */ | |
541 | ||
542 | rlwinm r7,r28,6,26,29 ; Get index to the segment slot | |
543 | ||
9bccf70c | 544 | .L_syscall_copyin_seg_loop: |
1c79356b A |
545 | lwzx r10,r8,r7 ; Get the source SR value |
546 | rlwinm r26,r28,0,4,31 ; Clear the segment number from source address | |
547 | mtsr SR_COPYIN,r10 ; Set the copyin SR | |
548 | isync | |
549 | ||
550 | oris r26,r26,(SR_COPYIN_NUM << (28-16)) ; Insert the copyin segment number into source address | |
551 | ||
9bccf70c | 552 | addi r27,r1,FM_ARG0-4 ; Point to area - 4 where we will store the arguments |
1c79356b | 553 | |
9bccf70c A |
554 | .L_syscall_copyin_word_loop: |
555 | lwz r0,0(r26) ; MAY CAUSE PAGE FAULT! | |
1c79356b A |
556 | subi r29,r29,1 ; Decrement count |
557 | addi r26,r26,4 ; Bump input | |
558 | stw r0,4(r27) ; Save the copied in word | |
559 | mr. r29,r29 ; Are they all moved? | |
560 | addi r27,r27,4 ; Bump output | |
561 | beq+ .L_syscall_copyin_done ; Escape if we are done... | |
562 | ||
563 | rlwinm. r0,r26,0,4,29 ; Did we just step into a new segment? | |
564 | addi r28,r28,4 ; Bump up user state address also | |
565 | bne+ .L_syscall_copyin_word_loop ; We are still on the same segment... | |
566 | ||
567 | addi r7,r7,4 ; Bump to next slot | |
9bccf70c | 568 | b .L_syscall_copyin_seg_loop ; On new segment! remap |
1c79356b A |
569 | |
570 | /* Don't bother restoring SR_COPYIN, we can leave it trashed */ | |
571 | /* clear thread recovery as we're done touching user data */ | |
572 | ||
9bccf70c A |
573 | .align 5 |
574 | ||
1c79356b A |
575 | .L_syscall_copyin_done: |
576 | li r0,0 | |
9bccf70c | 577 | stw r0,THREAD_RECOVER(r16) ; R16 still holds thread ptr |
1c79356b A |
578 | |
579 | .L_syscall_got_args: | |
9bccf70c A |
580 | lwz r0,MACH_TRAP_FUNCTION(r31) ; Get function address |
581 | lwz r8,ACT_TASK(r13) ; Get our task | |
582 | lis r10,hi16(EXT(c_syscalls_mach)) ; Get top half of counter address | |
1c79356b | 583 | lwz r7,TASK_SYSCALLS_MACH(r8) ; Get the current count |
9bccf70c A |
584 | lwz r3,saver3(r30) ; Restore r3 |
585 | addi r7,r7,1 ; Bump it | |
586 | ori r10,r10,lo16(EXT(c_syscalls_mach)) ; Get low half of counter address | |
1c79356b | 587 | stw r7,TASK_SYSCALLS_MACH(r8) ; Save it |
9bccf70c A |
588 | lwz r4,saver4(r30) ; Restore r4 |
589 | lwz r9,0(r10) ; Get counter | |
590 | mtctr r0 ; Set function address | |
591 | lwz r5,saver5(r30) ; Restore r5 | |
592 | lwz r6,saver6(r30) ; Restore r6 | |
593 | addi r9,r9,1 ; Add 1 | |
594 | lwz r7,saver7(r30) ; Restore r7 | |
595 | lwz r8,saver8(r30) ; Restore r8 | |
596 | stw r9,0(r10) ; Save it back | |
597 | lwz r9,saver9(r30) ; Restore r9 | |
598 | lwz r10,saver10(r30) ; Restore r10 | |
599 | ||
600 | ||
601 | ; | |
602 | ; Note that all arguments from the system call are passed into the function | |
603 | ; | |
604 | ||
605 | bctrl ; Perform the actual syscall | |
1c79356b A |
606 | |
607 | /* 'standard' syscall returns here - INTERRUPTS ARE STILL ON */ | |
608 | ||
609 | /* r3 contains value that we're going to return to the user | |
610 | */ | |
611 | ||
612 | /* | |
9bccf70c | 613 | * Ok, return from C function, R3 = return value |
1c79356b A |
614 | * |
615 | * get the active thread's PCB pointer and thus pointer to user state | |
616 | * saved state is still in R30 and the active thread is in R16 . | |
617 | */ | |
618 | ||
619 | /* Store return value into saved state structure, since | |
620 | * we need to pick up the value from here later - the | |
621 | * syscall may perform a thread_set_syscall_return | |
622 | * followed by a thread_exception_return, ending up | |
623 | * at thread_syscall_return below, with SS_R3 having | |
624 | * been set up already | |
625 | */ | |
626 | ||
627 | /* When we are here, r16 should point to the current thread, | |
628 | * r30 should point to the current pcb | |
629 | */ | |
630 | ||
631 | /* save off return value, we must load it | |
632 | * back anyway for thread_exception_return | |
1c79356b | 633 | */ |
9bccf70c | 634 | |
1c79356b | 635 | .L_syscall_return: |
9bccf70c A |
636 | mr r31,r16 ; Move the current thread pointer |
637 | stw r3,saver3(r30) ; Stash the return code | |
1c79356b | 638 | |
9bccf70c A |
639 | mr r4,r30 ; Pass in the savearea |
640 | bl EXT(syscall_trace_end) ; Trace the exit of the system call | |
1c79356b | 641 | |
1c79356b | 642 | .L_thread_syscall_ret_check_ast: |
9bccf70c A |
643 | mfmsr r12 ; Get the current MSR |
644 | rlwinm r12,r12,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off | |
645 | rlwinm r12,r12,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off | |
646 | rlwinm r12,r12,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit | |
647 | mtmsr r12 ; Turn interruptions off | |
1c79356b | 648 | |
9bccf70c | 649 | mfsprg r10,0 ; Get the per_processor block |
1c79356b A |
650 | |
651 | /* Check to see if there's an outstanding AST */ | |
652 | ||
9bccf70c A |
653 | lwz r4,PP_NEED_AST(r10) ; Get the pointer to the ast requests |
654 | lwz r4,0(r4) ; Get the flags | |
655 | cmpi cr0,r4, 0 ; Any pending asts? | |
656 | beq+ cr0,.L_syscall_no_ast ; Nope... | |
1c79356b A |
657 | |
658 | /* Yes there is, call ast_taken | |
659 | * pretending that the user thread took an AST exception here, | |
660 | * ast_taken will save all state and bring us back here | |
661 | */ | |
662 | ||
663 | #if DEBUG | |
664 | /* debug assert - make sure that we're not returning to kernel */ | |
665 | lwz r3,savesrr1(r30) | |
666 | andi. r3,r3,MASK(MSR_PR) | |
9bccf70c | 667 | bne+ scrnotkern ; returning to user level, check |
1c79356b | 668 | |
9bccf70c A |
669 | lis r0,hi16(Choke) ; Choke code |
670 | ori r0,r0,lo16(Choke) ; and the rest | |
671 | li r3,failContext ; Bad state code | |
672 | sc ; System ABEND | |
0b4e3aa0 | 673 | |
9bccf70c | 674 | scrnotkern: |
1c79356b A |
675 | #endif /* DEBUG */ |
676 | ||
9bccf70c A |
677 | li r3,AST_ALL ; Set ast flags |
678 | li r4,1 ; Set interrupt allowed | |
679 | bl EXT(ast_taken) ; Process the pending ast | |
680 | b .L_thread_syscall_ret_check_ast ; Go see if there was another... | |
1c79356b A |
681 | |
682 | /* thread_exception_return returns to here, almost all | |
683 | * registers intact. It expects a full context restore | |
684 | * of what it hasn't restored itself (ie. what we use). | |
685 | * | |
686 | * In particular for us, | |
687 | * we still have r31 points to the current thread, | |
688 | * r30 points to the current pcb | |
689 | */ | |
690 | ||
9bccf70c A |
691 | .align 5 |
692 | ||
1c79356b A |
693 | .L_syscall_no_ast: |
694 | .L_thread_syscall_return: | |
695 | ||
9bccf70c A |
696 | mr r3,r30 ; Get savearea to the correct register for common exit |
697 | mfsprg r8,1 ; Now find the current activation | |
698 | ||
699 | lwz r11,SAVflags(r30) ; Get the flags | |
700 | lwz r5,THREAD_KERNEL_STACK(r31) ; Get the base pointer to the stack | |
701 | rlwinm r11,r11,0,15,13 ; Clear the syscall flag | |
702 | lwz r4,SAVprev(r30) ; Get the previous save area | |
703 | stw r11,SAVflags(r30) ; Stick back the flags | |
704 | addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty | |
705 | stw r4,ACT_MACT_PCB(r8) ; Save previous save area | |
706 | stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer | |
707 | b chkfac ; Go end it all... | |
1c79356b | 708 | |
9bccf70c | 709 | .align 5 |
1c79356b A |
710 | |
711 | .L_syscall_copyin_recover: | |
712 | ||
9bccf70c A |
713 | /* This is the catcher for any data faults in the copyin |
714 | * of arguments from the user's stack. | |
715 | * r30 still holds a pointer to the PCB | |
716 | * | |
717 | * call syscall_error(EXC_BAD_ACCESS, EXC_PPC_VM_PROT_READ, sp, ssp), | |
718 | * | |
719 | * we already had a frame so we can do this | |
720 | */ | |
1c79356b | 721 | |
9bccf70c A |
722 | li r3,EXC_BAD_ACCESS ; Set bad access code |
723 | li r4,EXC_PPC_VM_PROT_READ ; Set protection exception | |
724 | lwz r5,saver1(r30) ; Point to the stack | |
725 | mr r6,r30 ; Pass savearea | |
1c79356b | 726 | |
9bccf70c A |
727 | bl EXT(syscall_error) ; Generate error... |
728 | b .L_syscall_return ; Continue out... | |
1c79356b A |
729 | |
730 | ||
1c79356b A |
731 | /* |
732 | * thread_exception_return() | |
733 | * | |
734 | * Return to user mode directly from within a system call. | |
735 | */ | |
736 | ||
0b4e3aa0 A |
737 | .align 5 |
738 | .globl EXT(thread_bootstrap_return) | |
739 | LEXT(thread_bootstrap_return) ; NOTE: THIS IS GOING AWAY IN A FEW DAYS.... | |
740 | ||
741 | .globl EXT(thread_exception_return) | |
742 | LEXT(thread_exception_return) ; Directly return to user mode | |
1c79356b A |
743 | |
744 | .L_thread_exc_ret_check_ast: | |
9bccf70c A |
745 | mfmsr r3 ; Get the MSR |
746 | rlwinm r3,r3,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off | |
747 | rlwinm r3,r3,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off | |
748 | rlwinm r3,r3,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Clear EE | |
749 | mtmsr r3 ; Disable interrupts | |
1c79356b A |
750 | |
751 | /* Check to see if there's an outstanding AST */ | |
752 | /* We don't bother establishing a call frame even though CHECK_AST | |
753 | can invoke ast_taken(), because it can just borrow our caller's | |
754 | frame, given that we're not going to return. | |
755 | */ | |
756 | ||
9bccf70c | 757 | mfsprg r10,0 ; Get the per_processor block |
1c79356b A |
758 | lwz r4,PP_NEED_AST(r10) |
759 | lwz r4,0(r4) | |
760 | cmpi cr0,r4, 0 | |
761 | beq cr0,.L_exc_ret_no_ast | |
762 | ||
9bccf70c A |
763 | /* Yes there is, call ast_taken |
764 | * pretending that the user thread took an AST exception here, | |
765 | * ast_taken will save all state and bring us back here | |
766 | */ | |
1c79356b | 767 | |
0b4e3aa0 A |
768 | li r3,AST_ALL |
769 | li r4,1 | |
1c79356b A |
770 | |
771 | bl EXT(ast_taken) | |
9bccf70c | 772 | b .L_thread_exc_ret_check_ast ; check for a second AST (rare) |
1c79356b A |
773 | |
774 | /* arriving here, interrupts should be disabled */ | |
775 | /* Get the active thread's PCB pointer to restore regs | |
776 | */ | |
777 | .L_exc_ret_no_ast: | |
778 | ||
9bccf70c A |
779 | mfsprg r30,1 ; Get the currrent activation |
780 | lwz r31,ACT_THREAD(r30) ; Get the current thread | |
781 | ||
1c79356b | 782 | lwz r30,ACT_MACT_PCB(r30) |
9bccf70c A |
783 | mr. r30,r30 ; Is there any context yet? |
784 | beq- makeDummyCtx ; No, hack one up... | |
1c79356b A |
785 | #if DEBUG |
786 | /* | |
787 | * debug assert - make sure that we're not returning to kernel | |
788 | * get the active thread's PCB pointer and thus pointer to user state | |
789 | */ | |
790 | ||
791 | lwz r3,savesrr1(r30) | |
792 | andi. r3,r3,MASK(MSR_PR) | |
9bccf70c | 793 | bne+ ret_user2 ; We are ok... |
1c79356b | 794 | |
9bccf70c A |
795 | lis r0,hi16(Choke) ; Choke code |
796 | ori r0,r0,lo16(Choke) ; and the rest | |
797 | li r3,failContext ; Bad state code | |
798 | sc ; System ABEND | |
0b4e3aa0 | 799 | |
1c79356b A |
800 | ret_user2: |
801 | #endif /* DEBUG */ | |
802 | ||
9bccf70c | 803 | /* If the system call flag isn't set, then we came from a trap, |
1c79356b A |
804 | * so warp into the return_from_trap (thread_return) routine, |
805 | * which takes PCB pointer in R3, not in r30! | |
806 | */ | |
9bccf70c A |
807 | lwz r0,SAVflags(r30) ; Grab the savearea flags |
808 | mr r3,r30 ; Copy pcb pointer into r3 in case we need it | |
809 | andis. r0,r0,SAVsyscall>>16 ; Are we returning from a syscall? | |
810 | beq- cr0,thread_return ; Nope, must be a thread return... | |
811 | b .L_thread_syscall_return ; Join up with the system call return... | |
1c79356b A |
812 | |
813 | ; | |
814 | ; This is where we handle someone trying who did a thread_create followed | |
815 | ; by a thread_resume with no intervening thread_set_state. Just make an | |
816 | ; empty context, initialize it to trash and let em execute at 0... | |
9bccf70c A |
817 | ; |
818 | ||
819 | .align 5 | |
1c79356b A |
820 | |
821 | makeDummyCtx: | |
9bccf70c A |
822 | bl EXT(save_get) ; Get a save_area |
823 | li r4,SAVgeneral ; Get the general context type | |
824 | li r0,0 ; Get a 0 | |
825 | stb r4,SAVflags+2(r3) ; Set type | |
826 | addi r2,r3,savevscr ; Point past what we are clearing | |
827 | mr r4,r3 ; Save the start | |
1c79356b | 828 | |
9bccf70c A |
829 | cleardummy: stw r0,0(r4) ; Clear stuff |
830 | addi r4,r4,4 ; Next word | |
831 | cmplw r4,r2 ; Still some more? | |
832 | blt+ cleardummy ; Yeah... | |
1c79356b A |
833 | |
834 | lis r2,hi16(MSR_EXPORT_MASK_SET) ; Set the high part of the user MSR | |
835 | ori r2,r2,lo16(MSR_EXPORT_MASK_SET) ; And the low part | |
9bccf70c | 836 | stw r2,savesrr1(r3) ; Set the default user MSR |
1c79356b | 837 | |
9bccf70c | 838 | b thread_return ; Go let em try to execute, hah! |
1c79356b A |
839 | |
840 | /* | |
841 | * ihandler(type) | |
842 | * | |
843 | * ENTRY: VM switched ON | |
844 | * Interrupts OFF | |
845 | * R3 contains exception code | |
846 | * R4 points to the saved context (virtual address) | |
847 | * Everything is saved in savearea | |
848 | * | |
849 | */ | |
850 | ||
0b4e3aa0 A |
851 | .align 5 |
852 | .globl EXT(ihandler) | |
9bccf70c | 853 | LEXT(ihandler) ; Interrupt handler */ |
1c79356b A |
854 | |
855 | /* | |
856 | * get the value of istackptr, if it's zero then we're already on the | |
9bccf70c | 857 | * interrupt stack. |
1c79356b A |
858 | */ |
859 | ||
9bccf70c A |
860 | lwz r10,savesrr1(r4) ; Get SRR1 |
861 | lwz r7,savevrsave(r4) ; Get the VRSAVE register | |
862 | mfsprg r25,0 ; Get the per_proc block | |
863 | li r14,0 ; Zero this for now | |
1c79356b | 864 | rlwinm. r13,r10,0,MSR_VEC_BIT,MSR_VEC_BIT ; Was vector on? |
9bccf70c A |
865 | lwz r1,PP_ISTACKPTR(r25) ; Get the interrupt stack |
866 | li r13,0 ; Zero this for now | |
867 | lwz r16,PP_ACTIVE_THREAD(r25) ; Get the thread pointer | |
868 | ||
869 | beq+ ivecoff ; Vector off, do not save vrsave... | |
870 | stw r7,liveVRS(r25) ; Set the live value | |
871 | ||
872 | ivecoff: li r0,0 ; Get a constant 0 | |
873 | cmplwi cr1,r16,0 ; Are we still booting? | |
874 | ||
875 | ifpoff: mr. r1,r1 ; Is it active? | |
876 | beq- cr1,ihboot1 ; We are still coming up... | |
877 | lwz r13,THREAD_TOP_ACT(r16) ; Pick up the active thread | |
878 | lwz r14,ACT_MACT_PCB(r13) ; Now point to the PCB | |
879 | ||
880 | ihboot1: lwz r9,saver1(r4) ; Pick up the rupt time stack | |
881 | stw r14,SAVprev(r4) ; Queue the new save area in the front | |
882 | stw r13,SAVact(r4) ; Point the savearea at its activation | |
883 | beq- cr1,ihboot4 ; We are still coming up... | |
884 | stw r4,ACT_MACT_PCB(r13) ; Point to our savearea | |
885 | ||
886 | ihboot4: bne .L_istackfree ; Nope... | |
1c79356b A |
887 | |
888 | /* We're already on the interrupt stack, get back the old | |
889 | * stack pointer and make room for a frame | |
890 | */ | |
891 | ||
9bccf70c A |
892 | lwz r10,PP_INTSTACK_TOP_SS(r25) ; Get the top of the interrupt stack |
893 | addi r5,r9,INTSTACK_SIZE-FM_SIZE ; Shift stack for bounds check | |
894 | subi r1,r9,FM_REDZONE ; Back up beyond the red zone | |
895 | sub r5,r5,r10 ; Get displacement into stack | |
896 | cmplwi r5,INTSTACK_SIZE-FM_SIZE ; Is the stack actually invalid? | |
897 | blt+ ihsetback ; The stack is ok... | |
0b4e3aa0 | 898 | |
9bccf70c | 899 | lwz r5,PP_DEBSTACK_TOP_SS(r25) ; Pick up debug stack top |
0b4e3aa0 | 900 | subi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Adjust to start of stack |
9bccf70c | 901 | sub r5,r1,r5 ; Get displacement into debug stack |
0b4e3aa0 | 902 | cmplwi cr2,r5,KERNEL_STACK_SIZE-FM_SIZE ; Check if we are on debug stack |
9bccf70c | 903 | blt+ ihsetback ; Yeah, that is ok too... |
0b4e3aa0 | 904 | |
9bccf70c A |
905 | lis r0,hi16(Choke) ; Choke code |
906 | ori r0,r0,lo16(Choke) ; and the rest | |
907 | li r3,failStack ; Bad stack code | |
908 | sc ; System ABEND | |
0b4e3aa0 A |
909 | |
910 | .align 5 | |
911 | ||
1c79356b A |
912 | .L_istackfree: |
913 | lwz r10,SAVflags(r4) | |
9bccf70c A |
914 | stw r0,PP_ISTACKPTR(r25) ; Mark the stack in use |
915 | oris r10,r10,HIGH_ADDR(SAVrststk) ; Indicate we reset stack when we return from this one | |
916 | stw r10,SAVflags(r4) ; Stick it back | |
1c79356b | 917 | |
9bccf70c A |
918 | /* |
919 | * To summarize, when we reach here, the state has been saved and | |
920 | * the stack is marked as busy. We now generate a small | |
921 | * stack frame with backpointers to follow the calling | |
922 | * conventions. We set up the backpointers to the trapped | |
923 | * routine allowing us to backtrace. | |
924 | */ | |
1c79356b | 925 | |
9bccf70c A |
926 | ihsetback: subi r1,r1,FM_SIZE ; Make a new frame |
927 | stw r9,FM_BACKPTR(r1) ; Point back to previous stackptr | |
1c79356b A |
928 | |
929 | #if VERIFYSAVE | |
9bccf70c A |
930 | beq- cr1,ihbootnover ; (TEST/DEBUG) |
931 | bl versave ; (TEST/DEBUG) | |
932 | ihbootnover: ; (TEST/DEBUG) | |
1c79356b A |
933 | #endif |
934 | ||
935 | #if DEBUG | |
936 | /* If debugging, we need two frames, the first being a dummy | |
937 | * which links back to the trapped routine. The second is | |
938 | * that which the C routine below will need | |
939 | */ | |
9bccf70c A |
940 | lwz r5,savesrr0(r4) ; Get interrupt address |
941 | stw r5,FM_LR_SAVE(r1) ; save old instr ptr as LR value | |
942 | stwu r1,-FM_SIZE(r1) ; Make another new frame for C routine | |
1c79356b A |
943 | #endif /* DEBUG */ |
944 | ||
9bccf70c A |
945 | lwz r5,savedsisr(r4) ; Get the DSISR |
946 | lwz r6,savedar(r4) ; Get the DAR | |
1c79356b A |
947 | |
948 | bl EXT(interrupt) | |
949 | ||
950 | ||
951 | /* interrupt() returns a pointer to the saved state in r3 | |
952 | * | |
953 | * Ok, back from C. Disable interrupts while we restore things | |
954 | */ | |
955 | .globl EXT(ihandler_ret) | |
956 | ||
9bccf70c | 957 | LEXT(ihandler_ret) ; Marks our return point from debugger entry |
1c79356b | 958 | |
9bccf70c A |
959 | mfmsr r0 ; Get our MSR |
960 | rlwinm r0,r0,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off | |
961 | rlwinm r0,r0,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off | |
962 | rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Flip off the interrupt enabled bit | |
963 | mtmsr r0 ; Make sure interrupts are disabled | |
964 | mfsprg r10,0 ; Get the per_proc block | |
1c79356b | 965 | |
9bccf70c A |
966 | lwz r7,SAVflags(r3) ; Pick up the flags |
967 | lwz r8,PP_ACTIVE_THREAD(r10) ; and the active thread | |
968 | lwz r9,SAVprev(r3) ; Get previous save area | |
969 | cmplwi cr1,r8,0 ; Are we still initializing? | |
970 | lwz r12,savesrr1(r3) ; Get the MSR we will load on return | |
971 | beq- cr1,ihboot2 ; Skip if we are still in init... | |
972 | lwz r8,THREAD_TOP_ACT(r8) ; Pick up the active thread | |
1c79356b | 973 | |
9bccf70c A |
974 | ihboot2: andis. r11,r7,hi16(SAVrststk) ; Is this the first on the stack? |
975 | beq- cr1,ihboot3 ; Skip if we are still in init... | |
976 | stw r9,ACT_MACT_PCB(r8) ; Point to previous context savearea | |
1c79356b | 977 | |
9bccf70c A |
978 | ihboot3: mr r4,r3 ; Move the savearea pointer |
979 | beq .L_no_int_ast2 ; Get going if not the top-o-stack... | |
1c79356b A |
980 | |
981 | ||
982 | /* We're the last frame on the stack. Restore istackptr to empty state. | |
983 | * | |
984 | * Check for ASTs if one of the below is true: | |
985 | * returning to user mode | |
986 | * returning to a kloaded server | |
987 | */ | |
9bccf70c A |
988 | lwz r9,PP_INTSTACK_TOP_SS(r10) ; Get the empty stack value |
989 | andc r7,r7,r11 ; Remove the stack reset bit in case we pass this one | |
990 | stw r9,PP_ISTACKPTR(r10) ; Save that saved state ptr | |
991 | lwz r3,PP_PREEMPT_CNT(r10) ; Get preemption level | |
992 | stw r7,SAVflags(r4) ; Save the flags | |
993 | cmplwi r3, 0 ; Check for preemption | |
994 | bne .L_no_int_ast ; Do not preempt if level is not zero | |
995 | andi. r6,r12,MASK(MSR_PR) ; privilege mode | |
996 | lwz r11,PP_NEED_AST(r10) ; Get the AST request address | |
997 | lwz r11,0(r11) ; Get the request | |
998 | beq- .L_kernel_int_ast ; In kernel space, AST_URGENT check | |
999 | li r3,T_AST ; Assume the worst | |
1000 | mr. r11,r11 ; Are there any pending? | |
1001 | beq .L_no_int_ast ; Nope... | |
1c79356b A |
1002 | b .L_call_thandler |
1003 | ||
1004 | .L_kernel_int_ast: | |
9bccf70c A |
1005 | andi. r11,r11,AST_URGENT ; Do we have AST_URGENT? |
1006 | li r3,T_PREEMPT ; Assume the worst | |
1007 | beq .L_no_int_ast ; Nope... | |
1c79356b A |
1008 | |
1009 | /* | |
1010 | * There is a pending AST. Massage things to make it look like | |
1011 | * we took a trap and jump into the trap handler. To do this | |
1012 | * we essentially pretend to return from the interrupt but | |
1013 | * at the last minute jump into the trap handler with an AST | |
1014 | * trap instead of performing an rfi. | |
1015 | */ | |
1016 | ||
9bccf70c A |
1017 | .L_call_thandler: |
1018 | stw r3,saveexception(r4) ; Set the exception code to T_AST/T_PREEMPT | |
1019 | b EXT(thandler) ; We need to preempt so treat like a trap... | |
1c79356b A |
1020 | |
1021 | .L_no_int_ast: | |
9bccf70c A |
1022 | mr r3,r4 ; Get into the right register for common code |
1023 | ||
1c79356b | 1024 | .L_no_int_ast2: |
9bccf70c A |
1025 | rlwinm r7,r7,0,15,13 ; Clear the syscall flag |
1026 | li r4,0 ; Assume for a moment that we are in init | |
1027 | stw r7,SAVflags(r3) ; Set the flags with cleared syscall flag | |
1028 | beq- cr1,chkfac ; Jump away if we are in init... | |
1029 | ||
1030 | lwz r4,ACT_MACT_PCB(r8) ; Get the new level marker | |
1c79356b A |
1031 | |
1032 | ||
1033 | ; | |
1034 | ; This section is common to all exception exits. It throws away vector | |
1035 | ; and floating point saveareas as the exception level of a thread is | |
1036 | ; exited. | |
1037 | ; | |
1038 | ; It also enables the facility if its context is live | |
1039 | ; Requires: | |
1040 | ; R3 = Savearea to be released (virtual) | |
1041 | ; R4 = New top of savearea stack (could be 0) | |
1042 | ; R8 = pointer to activation | |
1043 | ; R10 = per_proc block | |
1044 | ; | |
9bccf70c A |
1045 | ; Note that barring unforseen crashes, there is no escape from this point |
1046 | ; on. We WILL call exception_exit and launch this context. No worries | |
1047 | ; about preemption or interruptions here. | |
1048 | ; | |
1049 | ; Note that we will set up R26 with whatever context we will be launching, | |
1050 | ; so it will indicate the current, or the deferred it it is set and we | |
1051 | ; are going to user state. CR2_eq will be set to indicate deferred. | |
1052 | ; | |
1c79356b | 1053 | |
9bccf70c A |
1054 | chkfac: mr r31,r10 ; Move per_proc address |
1055 | mr r30,r4 ; Preserve new level | |
1056 | lwz r29,savesrr1(r3) ; Get the current MSR | |
1057 | mr. r28,r8 ; Are we still in boot? | |
1058 | mr r27,r3 ; Save the old level | |
1059 | beq- chkenax ; Yeah, skip it all... | |
1c79356b | 1060 | |
9bccf70c A |
1061 | rlwinm. r0,r29,0,MSR_PR_BIT,MSR_PR_BIT ; Are we going into user state? |
1062 | ||
1063 | #if 0 | |
1064 | beq+ lllll ; (TEST/DEBUG) | |
1065 | BREAKPOINT_TRAP ; (TEST/DEBUG) | |
1066 | lllll: | |
1c79356b | 1067 | #endif |
9bccf70c A |
1068 | |
1069 | lwz r20,curctx(r28) ; Get our current context | |
1070 | lwz r26,deferctx(r28) ; Get any deferred context switch | |
1071 | rlwinm r29,r29,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Turn off floating point for now | |
1072 | lwz r21,FPUlevel(r20) ; Get the facility level | |
1073 | cmplwi cr2,r26,0 ; Are we going into a deferred context later? | |
1074 | rlwinm r29,r29,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Turn off vector for now | |
1075 | crnor cr2_eq,cr0_eq,cr2_eq ; Set cr2_eq if going to user state and there is deferred | |
1076 | cmplw r27,r21 ; Are we returning from the active level? | |
1077 | lhz r19,PP_CPU_NUMBER(r31) ; Get our CPU number | |
1078 | bne+ fpuchkena ; Nope... | |
1c79356b | 1079 | |
9bccf70c A |
1080 | ; |
1081 | ; First clean up any live context we are returning from | |
1082 | ; | |
1083 | ||
1084 | lwz r22,FPUcpu(r20) ; Get CPU this context was last dispatched on | |
1085 | ||
1086 | stw r19,FPUcpu(r20) ; Claim context for us | |
1087 | ||
1088 | eieio ; Make sure this gets out before owner clear | |
1089 | ||
0b4e3aa0 | 1090 | lis r23,hi16(EXT(per_proc_info)) ; Set base per_proc |
9bccf70c | 1091 | mulli r22,r22,ppSize ; Find offset to the owner per_proc |
0b4e3aa0 | 1092 | ori r23,r23,lo16(EXT(per_proc_info)) ; Set base per_proc |
9bccf70c A |
1093 | li r24,FPUowner ; Displacement to FPU owner |
1094 | add r22,r23,r22 ; Point to the owner per_proc | |
1095 | li r0,0 ; We need this in a bit | |
0b4e3aa0 | 1096 | |
9bccf70c A |
1097 | fpuinvothr: lwarx r23,r24,r22 ; Get the owner |
1098 | cmplw r23,r20 ; Does he still have this context? | |
1099 | bne fpuinvoths ; Nope... | |
1100 | stwcx. r0,r24,r22 ; Try to invalidate it | |
1101 | bne- fpuinvothr ; Try again if there was a collision... | |
1102 | ||
1103 | fpuinvoths: isync | |
0b4e3aa0 | 1104 | |
9bccf70c A |
1105 | ; |
1106 | ; Now if there is a savearea associated with the popped context, release it. | |
1107 | ; Either way, pop the level to the top stacked context. | |
1108 | ; | |
0b4e3aa0 | 1109 | |
9bccf70c A |
1110 | lwz r22,FPUsave(r20) ; Get pointer to the first savearea |
1111 | li r21,0 ; Assume we popped all the way out | |
1112 | mr. r22,r22 ; Is there anything there? | |
1113 | beq+ fpusetlvl ; No, see if we need to enable... | |
1114 | ||
1115 | lwz r21,SAVlevel(r22) ; Get the level of that savearea | |
1116 | cmplw r21,r27 ; Is this the saved copy of the live stuff? | |
1117 | bne fpusetlvl ; No, leave as is... | |
1118 | ||
1119 | lwz r24,SAVprev(r22) ; Pick up the previous area | |
1120 | li r21,0 ; Assume we popped all the way out | |
1121 | mr. r24,r24 ; Any more context stacked? | |
1122 | beq- fpuonlyone ; Nope... | |
1123 | lwz r21,SAVlevel(r24) ; Get the level associated with save | |
1124 | ||
1125 | fpuonlyone: stw r24,FPUsave(r20) ; Dequeue this savearea | |
1126 | ||
1127 | rlwinm r3,r22,0,0,19 ; Find main savearea header | |
1128 | lwz r3,SACvrswap(r3) ; Get the virtual to real conversion | |
1129 | la r9,quickfret(r31) ; Point to the quickfret chain header | |
1130 | xor r3,r22,r3 ; Convert to physical | |
1131 | ||
1132 | #if FPVECDBG | |
1133 | lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG) | |
1134 | li r2,0x3301 ; (TEST/DEBUG) | |
1135 | oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG) | |
1136 | sc ; (TEST/DEBUG) | |
1137 | #endif | |
1138 | ||
1139 | fpufpucdq: lwarx r0,0,r9 ; Pick up the old chain head | |
1140 | stw r0,SAVprev(r22) ; Move it to the current guy | |
1141 | stwcx. r3,0,r9 ; Save it | |
1142 | bne- fpufpucdq ; Someone chaged the list... | |
1143 | ||
1144 | fpusetlvl: stw r21,FPUlevel(r20) ; Save the level | |
1145 | ||
1c79356b | 1146 | ; |
9bccf70c A |
1147 | ; Here we check if we are at the right level |
1148 | ; We need to check the level we are entering, not the one we are exiting. | |
1149 | ; Therefore, we will use the defer level if it is non-zero and we are | |
1150 | ; going into user state. | |
1c79356b | 1151 | ; |
0b4e3aa0 | 1152 | |
9bccf70c A |
1153 | fpuchkena: bt- cr2_eq,fpuhasdfrd ; Skip if deferred, R26 already set up... |
1154 | mr r26,r20 ; Use the non-deferred value | |
1155 | ||
1156 | fpuhasdfrd: lwz r21,FPUowner(r31) ; Get the ID of the live context | |
1157 | lwz r23,FPUlevel(r26) ; Get the level ID | |
1158 | cmplw cr3,r26,r21 ; Do we have the live context? | |
1159 | lwz r24,FPUcpu(r26) ; Get the CPU that the context was last dispatched on | |
1160 | bne- cr3,chkvec ; No, can not possibly enable... | |
1161 | cmplw r30,r23 ; Are we about to launch the live level? | |
1162 | cmplw cr1,r19,r24 ; Was facility used on this processor last? | |
1163 | bne- chkvec ; No, not live... | |
1164 | bne- cr1,chkvec ; No, wrong cpu, have to enable later.... | |
1165 | ||
1166 | lwz r24,FPUsave(r26) ; Get the first savearea | |
1167 | mr. r24,r24 ; Any savearea? | |
1168 | beq+ fpuena ; Nope... | |
1169 | lwz r25,SAVlevel(r24) ; Get the level of savearea | |
1170 | lwz r0,SAVprev(r24) ; Get the previous | |
1171 | cmplw r30,r25 ; Is savearea for the level we are launching? | |
1172 | bne+ fpuena ; No, just go enable... | |
1173 | ||
1174 | stw r0,FPUsave(r26) ; Pop the chain | |
1175 | ||
1176 | rlwinm r3,r24,0,0,19 ; Find main savearea header | |
1177 | lwz r3,SACvrswap(r3) ; Get the virtual to real conversion | |
1178 | la r9,quickfret(r31) ; Point to the quickfret chain header | |
1179 | xor r3,r24,r3 ; Convert to physical | |
1c79356b A |
1180 | |
1181 | #if FPVECDBG | |
9bccf70c A |
1182 | lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG) |
1183 | li r2,0x3302 ; (TEST/DEBUG) | |
1184 | oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG) | |
1185 | sc ; (TEST/DEBUG) | |
1186 | #endif | |
1c79356b | 1187 | |
9bccf70c A |
1188 | fpuhascdq: lwarx r0,0,r9 ; Pick up the old chain head |
1189 | stw r0,SAVprev(r24) ; Move it to the current guy | |
1190 | stwcx. r3,0,r9 ; Save it | |
1191 | bne- fpuhascdq ; Someone chaged the list... | |
1c79356b | 1192 | |
9bccf70c | 1193 | fpuena: ori r29,r29,lo16(MASK(MSR_FP)) ; Enable facility |
1c79356b | 1194 | |
9bccf70c | 1195 | chkvec: |
1c79356b | 1196 | |
9bccf70c A |
1197 | #if 0 |
1198 | rlwinm. r21,r29,0,MSR_PR_BIT,MSR_PR_BIT ; (TEST/DEBUG) | |
1199 | beq+ ppppp ; (TEST/DEBUG) | |
1200 | lwz r21,FPUlevel(r26) ; (TEST/DEBUG) | |
1201 | mr. r21,r21 ; (TEST/DEBUG) | |
1202 | bne- qqqqq ; (TEST/DEBUG) | |
1203 | lwz r21,FPUsave(r26) ; (TEST/DEBUG) | |
1204 | mr. r21,r21 ; (TEST/DEBUG) | |
1205 | beq+ ppppp ; (TEST/DEBUG) | |
1206 | lwz r22,SAVlevel(r21) ; (TEST/DEBUG) | |
1207 | mr. r22,r22 ; (TEST/DEBUG) | |
1208 | beq+ ppppp ; (TEST/DEBUG) | |
1209 | qqqqq: | |
1210 | BREAKPOINT_TRAP ; (TEST/DEBUG) | |
1211 | ||
1212 | ppppp: ; (TEST/DEBUG) | |
1213 | #endif | |
1214 | ||
1215 | lwz r21,VMXlevel(r20) ; Get the facility level | |
1216 | ||
1217 | cmplw r27,r21 ; Are we returning from the active level? | |
1218 | bne+ vmxchkena ; Nope... | |
1219 | ||
1220 | ||
1221 | ; | |
1222 | ; First clean up any live context we are returning from | |
1223 | ; | |
1c79356b | 1224 | |
9bccf70c A |
1225 | lwz r22,VMXcpu(r20) ; Get CPU this context was last dispatched on |
1226 | ||
1227 | stw r19,VMXcpu(r20) ; Claim context for us | |
1228 | ||
1229 | eieio ; Make sure this gets out before owner clear | |
1230 | ||
0b4e3aa0 | 1231 | lis r23,hi16(EXT(per_proc_info)) ; Set base per_proc |
9bccf70c | 1232 | mulli r22,r22,ppSize ; Find offset to the owner per_proc |
0b4e3aa0 | 1233 | ori r23,r23,lo16(EXT(per_proc_info)) ; Set base per_proc |
9bccf70c A |
1234 | li r24,VMXowner ; Displacement to VMX owner |
1235 | add r22,r23,r22 ; Point to the owner per_proc | |
1236 | li r0,0 ; We need this in a bit | |
1237 | ||
1238 | vmxinvothr: lwarx r23,r24,r22 ; Get the owner | |
1239 | cmplw r23,r20 ; Does he still have this context? | |
1240 | bne vmxinvoths ; Nope... | |
1241 | stwcx. r0,r24,r22 ; Try to invalidate it | |
1242 | bne- vmxinvothr ; Try again if there was a collision... | |
0b4e3aa0 | 1243 | |
9bccf70c | 1244 | vmxinvoths: isync |
0b4e3aa0 | 1245 | |
9bccf70c A |
1246 | ; |
1247 | ; Now if there is a savearea associated with the popped context, release it. | |
1248 | ; Either way, pop the level to the top stacked context. | |
1249 | ; | |
1250 | ||
1251 | lwz r22,VMXsave(r20) ; Get pointer to the first savearea | |
1252 | li r21,0 ; Assume we popped all the way out | |
1253 | mr. r22,r22 ; Is there anything there? | |
1254 | beq+ vmxsetlvl ; No, see if we need to enable... | |
1255 | ||
1256 | lwz r21,SAVlevel(r22) ; Get the level of that savearea | |
1257 | cmplw r21,r27 ; Is this the saved copy of the live stuff? | |
1258 | bne vmxsetlvl ; No, leave as is... | |
1259 | ||
1260 | lwz r24,SAVprev(r22) ; Pick up the previous area | |
1261 | li r21,0 ; Assume we popped all the way out | |
1262 | mr. r24,r24 ; Any more context? | |
1263 | beq- vmxonlyone ; Nope... | |
1264 | lwz r21,SAVlevel(r24) ; Get the level associated with save | |
1265 | ||
1266 | vmxonlyone: stw r24,VMXsave(r20) ; Dequeue this savearea | |
1267 | ||
1268 | rlwinm r3,r22,0,0,19 ; Find main savearea header | |
1269 | lwz r3,SACvrswap(r3) ; Get the virtual to real conversion | |
1270 | la r9,quickfret(r31) ; Point to the quickfret chain header | |
1271 | xor r3,r22,r3 ; Convert to physical | |
1272 | ||
1273 | #if FPVECDBG | |
1274 | lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG) | |
1275 | li r2,0x3401 ; (TEST/DEBUG) | |
1276 | oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG) | |
1277 | sc ; (TEST/DEBUG) | |
1278 | #endif | |
1279 | ||
1280 | vmxhscdq: lwarx r0,0,r9 ; Pick up the old chain head | |
1281 | stw r0,SAVprev(r22) ; Move it to the current guy | |
1282 | stwcx. r3,0,r9 ; Save it | |
1283 | bne- vmxhscdq ; Someone chaged the list... | |
1284 | ||
1285 | vmxsetlvl: stw r21,VMXlevel(r20) ; Save the level | |
0b4e3aa0 | 1286 | |
9bccf70c A |
1287 | ; |
1288 | ; Here we check if we are at the right level | |
1289 | ; | |
1290 | ||
1291 | vmxchkena: lwz r21,VMXowner(r31) ; Get the ID of the live context | |
1292 | lwz r23,VMXlevel(r26) ; Get the level ID | |
1293 | cmplw r26,r21 ; Do we have the live context? | |
1294 | lwz r24,VMXcpu(r26) ; Get the CPU that the context was last dispatched on | |
1295 | bne- setena ; No, can not possibly enable... | |
1296 | cmplw r30,r23 ; Are we about to launch the live level? | |
1297 | cmplw cr1,r19,r24 ; Was facility used on this processor last? | |
1298 | bne- setena ; No, not live... | |
1299 | bne- cr1,setena ; No, wrong cpu, have to enable later.... | |
1300 | ||
1301 | lwz r24,VMXsave(r26) ; Get the first savearea | |
1302 | mr. r24,r24 ; Any savearea? | |
1303 | beq+ vmxena ; Nope... | |
1304 | lwz r25,SAVlevel(r24) ; Get the level of savearea | |
1305 | lwz r0,SAVprev(r24) ; Get the previous | |
1306 | cmplw r30,r25 ; Is savearea for the level we are launching? | |
1307 | bne+ vmxena ; No, just go enable... | |
1308 | ||
1309 | stw r0,VMXsave(r26) ; Pop the chain | |
1310 | ||
1311 | rlwinm r3,r24,0,0,19 ; Find main savearea header | |
1312 | lwz r3,SACvrswap(r3) ; Get the virtual to real conversion | |
1313 | la r9,quickfret(r31) ; Point to the quickfret chain header | |
1314 | xor r3,r24,r3 ; Convert to physical | |
1315 | ||
1316 | #if FPVECDBG | |
1317 | lis r0,HIGH_ADDR(CutTrace) ; (TEST/DEBUG) | |
1318 | li r2,0x3402 ; (TEST/DEBUG) | |
1319 | oris r0,r0,LOW_ADDR(CutTrace) ; (TEST/DEBUG) | |
1320 | sc ; (TEST/DEBUG) | |
1321 | #endif | |
1322 | ||
1323 | vmxckcdq: lwarx r0,0,r9 ; Pick up the old chain head | |
1324 | stw r0,SAVprev(r24) ; Move it to the current guy | |
1325 | stwcx. r3,0,r9 ; Save it | |
1326 | bne- vmxckcdq ; Someone chaged the list... | |
1327 | ||
1328 | vmxena: oris r29,r29,hi16(MASK(MSR_VEC)) ; Enable facility | |
0b4e3aa0 | 1329 | |
0b4e3aa0 | 1330 | |
9bccf70c A |
1331 | setena: rlwinm. r0,r29,0,MSR_PR_BIT,MSR_PR_BIT ; Are we about to launch user state? |
1332 | rlwinm r20,r29,(((31-vectorCngbit)+(MSR_VEC_BIT+1))&31),vectorCngbit,vectorCngbit ; Set flag if we enabled vector | |
1333 | stw r29,savesrr1(r27) ; Turn facility on or off | |
1334 | crmove cr7_eq,cr0_eq ; Remember if we are going to user state | |
1335 | lwz r19,deferctx(r28) ; Get any deferred facility context switch | |
1336 | rlwimi. r20,r29,(((31-floatCngbit)+(MSR_FP_BIT+1))&31),floatCngbit,floatCngbit ; Set flag if we enabled floats | |
1337 | beq setenaa ; Neither float nor vector turned on.... | |
1338 | ||
1339 | lwz r5,ACT_MACT_SPF(r28) ; Get activation copy | |
1340 | lwz r6,spcFlags(r31) ; Get per_proc copy | |
1341 | or r5,r5,r20 ; Set vector/float changed bits in activation | |
1342 | or r6,r6,r20 ; Set vector/float changed bits in per_proc | |
1343 | stw r5,ACT_MACT_SPF(r28) ; Set activation copy | |
1344 | stw r6,spcFlags(r31) ; Set per_proc copy | |
1345 | ||
1346 | setenaa: mfdec r24 ; Get decrementer | |
1347 | bf+ cr2_eq,nodefer ; No deferred to switch to... | |
1348 | ||
1349 | li r20,0 ; Clear this | |
1350 | stw r26,curctx(r28) ; Make the facility context current | |
1351 | stw r20,deferctx(r28) ; Clear deferred context | |
1352 | ||
1353 | nodefer: lwz r22,qactTimer(r28) ; Get high order quick activation timer | |
1354 | mr. r24,r24 ; See if it has popped already... | |
1355 | lwz r23,qactTimer+4(r28) ; Get low order qact timer | |
1356 | ble- chkenax ; We have popped or are just about to... | |
1357 | ||
1358 | segtb: mftbu r20 ; Get the upper time base | |
1359 | mftb r21 ; Get the low | |
1360 | mftbu r19 ; Get upper again | |
1361 | or. r0,r22,r23 ; Any time set? | |
1362 | cmplw cr1,r20,r19 ; Did they change? | |
1363 | beq+ chkenax ; No time set.... | |
1364 | bne- cr1,segtb ; Timebase ticked, get them again... | |
1365 | ||
1366 | subfc r6,r21,r23 ; Subtract current from qact time | |
1367 | li r0,0 ; Make a 0 | |
1368 | subfe r5,r20,r22 ; Finish subtract | |
1369 | subfze r0,r0 ; Get a 0 if qact was bigger than current, -1 otherwise | |
1370 | andc. r12,r5,r0 ; Set 0 if qact has passed | |
1371 | andc r13,r6,r0 ; Set 0 if qact has passed | |
1372 | bne chkenax ; If high order is non-zero, this is too big for a decrementer | |
1373 | cmplw r13,r24 ; Is this earlier than the decrementer? (logical compare takes care of high bit on) | |
1374 | bge+ chkenax ; No, do not reset decrementer... | |
1c79356b | 1375 | |
9bccf70c | 1376 | mtdec r13 ; Set our value |
1c79356b | 1377 | |
9bccf70c | 1378 | chkenax: |
1c79356b A |
1379 | |
1380 | ||
1381 | #if DEBUG | |
9bccf70c A |
1382 | lwz r20,SAVact(r27) ; (TEST/DEBUG) Make sure our restore |
1383 | lwz r21,PP_ACTIVE_THREAD(r31) ; (TEST/DEBUG) with the current act. | |
1384 | cmpwi r21,0 ; (TEST/DEBUG) | |
1385 | beq- yeswereok ; (TEST/DEBUG) | |
1386 | lwz r21,THREAD_TOP_ACT(r21) ; (TEST/DEBUG) | |
1387 | cmplw r21,r20 ; (TEST/DEBUG) | |
1388 | beq+ yeswereok ; (TEST/DEBUG) | |
1389 | ||
1390 | lis r0,hi16(Choke) ; (TEST/DEBUG) Choke code | |
1391 | ori r0,r0,lo16(Choke) ; (TEST/DEBUG) and the rest | |
1392 | mr r21,r27 ; (TEST/DEBUG) Save the savearea address | |
1393 | li r3,failContext ; (TEST/DEBUG) Bad state code | |
1394 | sc ; (TEST/DEBUG) System ABEND | |
1c79356b A |
1395 | |
1396 | yeswereok: | |
1397 | #endif | |
1398 | ||
9bccf70c A |
1399 | rlwinm r5,r27,0,0,19 ; Round savearea down to page bndry |
1400 | lwz r5,SACvrswap(r5) ; Get the conversion from virtual to real | |
1401 | xor r3,r27,r5 ; Flip to physical address | |
1402 | b EXT(exception_exit) ; We are all done now... | |
1c79356b A |
1403 | |
1404 | ||
1405 | ||
1406 | /* | |
1407 | * Here's where we handle the fastpath stuff | |
1408 | * We'll do what we can here because registers are already | |
1409 | * loaded and it will be less confusing that moving them around. | |
1410 | * If we need to though, we'll branch off somewhere's else. | |
1411 | * | |
1412 | * Registers when we get here: | |
1413 | * | |
1414 | * r0 = syscall number | |
1415 | * r4 = savearea/pcb | |
1416 | * r13 = activation | |
1417 | * r14 = previous savearea (if any) | |
1418 | * r16 = thread | |
1419 | * r25 = per_proc | |
1420 | */ | |
1421 | ||
0b4e3aa0 A |
1422 | .align 5 |
1423 | ||
1c79356b A |
1424 | fastpath: cmplwi cr3,r0,0x7FF1 ; Is it CthreadSetSelfNumber? |
1425 | bnelr- cr3 ; Not a fast path... | |
1426 | ||
1427 | /* | |
1428 | * void cthread_set_self(cproc_t p) | |
1429 | * | |
1430 | * set's thread state "user_value" | |
1431 | * | |
1432 | * This op is invoked as follows: | |
1433 | * li r0, CthreadSetSelfNumber // load the fast-trap number | |
1434 | * sc // invoke fast-trap | |
1435 | * blr | |
1436 | * | |
1437 | */ | |
1438 | ||
1439 | CthreadSetSelfNumber: | |
1440 | ||
1441 | lwz r5,saver3(r4) /* Retrieve the self number */ | |
1442 | stw r5,CTHREAD_SELF(r13) /* Remember it */ | |
1443 | stw r5,UAW(r25) /* Prime the per_proc_info with it */ | |
1444 | ||
1445 | ||
1446 | .globl EXT(fastexit) | |
1447 | EXT(fastexit): | |
1c79356b | 1448 | rlwinm r9,r4,0,0,19 /* Round down to the base savearea block */ |
1c79356b | 1449 | lwz r9,SACvrswap(r9) /* Get the conversion from virtual to real */ |
1c79356b A |
1450 | xor r3,r4,r9 /* Switch savearea to physical addressing */ |
1451 | b EXT(exception_exit) /* Go back to the caller... */ | |
1452 | ||
1453 | ||
1454 | /* | |
1455 | * Here's where we check for a hit on the Blue Box Assist | |
1456 | * Most registers are non-volatile, so be careful here. If we don't | |
1457 | * recognize the trap instruction we go back for regular processing. | |
1458 | * Otherwise we transfer to the assist code. | |
1459 | */ | |
1460 | ||
0b4e3aa0 A |
1461 | .align 5 |
1462 | ||
1c79356b | 1463 | checkassist: |
0b4e3aa0 A |
1464 | lwz r0,saveexception(r4) ; Get the exception code |
1465 | lwz r23,savesrr1(r4) ; Get the interrupted MSR | |
1466 | lwz r26,ACT_MACT_BEDA(r13) ; Get Blue Box Descriptor Area | |
1467 | mtcrf 0x18,r23 ; Check what SRR1 says | |
1468 | lwz r24,ACT_MACT_BTS(r13) ; Get the table start | |
1469 | cmplwi r0,T_AST ; Check for T_AST trap | |
1470 | lwz r27,savesrr0(r4) ; Get trapped address | |
1471 | crnand cr1_eq,SRR1_PRG_TRAP_BIT,MSR_PR_BIT ; We need both trap and user state | |
1472 | sub r24,r27,r24 ; See how far into it we are | |
1473 | cror cr0_eq,cr0_eq,cr1_eq ; Need to bail if AST or not trap or not user state | |
1474 | cmplwi cr1,r24,BB_MAX_TRAP ; Do we fit in the list? | |
1475 | cror cr0_eq,cr0_eq,cr1_gt ; Also leave it trap not in range | |
1476 | btlr- cr0_eq ; No assist if AST or not trap or not user state or trap not in range | |
1477 | b EXT(atomic_switch_trap) ; Go to the assist... | |
1c79356b A |
1478 | |
1479 | ; | |
1480 | ; Virtual Machine Monitor | |
1481 | ; Here is where we exit from the emulated context | |
1482 | ; Note that most registers get trashed here | |
1483 | ; R3 and R30 are preserved across the call and hold the activation | |
1484 | ; and savearea respectivily. | |
1485 | ; | |
1486 | ||
0b4e3aa0 A |
1487 | .align 5 |
1488 | ||
1c79356b A |
1489 | exitFromVM: mr r30,r4 ; Get the savearea |
1490 | mr r3,r13 ; Get the activation | |
1491 | ||
1492 | b EXT(vmm_exit) ; Do it to it | |
1493 | ||
1494 | .align 5 | |
1495 | .globl EXT(retFromVM) | |
1496 | ||
1497 | LEXT(retFromVM) | |
1498 | mfsprg r10,0 ; Restore the per_proc info | |
1499 | mr r8,r3 ; Get the activation | |
1500 | lwz r4,SAVprev(r30) ; Pick up the previous savearea | |
1501 | mr r3,r30 ; Put savearea in proper register for common code | |
1502 | lwz r11,SAVflags(r30) ; Get the flags of the current savearea | |
1503 | rlwinm r11,r11,0,15,13 ; Clear the syscall flag | |
1504 | lwz r1,ACT_THREAD(r8) ; and the active thread | |
1505 | stw r11,SAVflags(r3) ; Save back the flags (with reset stack cleared) | |
1506 | ||
1507 | stw r4,ACT_MACT_PCB(r8) ; Point to the previous savearea (or 0 if none) | |
1508 | ||
1509 | lwz r5,THREAD_KERNEL_STACK(r1) ; Get the base pointer to the stack | |
1510 | addi r5,r5,KERNEL_STACK_SIZE-FM_SIZE ; Reset to empty | |
1511 | stw r5,ACT_MACT_KSP(r8) ; Save the empty stack pointer | |
1512 | b chkfac ; Go end it all... | |
1513 | ||
1514 | ||
0b4e3aa0 A |
1515 | ; |
1516 | ; chandler (note: not a candle maker or tallow merchant) | |
1517 | ; | |
1518 | ; Here is the system choke handler. This is where the system goes | |
1519 | ; to die. | |
1520 | ; | |
1521 | ; We get here as a result of a T_CHOKE exception which is generated | |
1522 | ; by the Choke firmware call or by lowmem_vectors when it detects a | |
1523 | ; fatal error. Examples of where this may be used is when we detect | |
1524 | ; problems in low-level mapping chains, trashed savearea free chains, | |
1525 | ; or stack guardpage violations. | |
1526 | ; | |
1527 | ; Note that we can not set a back chain in the stack when we come | |
1528 | ; here because we are probably here because the chain was corrupt. | |
1529 | ; | |
1c79356b | 1530 | |
0b4e3aa0 A |
1531 | |
1532 | .align 5 | |
1533 | .globl EXT(chandler) | |
1534 | LEXT(chandler) /* Choke handler */ | |
1535 | ||
1536 | lis r25,hi16(EXT(trcWork)) ; (TEST/DEBUG) | |
1537 | li r31,0 ; (TEST/DEBUG) | |
1538 | ori r25,r25,lo16(EXT(trcWork)) ; (TEST/DEBUG) | |
1539 | stw r31,traceMask(r25) ; (TEST/DEBUG) | |
1540 | ||
1541 | ||
1542 | mfsprg r25,0 ; Get the per_proc | |
1543 | ||
1544 | lwz r1,PP_DEBSTACKPTR(r25) ; Get debug stack pointer | |
1545 | cmpwi r1,-1 ; Are we already choking? | |
1546 | bne chokefirst ; Nope... | |
1c79356b | 1547 | |
0b4e3aa0 A |
1548 | chokespin: addi r31,r31,1 ; Spin and hope for an analyzer connection... |
1549 | addi r31,r31,1 ; Spin and hope for an analyzer connection... | |
1550 | addi r31,r31,1 ; Spin and hope for an analyzer connection... | |
1551 | addi r31,r31,1 ; Spin and hope for an analyzer connection... | |
1552 | addi r31,r31,1 ; Spin and hope for an analyzer connection... | |
1553 | addi r31,r31,1 ; Spin and hope for an analyzer connection... | |
1554 | b chokespin ; Spin and hope for an analyzer connection... | |
1c79356b | 1555 | |
0b4e3aa0 A |
1556 | chokefirst: li r0,-1 ; Set choke value |
1557 | mr. r1,r1 ; See if we are on debug stack yet | |
1558 | lwz r10,saver1(r4) ; | |
1559 | stw r0,PP_DEBSTACKPTR(r25) ; Show we are choking | |
1560 | bne chokestart ; We are not on the debug stack yet... | |
1c79356b | 1561 | |
0b4e3aa0 A |
1562 | lwz r2,PP_DEBSTACK_TOP_SS(r25) ; Get debug stack top |
1563 | sub r11,r2,r10 ; Get stack depth | |
1c79356b | 1564 | |
0b4e3aa0 A |
1565 | cmplwi r11,KERNEL_STACK_SIZE-FM_SIZE-TRAP_SPACE_NEEDED ; Check if stack pointer is ok |
1566 | bgt chokespin ; Bad stack pointer or too little left, just die... | |
1c79356b | 1567 | |
0b4e3aa0 A |
1568 | subi r1,r10,FM_REDZONE ; Make a red zone |
1569 | ||
1570 | chokestart: li r0,0 ; Get a zero | |
1571 | stw r0,FM_BACKPTR(r1) ; We now have terminated the back chain | |
1572 | ||
1573 | bl EXT(SysChoked) ; Call the "C" phase of this | |
1574 | b chokespin ; Should not be here so just go spin... | |
1575 | ||
1c79356b A |
1576 | |
1577 | #if VERIFYSAVE | |
1578 | ; | |
1579 | ; Savearea chain verification | |
1580 | ; | |
1581 | ||
1582 | versave: | |
9bccf70c | 1583 | #if 1 |
1c79356b | 1584 | ; |
9bccf70c | 1585 | ; Make sure that all savearea chains have the right type on them |
1c79356b A |
1586 | ; |
1587 | ||
1588 | lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG) | |
1589 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1590 | ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG) | |
1591 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1592 | li r20,0 ; (TEST/DEBUG) | |
1593 | lwz r26,0(r27) ; (TEST/DEBUG) | |
1594 | lwz r27,psthreadcnt(r28) ; (TEST/DEBUG) | |
9bccf70c | 1595 | mr. r26,r26 ; (TEST/DEBUG) Have we locked the test out? |
1c79356b | 1596 | lwz r28,psthreads(r28) ; (TEST/DEBUG) |
9bccf70c A |
1597 | mflr r31 ; (TEST/DEBUG) Save return |
1598 | bnelr- ; (TEST/DEBUG) Test already triggered, skip... | |
1599 | b fckgo ; (TEST/DEBUG) Join up... | |
1c79356b | 1600 | |
9bccf70c A |
1601 | fcknext: mr. r27,r27 ; (TEST/DEBUG) Any more threads? |
1602 | bne+ fckxxx ; (TEST/DEBUG) Yes... | |
1603 | ||
1604 | mtlr r31 ; (TEST/DEBUG) Restore return | |
1605 | blr ; (TEST/DEBUG) Leave... | |
1c79356b | 1606 | |
9bccf70c | 1607 | fckxxx: lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Get next thread |
1c79356b | 1608 | |
9bccf70c A |
1609 | fckgo: subi r27,r27,1 ; (TEST/DEBUG) Decrement thread count |
1610 | lwz r24,THREAD_TOP_ACT(r28) ; (TEST/DEBUG) Get activation for the thread | |
1611 | lwz r20,ACT_MACT_PCB(r24) ; (TEST/DEBUG) Get the normal context | |
1612 | li r21,SAVgeneral ; (TEST/DEBUG) Make sure this is all general context | |
1613 | bl versavetype ; (TEST/DEBUG) Check the chain | |
1c79356b | 1614 | |
9bccf70c A |
1615 | lwz r20,facctx+FPUsave(r24) ; (TEST/DEBUG) Get regular floating point |
1616 | li r21,SAVfloat ; (TEST/DEBUG) Make sure this is all floating point | |
1617 | bl versavetype ; (TEST/DEBUG) Check the chain | |
1c79356b | 1618 | |
9bccf70c A |
1619 | lwz r20,facctx+VMXsave(r24) ; (TEST/DEBUG) Get regular vector point |
1620 | li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector | |
1621 | bl versavetype ; (TEST/DEBUG) Check the chain | |
1c79356b | 1622 | |
9bccf70c A |
1623 | lwz r29,vmmControl(r24) ; (TEST/DEBUG) Get the virtual machine control blocks |
1624 | mr. r29,r29 ; (TEST/DEBUG) Are there any? | |
1625 | beq+ fcknext ; (TEST/DEBUG) Nope, next thread... | |
1c79356b | 1626 | |
9bccf70c A |
1627 | li r22,kVmmMaxContextsPerThread ; (TEST/DEBUG) Get the number of control blocks |
1628 | subi r29,r29,vmmCEntrySize ; (TEST/DEBUG) Get running start | |
1629 | ||
1630 | fcknvmm: subi r22,r22,1 ; (TEST/DEBUG) Do all of them | |
1631 | mr. r22,r22 ; (TEST/DEBUG) Are we all done? | |
1632 | addi r29,r29,vmmCEntrySize ; (TEST/DEBUG) Get the next entry | |
1633 | blt- fcknext ; (TEST/DEBUG) Yes, check next thread... | |
1634 | ||
1635 | lwz r23,vmmFlags(r29) ; (TEST/DEBUG) Get entry flags | |
1636 | rlwinm. r23,r23,0,0,0 ; (TEST/DEBUG) Is this in use? | |
1637 | beq+ fcknvmm ; (TEST/DEBUG) Not in use... | |
1638 | ||
1639 | lwz r20,vmmFacCtx+FPUsave(r29) ; (TEST/DEBUG) Get regular floating point | |
1640 | li r21,SAVfloat ; (TEST/DEBUG) Make sure this is all floating point | |
1641 | bl versavetype ; (TEST/DEBUG) Check the chain | |
1642 | ||
1643 | lwz r20,vmmFacCtx+VMXsave(r29) ; (TEST/DEBUG) Get regular vector point | |
1644 | li r21,SAVvector ; (TEST/DEBUG) Make sure this is all vector | |
1645 | bl versavetype ; (TEST/DEBUG) Check the chain | |
1646 | b fcknvmm ; (TEST/DEBUG) Get then vmm block... | |
1647 | ||
1648 | versavetype: | |
1649 | mr. r20,r20 ; (TEST/DEBUG) Chain done? | |
1650 | beqlr- ; (TEST/DEBUG) Yes... | |
1651 | ||
1652 | lwz r23,SAVflags(r20) ; (TEST/DEBUG) Get the flags | |
1653 | rlwinm r23,r23,24,24,31 ; (TEST/DEBUG) Position it | |
1654 | cmplw r23,r21 ; (TEST/DEBUG) Are we the correct type? | |
1655 | beq+ versvok ; (TEST/DEBUG) This one is ok... | |
1656 | ||
1657 | lis r22,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1658 | ori r22,r22,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1659 | stw r22,0(r22) ; (TEST/DEBUG) Lock out more checks | |
1660 | BREAKPOINT_TRAP ; (TEST/DEBUG) Get into debugger | |
1661 | ||
1662 | versvok: lwz r20,SAVprev(r20) ; (TEST/DEBUG) Get the previous one | |
1663 | b versavetype ; (TEST/DEBUG) Go check its type... | |
1c79356b A |
1664 | #endif |
1665 | ||
9bccf70c | 1666 | #if 0 |
1c79356b A |
1667 | ; |
1668 | ; Make sure there are no circular links in the float chain | |
1669 | ; And that FP is marked busy in it. | |
1670 | ; And the only the top is marked invalid. | |
1671 | ; And that the owning PCB is correct. | |
1672 | ; | |
1673 | ||
1674 | lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG) | |
1675 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1676 | ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG) | |
1677 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1678 | li r20,0 ; (TEST/DEBUG) | |
1679 | lwz r26,0(r27) ; (TEST/DEBUG) | |
1680 | lwz r27,psthreadcnt(r28) ; (TEST/DEBUG) | |
1681 | mr. r26,r26 ; (TEST/DEBUG) | |
1682 | lwz r28,psthreads(r28) ; (TEST/DEBUG) | |
1683 | bnelr- ; (TEST/DEBUG) | |
1684 | ||
1685 | fcknxtth: mr. r27,r27 ; (TEST/DEBUG) | |
1686 | beqlr- ; (TEST/DEBUG) | |
1687 | ||
1688 | lwz r26,THREAD_TOP_ACT(r28) ; (TEST/DEBUG) | |
1689 | ||
1690 | fckact: mr. r26,r26 ; (TEST/DEBUG) | |
1691 | bne+ fckact2 ; (TEST/DEBUG) | |
1692 | ||
1693 | lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Next in line | |
1694 | subi r27,r27,1 ; (TEST/DEBUG) | |
1695 | b fcknxtth ; (TEST/DEBUG) | |
1696 | ||
1697 | fckact2: lwz r20,ACT_MACT_FPU(r26) ; (TEST/DEBUG) Get FPU chain | |
1698 | li r29,1 ; (TEST/DEBUG) | |
1699 | li r22,0 ; (TEST/DEBUG) | |
1700 | ||
1701 | fckact3: mr. r20,r20 ; (TEST/DEBUG) Are there any? | |
1702 | beq+ fckact5 ; (TEST/DEBUG) No... | |
1703 | ||
1704 | addi r22,r22,1 ; (TEST/DEBUG) Count chain depth | |
1705 | ||
1706 | lwz r21,SAVflags(r20) ; (TEST/DEBUG) Get the flags | |
1707 | rlwinm. r21,r21,0,1,1 ; (TEST/DEBUG) FP busy? | |
1708 | bne+ fckact3a ; (TEST/DEBUG) Yeah... | |
1709 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1710 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1711 | stw r27,0(r27) ; (TEST/DEBUG) | |
1712 | BREAKPOINT_TRAP ; (TEST/DEBUG) Die | |
1713 | ||
1714 | fckact3a: cmplwi r22,1 ; (TEST/DEBUG) At first SA? | |
1715 | beq+ fckact3b ; (TEST/DEBUG) Yeah, invalid is ok... | |
1716 | lwz r21,SAVlvlfp(r20) ; (TEST/DEBUG) Get level | |
1717 | cmplwi r21,1 ; (TEST/DEBUG) Is it invalid? | |
1718 | bne+ fckact3b ; (TEST/DEBUG) Nope, it is ok... | |
1719 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1720 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1721 | stw r27,0(r27) ; (TEST/DEBUG) | |
1722 | BREAKPOINT_TRAP ; (TEST/DEBUG) Die | |
1723 | ||
1724 | fckact3b: lwz r21,SAVact(r20) ; (TEST/DEBUG) Get the owner | |
1725 | cmplw r21,r26 ; (TEST/DEBUG) Correct activation? | |
1726 | beq+ fckact3c ; (TEST/DEBUG) Yup... | |
1727 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1728 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1729 | stw r27,0(r27) ; (TEST/DEBUG) | |
1730 | BREAKPOINT_TRAP ; (TEST/DEBUG) Die | |
1731 | ||
1732 | fckact3c: ; (TEST/DEBUG) | |
1733 | lbz r21,SAVflags+3(r20) ; (TEST/DEBUG) Pick up the test byte | |
1734 | mr. r21,r21 ; (TEST/DEBUG) marked? | |
1735 | beq+ fckact4 ; (TEST/DEBUG) No, good... | |
1736 | ||
1737 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1738 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1739 | stw r27,0(r27) ; (TEST/DEBUG) | |
1740 | BREAKPOINT_TRAP ; (TEST/DEBUG) | |
1741 | ||
1742 | fckact4: stb r29,SAVflags+3(r20) ; (TEST/DEBUG) Set the test byte | |
1743 | lwz r20,SAVprefp(r20) ; (TEST/DEBUG) Next in list | |
1744 | b fckact3 ; (TEST/DEBUG) Try it... | |
1745 | ||
1746 | fckact5: lwz r20,ACT_MACT_FPU(r26) ; (TEST/DEBUG) Get FPU chain | |
1747 | li r29,0 ; (TEST/DEBUG) | |
1748 | ||
1749 | fckact6: mr. r20,r20 ; (TEST/DEBUG) Are there any? | |
1750 | beq+ fcknact ; (TEST/DEBUG) No... | |
1751 | ||
1752 | stb r29,SAVflags+3(r20) ; (TEST/DEBUG) Clear the test byte | |
1753 | lwz r20,SAVprefp(r20) ; (TEST/DEBUG) Next in list | |
1754 | b fckact6 ; (TEST/DEBUG) Try it... | |
1755 | ||
1756 | fcknact: lwz r26,ACT_LOWER(r26) ; (TEST/DEBUG) Next activation | |
1757 | b fckact ; (TEST/DEBUG) | |
1758 | #endif | |
1759 | ||
1760 | ||
1761 | #if 0 | |
1762 | ; | |
1763 | ; Make sure in use count matches found savearea. This is | |
1764 | ; not always accurate. There is a variable "fuzz" factor in count. | |
1765 | ||
1766 | lis r28,hi16(EXT(default_pset)) ; (TEST/DEBUG) | |
1767 | lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1768 | ori r28,r28,lo16(EXT(default_pset)) ; (TEST/DEBUG) | |
1769 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1770 | li r20,0 ; (TEST/DEBUG) | |
1771 | lwz r26,0(r27) ; (TEST/DEBUG) | |
1772 | lwz r27,psthreadcnt(r28) ; (TEST/DEBUG) | |
1773 | mr. r26,r26 ; (TEST/DEBUG) | |
1774 | lwz r28,psthreads(r28) ; (TEST/DEBUG) | |
1775 | bnelr- ; (TEST/DEBUG) | |
1776 | ||
1777 | cknxtth: mr. r27,r27 ; (TEST/DEBUG) | |
1778 | beq- cktotal ; (TEST/DEBUG) | |
1779 | ||
1780 | lwz r26,THREAD_TOP_ACT(r28) ; (TEST/DEBUG) | |
1781 | ||
1782 | ckact: mr. r26,r26 ; (TEST/DEBUG) | |
1783 | bne+ ckact2 ; (TEST/DEBUG) | |
1784 | ||
1785 | lwz r28,THREAD_PSTHRN(r28) ; (TEST/DEBUG) Next in line | |
1786 | subi r27,r27,1 ; (TEST/DEBUG) | |
1787 | b cknxtth ; (TEST/DEBUG) | |
1788 | ||
1789 | ckact2: lwz r29,ACT_MACT_PCB(r26) ; (TEST/DEBUG) | |
1790 | ||
1791 | cknorm: mr. r29,r29 ; (TEST/DEBUG) | |
1792 | beq- cknormd ; (TEST/DEBUG) | |
1793 | ||
1794 | addi r20,r20,1 ; (TEST/DEBUG) Count normal savearea | |
1795 | ||
1796 | lwz r29,SAVprev(r29) ; (TEST/DEBUG) | |
1797 | b cknorm ; (TEST/DEBUG) | |
1798 | ||
1799 | cknormd: lwz r29,ACT_MACT_FPU(r26) ; (TEST/DEBUG) | |
1800 | ||
1801 | ckfpu: mr. r29,r29 ; (TEST/DEBUG) | |
1802 | beq- ckfpud ; (TEST/DEBUG) | |
1803 | ||
1804 | lwz r21,SAVflags(r29) ; (TEST/DEBUG) | |
1805 | rlwinm. r21,r21,0,0,0 ; (TEST/DEBUG) See if already counted | |
1806 | bne- cknfpu ; (TEST/DEBUG) | |
1807 | ||
1808 | addi r20,r20,1 ; (TEST/DEBUG) Count fpu savearea | |
1809 | ||
1810 | cknfpu: lwz r29,SAVprefp(r29) ; (TEST/DEBUG) | |
1811 | b ckfpu ; (TEST/DEBUG) | |
1812 | ||
1813 | ckfpud: lwz r29,ACT_MACT_VMX(r26) ; (TEST/DEBUG) | |
1814 | ||
1815 | ckvmx: mr. r29,r29 ; (TEST/DEBUG) | |
1816 | beq- ckvmxd ; (TEST/DEBUG) | |
1817 | ||
1818 | lwz r21,SAVflags(r29) ; (TEST/DEBUG) | |
1819 | rlwinm. r21,r21,0,0,1 ; (TEST/DEBUG) See if already counted | |
1820 | bne- cknvmx ; (TEST/DEBUG) | |
1821 | ||
1822 | addi r20,r20,1 ; (TEST/DEBUG) Count vector savearea | |
1823 | ||
1824 | cknvmx: lwz r29,SAVprevec(r29) ; (TEST/DEBUG) | |
1825 | b ckvmx ; (TEST/DEBUG) | |
1826 | ||
1827 | ckvmxd: lwz r26,ACT_LOWER(r26) ; (TEST/DEBUG) Next activation | |
1828 | b ckact ; (TEST/DEBUG) | |
1829 | ||
1830 | cktotal: lis r28,hi16(EXT(saveanchor)) ; (TEST/DEBUG) | |
1831 | lis r27,hi16(EXT(real_ncpus)) ; (TEST/DEBUG) | |
1832 | ori r28,r28,lo16(EXT(saveanchor)) ; (TEST/DEBUG) | |
1833 | ori r27,r27,lo16(EXT(real_ncpus)) ; (TEST/DEBUG) | |
1834 | ||
1835 | lwz r21,SVinuse(r28) ; (TEST/DEBUG) | |
1836 | lwz r27,0(r27) ; (TEST/DEBUG) Get the number of CPUs | |
1837 | sub. r29,r21,r20 ; (TEST/DEBUG) Get number accounted for | |
1838 | blt- badsave ; (TEST/DEBUG) Have too many in use... | |
1839 | sub r26,r29,r27 ; (TEST/DEBUG) Should be 1 unaccounted for for each processor | |
1840 | cmpwi r26,10 ; (TEST/DEBUG) Allow a 10 area slop factor | |
1841 | bltlr+ ; (TEST/DEBUG) | |
1842 | ||
1843 | badsave: lis r27,hi16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1844 | ori r27,r27,lo16(EXT(DebugWork)) ; (TEST/DEBUG) | |
1845 | stw r27,0(r27) ; (TEST/DEBUG) | |
1846 | BREAKPOINT_TRAP ; (TEST/DEBUG) | |
1847 | #endif | |
1848 | #endif |