[apple/xnu.git] / osfmk / i386 / start.s

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
/* 
 * Mach Operating System
 * Copyright (c) 1991,1990 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 */
/*
 */

#include <platforms.h>

#include <i386/asm.h>
#include <i386/proc_reg.h>
#include <i386/postcode.h>
#include <assym.s>

#define	CX(addr,reg)	addr(,reg,4)

#include <i386/acpi.h>
#include <i386/cpuid.h>

/*
 * Interrupt and bootup stack for initial processor.
 */

/* in the __HIB section since the hibernate restore code uses this stack. */
	.section __HIB, __data
	.align	12

	.globl	EXT(low_intstack)
EXT(low_intstack):
	.globl  EXT(gIOHibernateRestoreStack)
EXT(gIOHibernateRestoreStack):

	.space	INTSTACK_SIZE

	.globl	EXT(low_eintstack)
EXT(low_eintstack:)
	.globl  EXT(gIOHibernateRestoreStackEnd)
EXT(gIOHibernateRestoreStackEnd):

/*
 * Pointers to GDT and IDT.  These contain linear addresses.
 */
	.align	ALIGN
	.globl	EXT(gdtptr)
	/* align below properly */
	.word	0 
LEXT(gdtptr)
	.word	Times(8,GDTSZ)-1
	.long	EXT(master_gdt)

	/* back to the regular __DATA section. */

	.section __DATA, __data

/*
 * Stack for last-gasp double-fault handler.
 */
	.align	12
	.globl	EXT(df_task_stack)
EXT(df_task_stack):
	.space	INTSTACK_SIZE
	.globl	EXT(df_task_stack_end)
EXT(df_task_stack_end):


/*
 * Stack for machine-check handler.
 */
	.align	12
	.globl	EXT(mc_task_stack)
EXT(mc_task_stack):
	.space	INTSTACK_SIZE
	.globl	EXT(mc_task_stack_end)
EXT(mc_task_stack_end):

#if	MACH_KDB
/*
 * Stack for last-ditch debugger task for each processor.
 */
	.align	12
	.globl	EXT(db_task_stack_store)
EXT(db_task_stack_store):
	.space	(INTSTACK_SIZE*MAX_CPUS)

#endif	/* MACH_KDB */


/*
 * BSP CPU start here.
 *	eax points to kernbootstruct
 *
 * Environment:
 *	protected mode, no paging, flat 32-bit address space.
 *	(Code/data/stack segments have base == 0, limit == 4G)
 */
	.text
	.align	ALIGN
	.globl	EXT(_start)
LEXT(_start)
	mov		%ds, %bx
	mov		%bx, %es
	mov		%eax, %ebp		/* Move kernbootstruct to ebp */
	mov		%eax, %ebx		/* get pointer to kernbootstruct */

	mov	$EXT(low_eintstack),%esp			/* switch to the bootup stack */

	POSTCODE(PSTART_ENTRY)

	lgdt	EXT(gdtptr)					/* load GDT */

	mov	$(KERNEL_DS),%ax				/* set kernel data segment */
	mov	%ax, %ds
	mov	%ax, %es
	mov	%ax, %ss
	xor	%ax, %ax						/* fs must be zeroed; */
	mov	%ax, %fs						/* some bootstrappers don`t do this */
	mov	%ax, %gs
	cld

	/* "The Aussie Maneuver" ("Myria" variant) */
	pushl $(0xcb<<24)|KERNEL32_CS		/* reload CS  */
	call .-1

paging:
	andl	$0xfffffff0, %esp				/* align stack */
	subl	$0xc, %esp
	pushl	%ebp						/* push boot args addr */
	xorl	%ebp, %ebp					/* zero frame pointer */
	
	POSTCODE(PSTART_BEFORE_PAGING)

/*
 * Turn on paging.
 */
	movl	$EXT(IdlePDPT), %eax		/* CR3 */
	movl	%eax, %cr3
	movl	%cr4, %eax					/* PAE */
	orl	$(CR4_PAE), %eax
	movl	%eax, %cr4
	movl	%cr0,%eax					/* paging */
	orl	$(CR0_PG|CR0_WP),%eax
	movl	%eax,%cr0
	
	call	EXT(vstart)					/* run C code */
	/*NOTREACHED*/
	hlt

/*
 * AP (slave) CPUs enter here.
 *
 * Environment:
 *	protected mode, no paging, flat 32-bit address space.
 *	(Code/data/stack segments have base == 0, limit == 4G)
 */
	.align	ALIGN
	.globl	EXT(slave_pstart)
LEXT(slave_pstart)
	cli				/* disable interrupts, so we don`t */
					/* need IDT for a while */
	xor %ebp, %ebp	// zero boot cpu
	mov $EXT(mp_slave_stack)+PAGE_SIZE, %esp;
	jmp paging


/* Code to get from real mode to protected mode */

#define	operand_size_prefix	.byte 0x66
#define	address_size_prefix	.byte 0x67
#define	cs_base_prefix		.byte 0x2e

#undef LJMP
#define	LJMP(segment,address)			\
	operand_size_prefix			;\
	.byte	0xea				;\
	.long	address-EXT(real_mode_bootstrap_base)	;\
	.word	segment

#define	LGDT(address)				\
	cs_base_prefix				;\
	address_size_prefix			;\
	operand_size_prefix			;\
	.word	0x010f				;\
	.byte	0x15				;\
	.long	address-EXT(real_mode_bootstrap_base)

.section __HIB,__text
.align	12	/* Page align for single bcopy_phys() */
.code32
Entry(real_mode_bootstrap_base)
	cli

	LGDT(EXT(protected_mode_gdtr))

	/* set the PE bit of CR0 */
	mov	%cr0, %eax
	inc %eax
	mov	%eax, %cr0 

	/* reload CS register */
	LJMP(KERNEL32_CS, 1f + REAL_MODE_BOOTSTRAP_OFFSET)
1:
	
	/* we are in protected mode now */
	/* set up the segment registers */
	mov	$KERNEL_DS, %eax
	movw	%ax, %ds
	movw	%ax, %es
	movw	%ax, %ss
	mov		$0, %ax
	movw	%ax, %fs
	movw	%ax, %gs

	POSTCODE(SLAVE_STARTPROG_ENTRY);

	mov	PROT_MODE_START+REAL_MODE_BOOTSTRAP_OFFSET, %ecx
	jmp 	*%ecx

Entry(protected_mode_gdtr)
	.short	160		/* limit (8*6 segs) */
	.long	EXT(master_gdt)

Entry(real_mode_bootstrap_end)

.section __HIB,__text
	.align	ALIGN
	.globl	EXT(hibernate_machine_entrypoint)
LEXT(hibernate_machine_entrypoint)
	mov 	%eax, %edi // save header pointer
	/* restore gdt */
	lgdt	EXT(protected_mode_gdtr)

	/* setup the protected mode segment registers */
	mov		$KERNEL_DS, %eax
	movw	%ax, %ds
	movw	%ax, %es
	movw	%ax, %ss
	mov		$0,%ax			/* fs must be zeroed; */
	mov		%ax,%fs
	mov		%ax,%gs

	/* set up the page tables to use BootstrapPTD 
	 * as done in idle_pt.c, but this must be done programatically */
	mov $EXT(IdlePDPT), %eax
	mov $EXT(BootstrapPTD) + (INTEL_PTE_VALID), %ecx
	mov $0x0, %edx
	mov	%ecx, (0*8+0)(%eax)
	mov %edx, (0*8+4)(%eax)
	add	$(PAGE_SIZE), %ecx
	mov %ecx, (1*8+0)(%eax)
	mov %edx, (1*8+4)(%eax)
	add	$(PAGE_SIZE), %ecx
	mov %ecx, (2*8+0)(%eax)
	mov %edx, (2*8+4)(%eax)
	add	$(PAGE_SIZE), %ecx
	mov %ecx, (3*8+0)(%eax)
	mov %edx, (3*8+4)(%eax)
	mov %eax, %cr3


	movl	%cr4,%eax
	orl		$(CR4_PAE),%eax
	movl	%eax,%cr4               /* enable page size extensions */

	movl	$(MSR_IA32_EFER), %ecx			/* MSR number in ecx */
	rdmsr						/* MSR value return in edx: eax */
	orl	$(MSR_IA32_EFER_NXE), %eax		/* Set NXE bit in low 32-bits */
	wrmsr						/* Update Extended Feature Enable reg */

	movl	%cr0, %eax
	orl	$(CR0_PG|CR0_WP), %eax
	movl	%eax, %cr0	/* ready paging */

	mov $EXT(gIOHibernateRestoreStackEnd), %esp	/* setup stack */
	xorl	%ebp, %ebp				/* zero frame pointer */

	ljmpl	$(KERNEL32_CS), $Ltemp
Ltemp:
	xorl	%eax, %eax              /* Video memory - N/A */
	pushl	%eax
	pushl	%eax
	pushl	%eax
	mov		%edi, %eax              /* Pointer to hibernate header */
	pushl	%eax
	call	EXT(hibernate_kernel_entrypoint)
	/* NOTREACHED */
	hlt
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31	/*
	32	* Mach Operating System
	33	* Copyright (c) 1991,1990 Carnegie Mellon University
	34	* All Rights Reserved.
	35	*
	36	* Permission to use, copy, modify and distribute this software and its
	37	* documentation is hereby granted, provided that both the copyright
	38	* notice and this permission notice appear in all copies of the
	39	* software, derivative works or modified versions, and any portions
	40	* thereof, and that both notices appear in supporting documentation.
	41	*
	42	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	43	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	44	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	45	*
	46	* Carnegie Mellon requests users of this software to return to
	47	*
	48	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	49	* School of Computer Science
	50	* Carnegie Mellon University
	51	* Pittsburgh PA 15213-3890
	52	*
	53	* any improvements or extensions that they make and grant Carnegie Mellon
	54	* the rights to redistribute these changes.
	55	*/
	56	/*
	57	*/
	58
	59	#include <platforms.h>
1c79356b A	60
	61	#include <i386/asm.h>
	62	#include <i386/proc_reg.h>
91447636	63	#include <i386/postcode.h>
1c79356b A	64	#include <assym.s>
1c79356b A	65
1c79356b A	66	#define CX(addr,reg) addr(,reg,4)
1c79356b A	67
b0d623f7	68	#include <i386/acpi.h>
0c530ab8	69	#include <i386/cpuid.h>
1c79356b	70
1c79356b A	71	/*
	72	* Interrupt and bootup stack for initial processor.
	73	*/
0c530ab8	74
b0d623f7 A	75	/* in the __HIB section since the hibernate restore code uses this stack. */
b0d623f7 A	76	.section __HIB, __data
0c530ab8	77	.align 12
91447636	78
0c530ab8 A	79	.globl EXT(low_intstack)
0c530ab8 A	80	EXT(low_intstack):
3a60a9f5 A	81	.globl EXT(gIOHibernateRestoreStack)
3a60a9f5 A	82	EXT(gIOHibernateRestoreStack):
91447636	83
6d2010ae	84	.space INTSTACK_SIZE
91447636	85
0c530ab8 A	86	.globl EXT(low_eintstack)
0c530ab8 A	87	EXT(low_eintstack:)
3a60a9f5 A	88	.globl EXT(gIOHibernateRestoreStackEnd)
3a60a9f5 A	89	EXT(gIOHibernateRestoreStackEnd):
1c79356b	90
91447636 A	91	/*
	92	* Pointers to GDT and IDT. These contain linear addresses.
	93	*/
	94	.align ALIGN
	95	.globl EXT(gdtptr)
0c530ab8	96	/* align below properly */
b0d623f7	97	.word 0
91447636 A	98	LEXT(gdtptr)
91447636 A	99	.word Times(8,GDTSZ)-1
0c530ab8	100	.long EXT(master_gdt)
91447636	101
b0d623f7	102	/* back to the regular __DATA section. */
91447636	103
b0d623f7	104	.section __DATA, __data
1c79356b	105
0c530ab8 A	106	/*
	107	* Stack for last-gasp double-fault handler.
	108	*/
	109	.align 12
	110	.globl EXT(df_task_stack)
	111	EXT(df_task_stack):
6d2010ae	112	.space INTSTACK_SIZE
0c530ab8 A	113	.globl EXT(df_task_stack_end)
	114	EXT(df_task_stack_end):
	115
	116
	117	/*
	118	* Stack for machine-check handler.
	119	*/
	120	.align 12
	121	.globl EXT(mc_task_stack)
	122	EXT(mc_task_stack):
6d2010ae	123	.space INTSTACK_SIZE
0c530ab8 A	124	.globl EXT(mc_task_stack_end)
	125	EXT(mc_task_stack_end):
	126
1c79356b	127	#if MACH_KDB
1c79356b A	128	/*
	129	* Stack for last-ditch debugger task for each processor.
	130	*/
0c530ab8	131	.align 12
1c79356b A	132	.globl EXT(db_task_stack_store)
1c79356b A	133	EXT(db_task_stack_store):
6d2010ae	134	.space (INTSTACK_SIZE*MAX_CPUS)
1c79356b	135
91447636	136	#endif /* MACH_KDB */
1c79356b	137
91447636	138
1c79356b	139	/*
0c530ab8 A	140	* BSP CPU start here.
0c530ab8 A	141	* eax points to kernbootstruct
1c79356b A	142	*
	143	* Environment:
	144	* protected mode, no paging, flat 32-bit address space.
	145	* (Code/data/stack segments have base == 0, limit == 4G)
	146	*/
	147	.text
	148	.align ALIGN
1c79356b A	149	.globl EXT(_start)
1c79356b A	150	LEXT(_start)
b0d623f7 A	151	mov %ds, %bx
	152	mov %bx, %es
	153	mov %eax, %ebp /* Move kernbootstruct to ebp */
	154	mov %eax, %ebx /* get pointer to kernbootstruct */
0c530ab8	155
b0d623f7	156	mov $EXT(low_eintstack),%esp /* switch to the bootup stack */
91447636	157
0c530ab8	158	POSTCODE(PSTART_ENTRY)
91447636	159
b0d623f7	160	lgdt EXT(gdtptr) /* load GDT */
1c79356b	161
b0d623f7 A	162	mov $(KERNEL_DS),%ax /* set kernel data segment */
	163	mov %ax, %ds
	164	mov %ax, %es
	165	mov %ax, %ss
	166	xor %ax, %ax /* fs must be zeroed; */
	167	mov %ax, %fs /* some bootstrappers don`t do this */
	168	mov %ax, %gs
91447636	169	cld
1c79356b	170
b0d623f7 A	171	/* "The Aussie Maneuver" ("Myria" variant) */
	172	pushl $(0xcb<<24)\|KERNEL32_CS /* reload CS */
	173	call .-1
1c79356b	174
b0d623f7 A	175	paging:
	176	andl $0xfffffff0, %esp /* align stack */
	177	subl $0xc, %esp
	178	pushl %ebp /* push boot args addr */
	179	xorl %ebp, %ebp /* zero frame pointer */
	180
0c530ab8	181	POSTCODE(PSTART_BEFORE_PAGING)
1c79356b A	182
1c79356b A	183	/*
91447636	184	* Turn on paging.
1c79356b	185	*/
b0d623f7	186	movl $EXT(IdlePDPT), %eax /* CR3 */
91447636	187	movl %eax, %cr3
b0d623f7	188	movl %cr4, %eax /* PAE */
2d21ac55	189	orl $(CR4_PAE), %eax
91447636	190	movl %eax, %cr4
b0d623f7 A	191	movl %cr0,%eax /* paging */
	192	orl $(CR0_PG\|CR0_WP),%eax
	193	movl %eax,%cr0
0c530ab8	194
b0d623f7	195	call EXT(vstart) /* run C code */
1c79356b A	196	/NOTREACHED/
	197	hlt
	198
8f6c56a5	199	/*
0c530ab8 A	200	* AP (slave) CPUs enter here.
	201	*
	202	* Environment:
	203	* protected mode, no paging, flat 32-bit address space.
	204	* (Code/data/stack segments have base == 0, limit == 4G)
6601e61a A	205	*/
6601e61a A	206	.align ALIGN
0c530ab8 A	207	.globl EXT(slave_pstart)
0c530ab8 A	208	LEXT(slave_pstart)
1c79356b A	209	cli /* disable interrupts, so we don`t */
1c79356b A	210	/* need IDT for a while */
b0d623f7 A	211	xor %ebp, %ebp // zero boot cpu
	212	mov $EXT(mp_slave_stack)+PAGE_SIZE, %esp;
	213	jmp paging
91447636	214
6d2010ae	215
b0d623f7	216	/* Code to get from real mode to protected mode */
1c79356b	217
b0d623f7 A	218	#define operand_size_prefix .byte 0x66
	219	#define address_size_prefix .byte 0x67
	220	#define cs_base_prefix .byte 0x2e
1c79356b	221
b0d623f7 A	222	#undef LJMP
	223	#define LJMP(segment,address) \
	224	operand_size_prefix ;\
	225	.byte 0xea ;\
	226	.long address-EXT(real_mode_bootstrap_base) ;\
	227	.word segment
1c79356b	228
b0d623f7 A	229	#define LGDT(address) \
	230	cs_base_prefix ;\
	231	address_size_prefix ;\
	232	operand_size_prefix ;\
	233	.word 0x010f ;\
	234	.byte 0x15 ;\
	235	.long address-EXT(real_mode_bootstrap_base)
	236
	237	.section __HIB,__text
	238	.align 12 /* Page align for single bcopy_phys() */
	239	.code32
	240	Entry(real_mode_bootstrap_base)
	241	cli
	242
	243	LGDT(EXT(protected_mode_gdtr))
	244
	245	/* set the PE bit of CR0 */
	246	mov %cr0, %eax
	247	inc %eax
	248	mov %eax, %cr0
	249
	250	/* reload CS register */
	251	LJMP(KERNEL32_CS, 1f + REAL_MODE_BOOTSTRAP_OFFSET)
1c79356b	252	1:
1c79356b	253
b0d623f7 A	254	/* we are in protected mode now */
	255	/* set up the segment registers */
	256	mov $KERNEL_DS, %eax
	257	movw %ax, %ds
	258	movw %ax, %es
	259	movw %ax, %ss
	260	mov $0, %ax
	261	movw %ax, %fs
	262	movw %ax, %gs
	263
	264	POSTCODE(SLAVE_STARTPROG_ENTRY);
	265
	266	mov PROT_MODE_START+REAL_MODE_BOOTSTRAP_OFFSET, %ecx
	267	jmp *%ecx
	268
	269	Entry(protected_mode_gdtr)
	270	.short 160 /* limit (86 segs) /
	271	.long EXT(master_gdt)
1c79356b	272
b0d623f7	273	Entry(real_mode_bootstrap_end)
1c79356b	274
b0d623f7 A	275	.section __HIB,__text
	276	.align ALIGN
	277	.globl EXT(hibernate_machine_entrypoint)
	278	LEXT(hibernate_machine_entrypoint)
	279	mov %eax, %edi // save header pointer
	280	/* restore gdt */
	281	lgdt EXT(protected_mode_gdtr)
	282
	283	/* setup the protected mode segment registers */
	284	mov $KERNEL_DS, %eax
	285	movw %ax, %ds
	286	movw %ax, %es
	287	movw %ax, %ss
	288	mov $0,%ax /* fs must be zeroed; */
	289	mov %ax,%fs
	290	mov %ax,%gs
	291
	292	/* set up the page tables to use BootstrapPTD
	293	* as done in idle_pt.c, but this must be done programatically */
	294	mov $EXT(IdlePDPT), %eax
	295	mov $EXT(BootstrapPTD) + (INTEL_PTE_VALID), %ecx
	296	mov $0x0, %edx
	297	mov %ecx, (0*8+0)(%eax)
	298	mov %edx, (0*8+4)(%eax)
	299	add $(PAGE_SIZE), %ecx
	300	mov %ecx, (1*8+0)(%eax)
	301	mov %edx, (1*8+4)(%eax)
	302	add $(PAGE_SIZE), %ecx
	303	mov %ecx, (2*8+0)(%eax)
	304	mov %edx, (2*8+4)(%eax)
	305	add $(PAGE_SIZE), %ecx
	306	mov %ecx, (3*8+0)(%eax)
	307	mov %edx, (3*8+4)(%eax)
	308	mov %eax, %cr3
	309
	310
	311	movl %cr4,%eax
	312	orl $(CR4_PAE),%eax
	313	movl %eax,%cr4 /* enable page size extensions */
1c79356b	314
b0d623f7 A	315	movl $(MSR_IA32_EFER), %ecx /* MSR number in ecx */
	316	rdmsr /* MSR value return in edx: eax */
	317	orl $(MSR_IA32_EFER_NXE), %eax /* Set NXE bit in low 32-bits */
	318	wrmsr /* Update Extended Feature Enable reg */
1c79356b	319
b0d623f7 A	320	movl %cr0, %eax
	321	orl $(CR0_PG\|CR0_WP), %eax
	322	movl %eax, %cr0 /* ready paging */
	323
	324	mov $EXT(gIOHibernateRestoreStackEnd), %esp /* setup stack */
	325	xorl %ebp, %ebp /* zero frame pointer */
	326
	327	ljmpl $(KERNEL32_CS), $Ltemp
	328	Ltemp:
	329	xorl %eax, %eax /* Video memory - N/A */
	330	pushl %eax
	331	pushl %eax
	332	pushl %eax
	333	mov %edi, %eax /* Pointer to hibernate header */
	334	pushl %eax
	335	call EXT(hibernate_kernel_entrypoint)
	336	/* NOTREACHED */
	337	hlt