projects / apple / xnu.git / blame
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| 55e303ae A |
1 | /* |
| 2 | * Copyright (c) 2003 Apple Computer, Inc. All rights reserved. | |
| 3 | * | |
| 4 | * @APPLE_LICENSE_HEADER_START@ | |
| 5 | * | |
| 6 | * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. | |
| 7 | * | |
| 8 | * This file contains Original Code and/or Modifications of Original Code | |
| 9 | * as defined in and that are subject to the Apple Public Source License | |
| 10 | * Version 2.0 (the 'License'). You may not use this file except in | |
| 11 | * compliance with the License. Please obtain a copy of the License at | |
| 12 | * http://www.opensource.apple.com/apsl/ and read it before using this | |
| 13 | * file. | |
| 14 | * | |
| 15 | * The Original Code and all software distributed under the License are | |
| 16 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
| 17 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
| 18 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
| 20 | * Please see the License for the specific language governing rights and | |
| 21 | * limitations under the License. | |
| 22 | * | |
| 23 | * @APPLE_LICENSE_HEADER_END@ | |
| 24 | */ | |
| 25 | ||
| 26 | #ifndef _CHUD_SPR_H_ | |
| 27 | #define _CHUD_SPR_H_ | |
| 28 | ||
| 29 | /* PPC SPRs - 32-bit and 64-bit implementations */ | |
| 30 | #define chud_ppc_srr0 26 | |
| 31 | #define chud_ppc_srr1 27 | |
| 32 | #define chud_ppc_dsisr 18 | |
| 33 | #define chud_ppc_dar 19 | |
| 34 | #define chud_ppc_dec 22 | |
| 35 | #define chud_ppc_sdr1 25 | |
| 36 | #define chud_ppc_sprg0 272 | |
| 37 | #define chud_ppc_sprg1 273 | |
| 38 | #define chud_ppc_sprg2 274 | |
| 39 | #define chud_ppc_sprg3 275 | |
| 40 | #define chud_ppc_ear 282 | |
| 41 | #define chud_ppc_tbl 284 | |
| 42 | #define chud_ppc_tbu 285 | |
| 43 | #define chud_ppc_pvr 287 | |
| 44 | #define chud_ppc_ibat0u 528 | |
| 45 | #define chud_ppc_ibat0l 529 | |
| 46 | #define chud_ppc_ibat1u 530 | |
| 47 | #define chud_ppc_ibat1l 531 | |
| 48 | #define chud_ppc_ibat2u 532 | |
| 49 | #define chud_ppc_ibat2l 533 | |
| 50 | #define chud_ppc_ibat3u 534 | |
| 51 | #define chud_ppc_ibat3l 535 | |
| 52 | #define chud_ppc_dbat0u 536 | |
| 53 | #define chud_ppc_dbat0l 537 | |
| 54 | #define chud_ppc_dbat1u 538 | |
| 55 | #define chud_ppc_dbat1l 539 | |
| 56 | #define chud_ppc_dbat2u 540 | |
| 57 | #define chud_ppc_dbat2l 541 | |
| 58 | #define chud_ppc_dbat3u 542 | |
| 59 | #define chud_ppc_dbat3l 543 | |
| 60 | #define chud_ppc_dabr 1013 | |
| 61 | #define chud_ppc_msr 10000 /* FAKE */ | |
| 62 | ||
| 63 | /* PPC SPRs - 32-bit implementations */ | |
| 64 | #define chud_ppc32_sr0 20000 /* FAKE */ | |
| 65 | #define chud_ppc32_sr1 20001 /* FAKE */ | |
| 66 | #define chud_ppc32_sr2 20002 /* FAKE */ | |
| 67 | #define chud_ppc32_sr3 20003 /* FAKE */ | |
| 68 | #define chud_ppc32_sr4 20004 /* FAKE */ | |
| 69 | #define chud_ppc32_sr5 20005 /* FAKE */ | |
| 70 | #define chud_ppc32_sr6 20006 /* FAKE */ | |
| 71 | #define chud_ppc32_sr7 20007 /* FAKE */ | |
| 72 | #define chud_ppc32_sr8 20008 /* FAKE */ | |
| 73 | #define chud_ppc32_sr9 20009 /* FAKE */ | |
| 74 | #define chud_ppc32_sr10 20010 /* FAKE */ | |
| 75 | #define chud_ppc32_sr11 20011 /* FAKE */ | |
| 76 | #define chud_ppc32_sr12 20012 /* FAKE */ | |
| 77 | #define chud_ppc32_sr13 20013 /* FAKE */ | |
| 78 | #define chud_ppc32_sr14 20014 /* FAKE */ | |
| 79 | #define chud_ppc32_sr15 20015 /* FAKE */ | |
| 80 | ||
| 81 | /* PPC SPRs - 64-bit implementations */ | |
| 82 | #define chud_ppc64_asr 280 | |
| 83 | ||
| 84 | /* PPC SPRs - 750/750CX/750CXe/750FX Specific */ | |
| 85 | #define chud_750_upmc1 937 | |
| 86 | #define chud_750_upmc2 938 | |
| 87 | #define chud_750_upmc3 941 | |
| 88 | #define chud_750_upmc4 942 | |
| 89 | #define chud_750_mmcr0 952 | |
| 90 | #define chud_750_pmc1 953 | |
| 91 | #define chud_750_pmc2 954 | |
| 92 | #define chud_750_sia 955 | |
| 93 | #define chud_750_mmcr1 956 | |
| 94 | #define chud_750_pmc3 957 | |
| 95 | #define chud_750_pmc4 958 | |
| 96 | #define chud_750_hid0 1008 | |
| 97 | #define chud_750_hid1 1009 | |
| 98 | #define chud_750_iabr 1010 | |
| 99 | #define chud_750_l2cr 1017 | |
| 100 | #define chud_750_ictc 1019 | |
| 101 | #define chud_750_thrm1 1020 | |
| 102 | #define chud_750_thrm2 1021 | |
| 103 | #define chud_750_thrm3 1022 | |
| 104 | #define chud_750fx_ibat4u 560 /* 750FX only */ | |
| 105 | #define chud_750fx_ibat4l 561 /* 750FX only */ | |
| 106 | #define chud_750fx_ibat5u 562 /* 750FX only */ | |
| 107 | #define chud_750fx_ibat5l 563 /* 750FX only */ | |
| 108 | #define chud_750fx_ibat6u 564 /* 750FX only */ | |
| 109 | #define chud_750fx_ibat6l 565 /* 750FX only */ | |
| 110 | #define chud_750fx_ibat7u 566 /* 750FX only */ | |
| 111 | #define chud_750fx_ibat7l 567 /* 750FX only */ | |
| 112 | #define chud_750fx_dbat4u 568 /* 750FX only */ | |
| 113 | #define chud_750fx_dbat4l 569 /* 750FX only */ | |
| 114 | #define chud_750fx_dbat5u 570 /* 750FX only */ | |
| 115 | #define chud_750fx_dbat5l 571 /* 750FX only */ | |
| 116 | #define chud_750fx_dbat6u 572 /* 750FX only */ | |
| 117 | #define chud_750fx_dbat6l 573 /* 750FX only */ | |
| 118 | #define chud_750fx_dbat7u 574 /* 750FX only */ | |
| 119 | #define chud_750fx_dbat7l 575 /* 750FX only */ | |
| 120 | #define chud_750fx_hid2 1016 /* 750FX only */ | |
| 121 | ||
| 122 | /* PPC SPRs - 7400/7410 Specific */ | |
| 123 | #define chud_7400_upmc1 937 | |
| 124 | #define chud_7400_upmc2 938 | |
| 125 | #define chud_7400_upmc3 941 | |
| 126 | #define chud_7400_upmc4 942 | |
| 127 | #define chud_7400_mmcr2 944 | |
| 128 | #define chud_7400_bamr 951 | |
| 129 | #define chud_7400_mmcr0 952 | |
| 130 | #define chud_7400_pmc1 953 | |
| 131 | #define chud_7400_pmc2 954 | |
| 132 | #define chud_7400_siar 955 | |
| 133 | #define chud_7400_mmcr1 956 | |
| 134 | #define chud_7400_pmc3 957 | |
| 135 | #define chud_7400_pmc4 958 | |
| 136 | #define chud_7400_sda 959 | |
| 137 | #define chud_7400_hid0 1008 | |
| 138 | #define chud_7400_hid1 1009 | |
| 139 | #define chud_7400_iabr 1010 | |
| 140 | #define chud_7400_msscr0 1014 | |
| 141 | #define chud_7410_l2pmcr 1016 /* 7410 only */ | |
| 142 | #define chud_7400_l2cr 1017 | |
| 143 | #define chud_7400_ictc 1019 | |
| 144 | #define chud_7400_thrm1 1020 | |
| 145 | #define chud_7400_thrm2 1021 | |
| 146 | #define chud_7400_thrm3 1022 | |
| 147 | #define chud_7400_pir 1023 | |
| 148 | ||
| 149 | /* PPC SPRs - 7450/7455 Specific */ | |
| 150 | #define chud_7455_sprg4 276 /* 7455 only */ | |
| 151 | #define chud_7455_sprg5 277 /* 7455 only */ | |
| 152 | #define chud_7455_sprg6 278 /* 7455 only */ | |
| 153 | #define chud_7455_sprg7 279 /* 7455 only */ | |
| 154 | #define chud_7455_ibat4u 560 /* 7455 only */ | |
| 155 | #define chud_7455_ibat4l 561 /* 7455 only */ | |
| 156 | #define chud_7455_ibat5u 562 /* 7455 only */ | |
| 157 | #define chud_7455_ibat5l 563 /* 7455 only */ | |
| 158 | #define chud_7455_ibat6u 564 /* 7455 only */ | |
| 159 | #define chud_7455_ibat6l 565 /* 7455 only */ | |
| 160 | #define chud_7455_ibat7u 566 /* 7455 only */ | |
| 161 | #define chud_7455_ibat7l 567 /* 7455 only */ | |
| 162 | #define chud_7455_dbat4u 568 /* 7455 only */ | |
| 163 | #define chud_7455_dbat4l 569 /* 7455 only */ | |
| 164 | #define chud_7455_dbat5u 570 /* 7455 only */ | |
| 165 | #define chud_7455_dbat5l 571 /* 7455 only */ | |
| 166 | #define chud_7455_dbat6u 572 /* 7455 only */ | |
| 167 | #define chud_7455_dbat6l 573 /* 7455 only */ | |
| 168 | #define chud_7455_dbat7u 574 /* 7455 only */ | |
| 169 | #define chud_7455_dbat7l 575 /* 7455 only */ | |
| 170 | #define chud_7450_upmc5 929 | |
| 171 | #define chud_7450_upmc6 930 | |
| 172 | #define chud_7450_upmc1 937 | |
| 173 | #define chud_7450_upmc2 938 | |
| 174 | #define chud_7450_upmc3 941 | |
| 175 | #define chud_7450_upmc4 942 | |
| 176 | #define chud_7450_mmcr2 944 | |
| 177 | #define chud_7450_pmc5 945 | |
| 178 | #define chud_7450_pmc6 946 | |
| 179 | #define chud_7450_bamr 951 | |
| 180 | #define chud_7450_mmcr0 952 | |
| 181 | #define chud_7450_pmc1 953 | |
| 182 | #define chud_7450_pmc2 954 | |
| 183 | #define chud_7450_siar 955 | |
| 184 | #define chud_7450_mmcr1 956 | |
| 185 | #define chud_7450_pmc3 957 | |
| 186 | #define chud_7450_pmc4 958 | |
| 187 | #define chud_7450_tlbmiss 980 | |
| 188 | #define chud_7450_ptehi 981 | |
| 189 | #define chud_7450_ptelo 982 | |
| 190 | #define chud_7450_l3pm 983 | |
| 191 | #define chud_7450_hid0 1008 | |
| 192 | #define chud_7450_hid1 1009 | |
| 193 | #define chud_7450_iabr 1010 | |
| 194 | #define chud_7450_ldstdb 1012 | |
| 195 | #define chud_7450_msscr0 1014 | |
| 196 | #define chud_7450_msssr0 1015 | |
| 197 | #define chud_7450_ldstcr 1016 | |
| 198 | #define chud_7450_l2cr 1017 | |
| 199 | #define chud_7450_l3cr 1018 | |
| 200 | #define chud_7450_ictc 1019 | |
| 201 | #define chud_7450_ictrl 1011 | |
| 202 | #define chud_7450_thrm1 1020 | |
| 203 | #define chud_7450_thrm2 1021 | |
| 204 | #define chud_7450_thrm3 1022 | |
| 205 | #define chud_7450_pir 1023 | |
| 206 | ||
| 207 | /* PPC SPRs - 970 Specific */ | |
| 208 | #define chud_970_vrsave 256 | |
| 209 | #define chud_970_ummcra 770 | |
| 210 | #define chud_970_upmc1 771 | |
| 211 | #define chud_970_upmc2 772 | |
| 212 | #define chud_970_upmc3 773 | |
| 213 | #define chud_970_upmc4 774 | |
| 214 | #define chud_970_upmc5 775 | |
| 215 | #define chud_970_upmc6 776 | |
| 216 | #define chud_970_upmc7 777 | |
| 217 | #define chud_970_upmc8 778 | |
| 218 | #define chud_970_ummcr0 779 | |
| 219 | #define chud_970_usiar 780 | |
| 220 | #define chud_970_usdar 781 | |
| 221 | #define chud_970_ummcr1 782 | |
| 222 | #define chud_970_uimc 783 | |
| 223 | #define chud_970_mmcra 786 | |
| 224 | #define chud_970_pmc1 787 | |
| 225 | #define chud_970_pmc2 788 | |
| 226 | #define chud_970_pmc3 789 | |
| 227 | #define chud_970_pmc4 790 | |
| 228 | #define chud_970_pmc5 791 | |
| 229 | #define chud_970_pmc6 792 | |
| 230 | #define chud_970_pmc7 793 | |
| 231 | #define chud_970_pmc8 794 | |
| 232 | #define chud_970_mmcr0 795 | |
| 233 | #define chud_970_siar 796 | |
| 234 | #define chud_970_sdar 797 | |
| 235 | #define chud_970_mmcr1 798 | |
| 236 | #define chud_970_imc 799 | |
| 237 | ||
| 238 | /* PPC SPRs - 7400/7410 Specific */ | |
| 239 | #define chud_7400_msscr1 1015 | |
| 240 | ||
| 241 | /* PPC SPRs - 64-bit implementations */ | |
| 242 | #define chud_ppc64_accr 29 | |
| 243 | #define chud_ppc64_ctrl 152 | |
| 244 | ||
| 245 | /* PPC SPRs - 970 Specific */ | |
| 246 | #define chud_970_scomc 276 | |
| 247 | #define chud_970_scomd 277 | |
| 248 | #define chud_970_hsprg0 304 | |
| 249 | #define chud_970_hsprg1 305 | |
| 250 | #define chud_970_hdec 310 | |
| 251 | #define chud_970_hior 311 | |
| 252 | #define chud_970_rmor 312 | |
| 253 | #define chud_970_hrmor 313 | |
| 254 | #define chud_970_hsrr0 314 | |
| 255 | #define chud_970_hsrr1 315 | |
| 256 | #define chud_970_lpcr 318 | |
| 257 | #define chud_970_lpidr 319 | |
| 258 | #define chud_970_trig0 976 | |
| 259 | #define chud_970_trig1 977 | |
| 260 | #define chud_970_trig2 978 | |
| 261 | #define chud_970_hid0 1008 | |
| 262 | #define chud_970_hid1 1009 | |
| 263 | #define chud_970_hid4 1012 | |
| 264 | #define chud_970_hid5 1014 | |
| 265 | #define chud_970_dabrx 1015 | |
| 266 | #define chud_970_trace 1022 | |
| 267 | #define chud_970_pir 1023 | |
| 268 | ||
| 269 | #endif // _CHUD_SPR_H_ |