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1 | /* |
2 | * Copyright (c) 2018 Apple Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | ||
29 | #ifndef _PEXPERT_ARM_BOARD_CONFIG_H | |
30 | #include <pexpert/arm64/board_config.h> | |
31 | #endif | |
32 | ||
33 | ||
34 | /* | |
35 | * INIT_SAVED_STATE_FLAVORS | |
36 | * | |
37 | * Initializes the saved state flavors of a new saved state structure | |
38 | * arg0 - saved state pointer | |
39 | * arg1 - 32-bit scratch reg | |
40 | * arg2 - 32-bit scratch reg | |
41 | */ | |
42 | .macro INIT_SAVED_STATE_FLAVORS | |
43 | mov $1, ARM_SAVED_STATE64 // Set saved state to 64-bit flavor | |
44 | mov $2, ARM_SAVED_STATE64_COUNT | |
45 | stp $1, $2, [$0, SS_FLAVOR] | |
46 | mov $1, ARM_NEON_SAVED_STATE64 // Set neon state to 64-bit flavor | |
47 | str $1, [$0, NS_FLAVOR] | |
48 | mov $1, ARM_NEON_SAVED_STATE64_COUNT | |
49 | str $1, [$0, NS_COUNT] | |
50 | .endmacro | |
51 | ||
52 | /* | |
53 | * SPILL_REGISTERS | |
54 | * | |
55 | * Spills the current set of registers (excluding x0, x1, sp, fp) to the specified | |
56 | * save area. | |
57 | * x0 - Address of the save area | |
58 | */ | |
59 | ||
60 | .macro SPILL_REGISTERS | |
61 | stp x2, x3, [x0, SS64_X2] // Save remaining GPRs | |
62 | stp x4, x5, [x0, SS64_X4] | |
63 | stp x6, x7, [x0, SS64_X6] | |
64 | stp x8, x9, [x0, SS64_X8] | |
65 | stp x10, x11, [x0, SS64_X10] | |
66 | stp x12, x13, [x0, SS64_X12] | |
67 | stp x14, x15, [x0, SS64_X14] | |
68 | stp x16, x17, [x0, SS64_X16] | |
69 | stp x18, x19, [x0, SS64_X18] | |
70 | stp x20, x21, [x0, SS64_X20] | |
71 | stp x22, x23, [x0, SS64_X22] | |
72 | stp x24, x25, [x0, SS64_X24] | |
73 | stp x26, x27, [x0, SS64_X26] | |
74 | str x28, [x0, SS64_X28] | |
75 | ||
76 | /* Save arm_neon_saved_state64 */ | |
77 | ||
78 | stp q0, q1, [x0, NS64_Q0] | |
79 | stp q2, q3, [x0, NS64_Q2] | |
80 | stp q4, q5, [x0, NS64_Q4] | |
81 | stp q6, q7, [x0, NS64_Q6] | |
82 | stp q8, q9, [x0, NS64_Q8] | |
83 | stp q10, q11, [x0, NS64_Q10] | |
84 | stp q12, q13, [x0, NS64_Q12] | |
85 | stp q14, q15, [x0, NS64_Q14] | |
86 | stp q16, q17, [x0, NS64_Q16] | |
87 | stp q18, q19, [x0, NS64_Q18] | |
88 | stp q20, q21, [x0, NS64_Q20] | |
89 | stp q22, q23, [x0, NS64_Q22] | |
90 | stp q24, q25, [x0, NS64_Q24] | |
91 | stp q26, q27, [x0, NS64_Q26] | |
92 | stp q28, q29, [x0, NS64_Q28] | |
93 | stp q30, q31, [x0, NS64_Q30] | |
94 | ||
95 | mrs lr, ELR_EL1 // Get exception link register | |
96 | mrs x23, SPSR_EL1 // Load CPSR into var reg x23 | |
97 | mrs x24, FPSR | |
98 | mrs x25, FPCR | |
99 | ||
100 | #if defined(HAS_APPLE_PAC) | |
101 | /* Save x1 and LR to preserve across call */ | |
102 | mov x21, x1 | |
103 | mov x20, lr | |
104 | ||
105 | /* | |
106 | * Create thread state signature | |
107 | * | |
108 | * Arg0: The ARM context pointer | |
109 | * Arg1: The PC value to sign | |
110 | * Arg2: The CPSR value to sign | |
111 | * Arg3: The LR value to sign | |
112 | * Arg4: The X16 value to sign | |
113 | * Arg5: The X17 value to sign | |
114 | */ | |
115 | mov x1, lr | |
116 | mov w2, w23 | |
117 | ldr x3, [x0, SS64_LR] | |
118 | mov x4, x16 | |
119 | mov x5, x17 | |
120 | bl _ml_sign_thread_state | |
121 | ||
122 | mov lr, x20 | |
123 | mov x1, x21 | |
124 | #endif /* defined(HAS_APPLE_PAC) */ | |
125 | ||
126 | str lr, [x0, SS64_PC] // Save ELR to PCB | |
127 | str w23, [x0, SS64_CPSR] // Save CPSR to PCB | |
128 | str w24, [x0, NS64_FPSR] | |
129 | str w25, [x0, NS64_FPCR] | |
130 | ||
131 | mrs x20, FAR_EL1 | |
132 | mrs x21, ESR_EL1 | |
133 | ||
134 | str x20, [x0, SS64_FAR] | |
135 | str w21, [x0, SS64_ESR] | |
136 | .endmacro | |
137 | ||
138 | .macro DEADLOOP | |
139 | b . | |
140 | .endmacro |