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24 #include <sys/syscall.h>
26 #if defined(__DYNAMIC__)
27 #if IGNORE_RDAR_13625839
28 .private_extern ___in_sigtramp
40 /* Structure fields for ucontext and mcontext. */
41 #define UCONTEXT_UC_MCONTEXT 28
43 #define MCONTEXT_ES_EXCEPTION 0
44 #define MCONTEXT_SS_EAX 12
45 #define MCONTEXT_SS_EBX 16
46 #define MCONTEXT_SS_ECX 20
47 #define MCONTEXT_SS_EDX 24
48 #define MCONTEXT_SS_EDI 28
49 #define MCONTEXT_SS_ESI 32
50 #define MCONTEXT_SS_EBP 36
51 #define MCONTEXT_SS_ESP 40
52 #define MCONTEXT_SS_EFLAGS 48
53 #define MCONTEXT_SS_EIP 52
57 %ebx Address of "L00000000001$pb"
62 union __sigaction_u __sigaction_u,
75 /* Although this routine does not need any stack frame, various parts
76 of the OS can't analyse the stack without them. */
80 movl 8(%ebp), %ecx # get '__sigaction_u'
81 #if defined(__DYNAMIC__)
86 incl ___in_sigtramp-"L00000000001$pb"(%ebx)
88 movl 16(%ebp), %edx # get 'sig'
89 movl 20(%ebp), %eax # get 'sinfo'
90 movl 24(%ebp), %esi # get 'uctx'
91 /* Call the signal handler.
92 Some variants are not supposed to get the last two parameters,
93 but the test to prevent this is more expensive than just passing
99 #if defined(__DYNAMIC__)
100 decl ___in_sigtramp-"L00000000001$pb"(%ebx)
103 movl $ UC_FLAVOR, 8(%esp)
104 movl $ SYS_sigreturn, %eax
108 /* DWARF unwind table #defines. */
109 #define DW_CFA_advance_loc_4 0x44
110 #define DW_CFA_def_cfa 0x0c
111 #define DW_CFA_def_cfa_expression 0x0F
112 #define DW_CFA_expression 0x10
113 #define DW_CFA_val_expression 0x16
114 #define DW_CFA_offset(column) 0x80+(column)
116 /* DWARF expression #defines. */
117 #define DW_OP_deref 0x06
118 #define DW_OP_const1u 0x08
119 #define DW_OP_dup 0x12
120 #define DW_OP_drop 0x13
121 #define DW_OP_over 0x14
122 #define DW_OP_pick 0x15
123 #define DW_OP_swap 0x16
124 #define DW_OP_rot 0x17
125 #define DW_OP_abs 0x19
126 #define DW_OP_and 0x1a
127 #define DW_OP_div 0x1b
128 #define DW_OP_minus 0x1c
129 #define DW_OP_mod 0x1d
130 #define DW_OP_mul 0x1e
131 #define DW_OP_neg 0x1f
132 #define DW_OP_not 0x20
133 #define DW_OP_or 0x21
134 #define DW_OP_plus 0x22
135 #define DW_OP_plus_uconst 0x23
136 #define DW_OP_shl 0x24
137 #define DW_OP_shr 0x25
138 #define DW_OP_shra 0x26
139 #define DW_OP_xor 0x27
140 #define DW_OP_skip 0x2f
141 #define DW_OP_bra 0x28
142 #define DW_OP_eq 0x29
143 #define DW_OP_ge 0x2A
144 #define DW_OP_gt 0x2B
145 #define DW_OP_le 0x2C
146 #define DW_OP_lt 0x2D
147 #define DW_OP_ne 0x2E
148 #define DW_OP_lit(n) 0x30+(n)
149 #define DW_OP_breg(n) 0x70+(n)
150 #define DW_OP_deref_size 0x94
152 /* The location expression we'll use. */
154 #define loc_expr_for_reg(regno, offs) \
155 .byte DW_CFA_expression, regno, 5 /* block length */, \
156 DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref, \
157 DW_OP_plus_uconst, offs
160 .section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support
162 .set L$set$0,LECIE1-LSCIE1
163 .long L$set$0 # Length of Common Information Entry
165 .long 0 # CIE Identifier Tag
166 .byte 0x1 # CIE Version
167 .ascii "zRS\0" # CIE Augmentation
168 .byte 0x1 # uleb128 0x1; CIE Code Alignment Factor
169 .byte 0x7c # sleb128 -4; CIE Data Alignment Factor
170 .byte 0x8 # CIE RA Column
171 .byte 0x1 # uleb128 0x1; Augmentation size
172 .byte 0x10 # FDE Encoding (pcrel)
174 .byte 0x5 # uleb128 0x5
175 .byte 0x4 # uleb128 0x4
176 .byte DW_CFA_offset(8)
177 .byte 0x1 # uleb128 0x1
178 .byte DW_CFA_offset(8) // double DW_CFA_offset (eip, -4) tells linker to not make compact unwind
179 .byte 0x1 # uleb128 0x1
185 .set L$set$1,LEFDE1-LASFDE1
186 .long L$set$1 # FDE Length
188 .long LASFDE1-EH_frame1 # FDE CIE offset
189 .long Lstart-. # FDE initial location
190 .set L$set$2,Lend-Lstart
191 .long L$set$2 # FDE address range
192 .byte 0x0 # uleb128 0x0; Augmentation size
194 /* Now for the expressions, which all compute
195 uctx->uc_mcontext->register
198 Describe even the registers that are not call-saved because they
199 might be being used in the prologue to save other registers.
200 Only integer registers are described at present. */
202 loc_expr_for_reg (0, MCONTEXT_SS_EAX)
203 loc_expr_for_reg (1, MCONTEXT_SS_ECX)
204 loc_expr_for_reg (2, MCONTEXT_SS_EDX)
205 loc_expr_for_reg (3, MCONTEXT_SS_EBX)
206 loc_expr_for_reg (4, MCONTEXT_SS_EBP) # note that GCC switches
207 loc_expr_for_reg (5, MCONTEXT_SS_ESP) # DWARF registers 4 & 5
208 loc_expr_for_reg (6, MCONTEXT_SS_ESI)
209 loc_expr_for_reg (7, MCONTEXT_SS_EDI)
210 loc_expr_for_reg (9, MCONTEXT_SS_EFLAGS)
212 /* The Intel architecture classifies exceptions into three categories,
213 'faults' which put the address of the faulting instruction
214 in EIP, 'traps' which put the following instruction in EIP,
215 and 'aborts' which don't typically report the instruction
216 causing the exception.
218 The traps are #BP and #OF. */
220 .byte DW_CFA_val_expression, 8
221 .set L$set$3,Lpc_end-Lpc_start
224 /* Push the mcontext address twice. */
225 .byte DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref, DW_OP_dup
226 /* Find the value of EIP. */
227 .byte DW_OP_plus_uconst, MCONTEXT_SS_EIP, DW_OP_deref, DW_OP_swap
228 /* Determine the exception type. */
229 .byte DW_OP_plus_uconst, MCONTEXT_ES_EXCEPTION, DW_OP_deref
230 /* Check whether it is #BP (3) or #OF (4). */
231 .byte DW_OP_dup, DW_OP_lit(3), DW_OP_ne
232 .byte DW_OP_swap, DW_OP_lit(4), DW_OP_ne, DW_OP_and
233 /* If it is, then add 1 to the instruction address, so as to point
234 within or past the faulting instruction. */
238 /* The CFA will have been saved as the value of ESP (it is not
240 .byte DW_CFA_def_cfa_expression
241 .set L$set$4,Lcfa_end-Lcfa_start
244 .byte DW_OP_breg(6), UCONTEXT_UC_MCONTEXT, DW_OP_deref
245 .byte DW_OP_plus_uconst, MCONTEXT_SS_ESP, DW_OP_deref
251 .subsections_via_symbols