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14c7c974 A |
1 | /* |
2 | * Copyright (c) 1999 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights | |
7 | * Reserved. This file contains Original Code and/or Modifications of | |
8 | * Original Code as defined in and that are subject to the Apple Public | |
9 | * Source License Version 1.1 (the "License"). You may not use this file | |
10 | * except in compliance with the License. Please obtain a copy of the | |
11 | * License at http://www.apple.com/publicsource and read it before using | |
12 | * this file. | |
13 | * | |
14 | * The Original Code and all software distributed under the License are | |
15 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
16 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
17 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE OR NON- INFRINGEMENT. Please see the | |
19 | * License for the specific language governing rights and limitations | |
20 | * under the License. | |
21 | * | |
22 | * @APPLE_LICENSE_HEADER_END@ | |
23 | */ | |
24 | /* This file auto-generated from insns.dat by insns.pl - don't edit it */ | |
25 | ||
26 | #include <stdio.h> | |
27 | #include "nasm.h" | |
28 | #include "insns.h" | |
29 | ||
30 | static struct itemplate instrux_AAA[] = { | |
31 | {I_AAA, 0, {0,0,0}, "\1\x37", IF_8086}, | |
32 | {-1} | |
33 | }; | |
34 | ||
35 | static struct itemplate instrux_AAD[] = { | |
36 | {I_AAD, 0, {0,0,0}, "\2\xD5\x0A", IF_8086}, | |
37 | {I_AAD, 1, {IMMEDIATE,0,0}, "\1\xD5\24", IF_8086}, | |
38 | {-1} | |
39 | }; | |
40 | ||
41 | static struct itemplate instrux_AAM[] = { | |
42 | {I_AAM, 0, {0,0,0}, "\2\xD4\x0A", IF_8086}, | |
43 | {I_AAM, 1, {IMMEDIATE,0,0}, "\1\xD4\24", IF_8086}, | |
44 | {-1} | |
45 | }; | |
46 | ||
47 | static struct itemplate instrux_AAS[] = { | |
48 | {I_AAS, 0, {0,0,0}, "\1\x3F", IF_8086}, | |
49 | {-1} | |
50 | }; | |
51 | ||
52 | static struct itemplate instrux_ADC[] = { | |
53 | {I_ADC, 2, {MEMORY,REG8,0}, "\300\1\x10\101", IF_8086|IF_SM}, | |
54 | {I_ADC, 2, {REG8,REG8,0}, "\300\1\x10\101", IF_8086}, | |
55 | {I_ADC, 2, {MEMORY,REG16,0}, "\320\300\1\x11\101", IF_8086|IF_SM}, | |
56 | {I_ADC, 2, {REG16,REG16,0}, "\320\300\1\x11\101", IF_8086}, | |
57 | {I_ADC, 2, {MEMORY,REG32,0}, "\321\300\1\x11\101", IF_386|IF_SM}, | |
58 | {I_ADC, 2, {REG32,REG32,0}, "\321\300\1\x11\101", IF_386}, | |
59 | {I_ADC, 2, {REG8,MEMORY,0}, "\301\1\x12\110", IF_8086|IF_SM}, | |
60 | {I_ADC, 2, {REG8,REG8,0}, "\301\1\x12\110", IF_8086}, | |
61 | {I_ADC, 2, {REG16,MEMORY,0}, "\320\301\1\x13\110", IF_8086|IF_SM}, | |
62 | {I_ADC, 2, {REG16,REG16,0}, "\320\301\1\x13\110", IF_8086}, | |
63 | {I_ADC, 2, {REG32,MEMORY,0}, "\321\301\1\x13\110", IF_386|IF_SM}, | |
64 | {I_ADC, 2, {REG32,REG32,0}, "\321\301\1\x13\110", IF_386}, | |
65 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\202\15", IF_8086}, | |
66 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\202\15", IF_386}, | |
67 | {I_ADC, 2, {REG_AL,IMMEDIATE,0}, "\1\x14\21", IF_8086|IF_SM}, | |
68 | {I_ADC, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x15\31", IF_8086|IF_SM}, | |
69 | {I_ADC, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x15\41", IF_386|IF_SM}, | |
70 | {I_ADC, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\202\21", IF_8086|IF_SM}, | |
71 | {I_ADC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\202\31", IF_8086|IF_SM}, | |
72 | {I_ADC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\202\41", IF_386|IF_SM}, | |
73 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\202\21", IF_8086|IF_SM}, | |
74 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\202\31", IF_8086|IF_SM}, | |
75 | {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\202\41", IF_386|IF_SM}, | |
76 | {-1} | |
77 | }; | |
78 | ||
79 | static struct itemplate instrux_ADD[] = { | |
80 | {I_ADD, 2, {MEMORY,REG8,0}, "\300\17\101", IF_8086|IF_SM}, | |
81 | {I_ADD, 2, {REG8,REG8,0}, "\300\17\101", IF_8086}, | |
82 | {I_ADD, 2, {MEMORY,REG16,0}, "\320\300\1\x01\101", IF_8086|IF_SM}, | |
83 | {I_ADD, 2, {REG16,REG16,0}, "\320\300\1\x01\101", IF_8086}, | |
84 | {I_ADD, 2, {MEMORY,REG32,0}, "\321\300\1\x01\101", IF_386|IF_SM}, | |
85 | {I_ADD, 2, {REG32,REG32,0}, "\321\300\1\x01\101", IF_386}, | |
86 | {I_ADD, 2, {REG8,MEMORY,0}, "\301\1\x02\110", IF_8086|IF_SM}, | |
87 | {I_ADD, 2, {REG8,REG8,0}, "\301\1\x02\110", IF_8086}, | |
88 | {I_ADD, 2, {REG16,MEMORY,0}, "\320\301\1\x03\110", IF_8086|IF_SM}, | |
89 | {I_ADD, 2, {REG16,REG16,0}, "\320\301\1\x03\110", IF_8086}, | |
90 | {I_ADD, 2, {REG32,MEMORY,0}, "\321\301\1\x03\110", IF_386|IF_SM}, | |
91 | {I_ADD, 2, {REG32,REG32,0}, "\321\301\1\x03\110", IF_386}, | |
92 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\200\15", IF_8086}, | |
93 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\200\15", IF_386}, | |
94 | {I_ADD, 2, {REG_AL,IMMEDIATE,0}, "\1\x04\21", IF_8086|IF_SM}, | |
95 | {I_ADD, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x05\31", IF_8086|IF_SM}, | |
96 | {I_ADD, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x05\41", IF_386|IF_SM}, | |
97 | {I_ADD, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\200\21", IF_8086|IF_SM}, | |
98 | {I_ADD, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\200\31", IF_8086|IF_SM}, | |
99 | {I_ADD, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\200\41", IF_386|IF_SM}, | |
100 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\200\21", IF_8086|IF_SM}, | |
101 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\200\31", IF_8086|IF_SM}, | |
102 | {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\200\41", IF_386|IF_SM}, | |
103 | {-1} | |
104 | }; | |
105 | ||
106 | static struct itemplate instrux_AND[] = { | |
107 | {I_AND, 2, {MEMORY,REG8,0}, "\300\1\x20\101", IF_8086|IF_SM}, | |
108 | {I_AND, 2, {REG8,REG8,0}, "\300\1\x20\101", IF_8086}, | |
109 | {I_AND, 2, {MEMORY,REG16,0}, "\320\300\1\x21\101", IF_8086|IF_SM}, | |
110 | {I_AND, 2, {REG16,REG16,0}, "\320\300\1\x21\101", IF_8086}, | |
111 | {I_AND, 2, {MEMORY,REG32,0}, "\321\300\1\x21\101", IF_386|IF_SM}, | |
112 | {I_AND, 2, {REG32,REG32,0}, "\321\300\1\x21\101", IF_386}, | |
113 | {I_AND, 2, {REG8,MEMORY,0}, "\301\1\x22\110", IF_8086|IF_SM}, | |
114 | {I_AND, 2, {REG8,REG8,0}, "\301\1\x22\110", IF_8086}, | |
115 | {I_AND, 2, {REG16,MEMORY,0}, "\320\301\1\x23\110", IF_8086|IF_SM}, | |
116 | {I_AND, 2, {REG16,REG16,0}, "\320\301\1\x23\110", IF_8086}, | |
117 | {I_AND, 2, {REG32,MEMORY,0}, "\321\301\1\x23\110", IF_386|IF_SM}, | |
118 | {I_AND, 2, {REG32,REG32,0}, "\321\301\1\x23\110", IF_386}, | |
119 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\204\15", IF_8086}, | |
120 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\204\15", IF_386}, | |
121 | {I_AND, 2, {REG_AL,IMMEDIATE,0}, "\1\x24\21", IF_8086|IF_SM}, | |
122 | {I_AND, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x25\31", IF_8086|IF_SM}, | |
123 | {I_AND, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x25\41", IF_386|IF_SM}, | |
124 | {I_AND, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\204\21", IF_8086|IF_SM}, | |
125 | {I_AND, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\204\31", IF_8086|IF_SM}, | |
126 | {I_AND, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\204\41", IF_386|IF_SM}, | |
127 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\204\21", IF_8086|IF_SM}, | |
128 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\204\31", IF_8086|IF_SM}, | |
129 | {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\204\41", IF_386|IF_SM}, | |
130 | {-1} | |
131 | }; | |
132 | ||
133 | static struct itemplate instrux_ARPL[] = { | |
134 | {I_ARPL, 2, {MEMORY,REG16,0}, "\300\1\x63\101", IF_286|IF_PRIV|IF_SM}, | |
135 | {I_ARPL, 2, {REG16,REG16,0}, "\300\1\x63\101", IF_286|IF_PRIV}, | |
136 | {-1} | |
137 | }; | |
138 | ||
139 | static struct itemplate instrux_BOUND[] = { | |
140 | {I_BOUND, 2, {REG16,MEMORY,0}, "\320\301\1\x62\110", IF_186}, | |
141 | {I_BOUND, 2, {REG32,MEMORY,0}, "\321\301\1\x62\110", IF_386}, | |
142 | {-1} | |
143 | }; | |
144 | ||
145 | static struct itemplate instrux_BSF[] = { | |
146 | {I_BSF, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBC\110", IF_386|IF_SM}, | |
147 | {I_BSF, 2, {REG16,REG16,0}, "\320\301\2\x0F\xBC\110", IF_386}, | |
148 | {I_BSF, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBC\110", IF_386|IF_SM}, | |
149 | {I_BSF, 2, {REG32,REG32,0}, "\321\301\2\x0F\xBC\110", IF_386}, | |
150 | {-1} | |
151 | }; | |
152 | ||
153 | static struct itemplate instrux_BSR[] = { | |
154 | {I_BSR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBD\110", IF_386|IF_SM}, | |
155 | {I_BSR, 2, {REG16,REG16,0}, "\320\301\2\x0F\xBD\110", IF_386}, | |
156 | {I_BSR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xBD\110", IF_386|IF_SM}, | |
157 | {I_BSR, 2, {REG32,REG32,0}, "\321\301\2\x0F\xBD\110", IF_386}, | |
158 | {-1} | |
159 | }; | |
160 | ||
161 | static struct itemplate instrux_BSWAP[] = { | |
162 | {I_BSWAP, 1, {REG32,0,0}, "\321\1\x0F\10\xC8", IF_486}, | |
163 | {-1} | |
164 | }; | |
165 | ||
166 | static struct itemplate instrux_BT[] = { | |
167 | {I_BT, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA3\101", IF_386|IF_SM}, | |
168 | {I_BT, 2, {REG16,REG16,0}, "\320\300\2\x0F\xA3\101", IF_386}, | |
169 | {I_BT, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA3\101", IF_386|IF_SM}, | |
170 | {I_BT, 2, {REG32,REG32,0}, "\321\300\2\x0F\xA3\101", IF_386}, | |
171 | {I_BT, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\204\25", IF_386}, | |
172 | {I_BT, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\204\25", IF_386}, | |
173 | {-1} | |
174 | }; | |
175 | ||
176 | static struct itemplate instrux_BTC[] = { | |
177 | {I_BTC, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xBB\101", IF_386|IF_SM}, | |
178 | {I_BTC, 2, {REG16,REG16,0}, "\320\300\2\x0F\xBB\101", IF_386}, | |
179 | {I_BTC, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xBB\101", IF_386|IF_SM}, | |
180 | {I_BTC, 2, {REG32,REG32,0}, "\321\300\2\x0F\xBB\101", IF_386}, | |
181 | {I_BTC, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\207\25", IF_386}, | |
182 | {I_BTC, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\207\25", IF_386}, | |
183 | {-1} | |
184 | }; | |
185 | ||
186 | static struct itemplate instrux_BTR[] = { | |
187 | {I_BTR, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB3\101", IF_386|IF_SM}, | |
188 | {I_BTR, 2, {REG16,REG16,0}, "\320\300\2\x0F\xB3\101", IF_386}, | |
189 | {I_BTR, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB3\101", IF_386|IF_SM}, | |
190 | {I_BTR, 2, {REG32,REG32,0}, "\321\300\2\x0F\xB3\101", IF_386}, | |
191 | {I_BTR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\206\25", IF_386}, | |
192 | {I_BTR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\206\25", IF_386}, | |
193 | {-1} | |
194 | }; | |
195 | ||
196 | static struct itemplate instrux_BTS[] = { | |
197 | {I_BTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xAB\101", IF_386|IF_SM}, | |
198 | {I_BTS, 2, {REG16,REG16,0}, "\320\300\2\x0F\xAB\101", IF_386}, | |
199 | {I_BTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xAB\101", IF_386|IF_SM}, | |
200 | {I_BTS, 2, {REG32,REG32,0}, "\321\300\2\x0F\xAB\101", IF_386}, | |
201 | {I_BTS, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\2\x0F\xBA\205\25", IF_386}, | |
202 | {I_BTS, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\2\x0F\xBA\205\25", IF_386}, | |
203 | {-1} | |
204 | }; | |
205 | ||
206 | static struct itemplate instrux_CALL[] = { | |
207 | {I_CALL, 1, {IMMEDIATE,0,0}, "\322\1\xE8\64", IF_8086}, | |
208 | {I_CALL, 1, {IMMEDIATE|FAR,0,0}, "\322\1\x9A\34\37", IF_8086}, | |
209 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\x9A\35\30", IF_8086}, | |
210 | {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\x9A\31\30", IF_8086}, | |
211 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\x9A\31\30", IF_8086}, | |
212 | {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\x9A\41\30", IF_386}, | |
213 | {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\x9A\41\30", IF_386}, | |
214 | {I_CALL, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\203", IF_8086}, | |
215 | {I_CALL, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\203", IF_8086}, | |
216 | {I_CALL, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\203", IF_386}, | |
217 | {I_CALL, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\202", IF_8086}, | |
218 | {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\202", IF_8086}, | |
219 | {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\202", IF_386}, | |
220 | {I_CALL, 1, {REG16,0,0}, "\320\300\1\xFF\202", IF_8086}, | |
221 | {I_CALL, 1, {REG32,0,0}, "\321\300\1\xFF\202", IF_386}, | |
222 | {I_CALL, 1, {MEMORY,0,0}, "\322\300\1\xFF\202", IF_8086}, | |
223 | {I_CALL, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\202", IF_8086}, | |
224 | {I_CALL, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\202", IF_386}, | |
225 | {-1} | |
226 | }; | |
227 | ||
228 | static struct itemplate instrux_CBW[] = { | |
229 | {I_CBW, 0, {0,0,0}, "\320\1\x98", IF_8086}, | |
230 | {-1} | |
231 | }; | |
232 | ||
233 | static struct itemplate instrux_CDQ[] = { | |
234 | {I_CDQ, 0, {0,0,0}, "\321\1\x99", IF_386}, | |
235 | {-1} | |
236 | }; | |
237 | ||
238 | static struct itemplate instrux_CLC[] = { | |
239 | {I_CLC, 0, {0,0,0}, "\1\xF8", IF_8086}, | |
240 | {-1} | |
241 | }; | |
242 | ||
243 | static struct itemplate instrux_CLD[] = { | |
244 | {I_CLD, 0, {0,0,0}, "\1\xFC", IF_8086}, | |
245 | {-1} | |
246 | }; | |
247 | ||
248 | static struct itemplate instrux_CLI[] = { | |
249 | {I_CLI, 0, {0,0,0}, "\1\xFA", IF_8086}, | |
250 | {-1} | |
251 | }; | |
252 | ||
253 | static struct itemplate instrux_CLTS[] = { | |
254 | {I_CLTS, 0, {0,0,0}, "\2\x0F\x06", IF_286|IF_PRIV}, | |
255 | {-1} | |
256 | }; | |
257 | ||
258 | static struct itemplate instrux_CMC[] = { | |
259 | {I_CMC, 0, {0,0,0}, "\1\xF5", IF_8086}, | |
260 | {-1} | |
261 | }; | |
262 | ||
263 | static struct itemplate instrux_CMP[] = { | |
264 | {I_CMP, 2, {MEMORY,REG8,0}, "\300\1\x38\101", IF_8086|IF_SM}, | |
265 | {I_CMP, 2, {REG8,REG8,0}, "\300\1\x38\101", IF_8086}, | |
266 | {I_CMP, 2, {MEMORY,REG16,0}, "\320\300\1\x39\101", IF_8086|IF_SM}, | |
267 | {I_CMP, 2, {REG16,REG16,0}, "\320\300\1\x39\101", IF_8086}, | |
268 | {I_CMP, 2, {MEMORY,REG32,0}, "\321\300\1\x39\101", IF_386|IF_SM}, | |
269 | {I_CMP, 2, {REG32,REG32,0}, "\321\300\1\x39\101", IF_386}, | |
270 | {I_CMP, 2, {REG8,MEMORY,0}, "\301\1\x3A\110", IF_8086|IF_SM}, | |
271 | {I_CMP, 2, {REG8,REG8,0}, "\301\1\x3A\110", IF_8086}, | |
272 | {I_CMP, 2, {REG16,MEMORY,0}, "\320\301\1\x3B\110", IF_8086|IF_SM}, | |
273 | {I_CMP, 2, {REG16,REG16,0}, "\320\301\1\x3B\110", IF_8086}, | |
274 | {I_CMP, 2, {REG32,MEMORY,0}, "\321\301\1\x3B\110", IF_386|IF_SM}, | |
275 | {I_CMP, 2, {REG32,REG32,0}, "\321\301\1\x3B\110", IF_386}, | |
276 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\207\15", IF_8086}, | |
277 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\207\15", IF_386}, | |
278 | {I_CMP, 2, {REG_AL,IMMEDIATE,0}, "\1\x3C\21", IF_8086|IF_SM}, | |
279 | {I_CMP, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x3D\31", IF_8086|IF_SM}, | |
280 | {I_CMP, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x3D\41", IF_386|IF_SM}, | |
281 | {I_CMP, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\207\21", IF_8086|IF_SM}, | |
282 | {I_CMP, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\207\31", IF_8086|IF_SM}, | |
283 | {I_CMP, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\207\41", IF_386|IF_SM}, | |
284 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\207\21", IF_8086|IF_SM}, | |
285 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\207\31", IF_8086|IF_SM}, | |
286 | {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\207\41", IF_386|IF_SM}, | |
287 | {-1} | |
288 | }; | |
289 | ||
290 | static struct itemplate instrux_CMPSB[] = { | |
291 | {I_CMPSB, 0, {0,0,0}, "\1\xA6", IF_8086}, | |
292 | {-1} | |
293 | }; | |
294 | ||
295 | static struct itemplate instrux_CMPSD[] = { | |
296 | {I_CMPSD, 0, {0,0,0}, "\321\1\xA7", IF_386}, | |
297 | {-1} | |
298 | }; | |
299 | ||
300 | static struct itemplate instrux_CMPSW[] = { | |
301 | {I_CMPSW, 0, {0,0,0}, "\320\1\xA7", IF_8086}, | |
302 | {-1} | |
303 | }; | |
304 | ||
305 | static struct itemplate instrux_CMPXCHG[] = { | |
306 | {I_CMPXCHG, 2, {MEMORY,REG8,0}, "\300\2\x0F\xB0\101", IF_PENT|IF_SM}, | |
307 | {I_CMPXCHG, 2, {REG8,REG8,0}, "\300\2\x0F\xB0\101", IF_PENT}, | |
308 | {I_CMPXCHG, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xB1\101", IF_PENT|IF_SM}, | |
309 | {I_CMPXCHG, 2, {REG16,REG16,0}, "\320\300\2\x0F\xB1\101", IF_PENT}, | |
310 | {I_CMPXCHG, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xB1\101", IF_PENT|IF_SM}, | |
311 | {I_CMPXCHG, 2, {REG32,REG32,0}, "\321\300\2\x0F\xB1\101", IF_PENT}, | |
312 | {-1} | |
313 | }; | |
314 | ||
315 | static struct itemplate instrux_CMPXCHG486[] = { | |
316 | {I_CMPXCHG486, 2, {MEMORY,REG8,0}, "\300\2\x0F\xA6\101", IF_486|IF_SM|IF_UNDOC}, | |
317 | {I_CMPXCHG486, 2, {REG8,REG8,0}, "\300\2\x0F\xA6\101", IF_486|IF_UNDOC}, | |
318 | {I_CMPXCHG486, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC}, | |
319 | {I_CMPXCHG486, 2, {REG16,REG16,0}, "\320\300\2\x0F\xA7\101", IF_486|IF_UNDOC}, | |
320 | {I_CMPXCHG486, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_486|IF_SM|IF_UNDOC}, | |
321 | {I_CMPXCHG486, 2, {REG32,REG32,0}, "\321\300\2\x0F\xA7\101", IF_486|IF_UNDOC}, | |
322 | {-1} | |
323 | }; | |
324 | ||
325 | static struct itemplate instrux_CMPXCHG8B[] = { | |
326 | {I_CMPXCHG8B, 1, {MEMORY,0,0}, "\300\2\x0F\xC7\201", IF_PENT}, | |
327 | {-1} | |
328 | }; | |
329 | ||
330 | static struct itemplate instrux_CPUID[] = { | |
331 | {I_CPUID, 0, {0,0,0}, "\2\x0F\xA2", IF_PENT}, | |
332 | {-1} | |
333 | }; | |
334 | ||
335 | static struct itemplate instrux_CWD[] = { | |
336 | {I_CWD, 0, {0,0,0}, "\320\1\x99", IF_8086}, | |
337 | {-1} | |
338 | }; | |
339 | ||
340 | static struct itemplate instrux_CWDE[] = { | |
341 | {I_CWDE, 0, {0,0,0}, "\321\1\x98", IF_386}, | |
342 | {-1} | |
343 | }; | |
344 | ||
345 | static struct itemplate instrux_DAA[] = { | |
346 | {I_DAA, 0, {0,0,0}, "\1\x27", IF_8086}, | |
347 | {-1} | |
348 | }; | |
349 | ||
350 | static struct itemplate instrux_DAS[] = { | |
351 | {I_DAS, 0, {0,0,0}, "\1\x2F", IF_8086}, | |
352 | {-1} | |
353 | }; | |
354 | ||
355 | static struct itemplate instrux_DB[] = { | |
356 | {-1} | |
357 | }; | |
358 | ||
359 | static struct itemplate instrux_DD[] = { | |
360 | {-1} | |
361 | }; | |
362 | ||
363 | static struct itemplate instrux_DEC[] = { | |
364 | {I_DEC, 1, {REG16,0,0}, "\320\10\x48", IF_8086}, | |
365 | {I_DEC, 1, {REG32,0,0}, "\321\10\x48", IF_386}, | |
366 | {I_DEC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\201", IF_8086}, | |
367 | {I_DEC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\201", IF_8086}, | |
368 | {I_DEC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\201", IF_386}, | |
369 | {-1} | |
370 | }; | |
371 | ||
372 | static struct itemplate instrux_DIV[] = { | |
373 | {I_DIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\206", IF_8086}, | |
374 | {I_DIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\206", IF_8086}, | |
375 | {I_DIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\206", IF_386}, | |
376 | {-1} | |
377 | }; | |
378 | ||
379 | static struct itemplate instrux_DQ[] = { | |
380 | {-1} | |
381 | }; | |
382 | ||
383 | static struct itemplate instrux_DT[] = { | |
384 | {-1} | |
385 | }; | |
386 | ||
387 | static struct itemplate instrux_DW[] = { | |
388 | {-1} | |
389 | }; | |
390 | ||
391 | static struct itemplate instrux_EMMS[] = { | |
392 | {I_EMMS, 0, {0,0,0}, "\2\x0F\x77", IF_PENT|IF_MMX}, | |
393 | {-1} | |
394 | }; | |
395 | ||
396 | static struct itemplate instrux_ENTER[] = { | |
397 | {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0}, "\1\xC8\30\25", IF_186}, | |
398 | {-1} | |
399 | }; | |
400 | ||
401 | static struct itemplate instrux_EQU[] = { | |
402 | {I_EQU, 1, {IMMEDIATE,0,0}, "\0", IF_8086}, | |
403 | {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\0", IF_8086}, | |
404 | {-1} | |
405 | }; | |
406 | ||
407 | static struct itemplate instrux_F2XM1[] = { | |
408 | {I_F2XM1, 0, {0,0,0}, "\2\xD9\xF0", IF_8086|IF_FPU}, | |
409 | {-1} | |
410 | }; | |
411 | ||
412 | static struct itemplate instrux_FABS[] = { | |
413 | {I_FABS, 0, {0,0,0}, "\2\xD9\xE1", IF_8086|IF_FPU}, | |
414 | {-1} | |
415 | }; | |
416 | ||
417 | static struct itemplate instrux_FADD[] = { | |
418 | {I_FADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\200", IF_8086|IF_FPU}, | |
419 | {I_FADD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\200", IF_8086|IF_FPU}, | |
420 | {I_FADD, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU}, | |
421 | {I_FADD, 1, {FPUREG,0,0}, "\1\xD8\10\xC0", IF_8086|IF_FPU}, | |
422 | {I_FADD, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC0", IF_8086|IF_FPU}, | |
423 | {I_FADD, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC0", IF_8086|IF_FPU}, | |
424 | {-1} | |
425 | }; | |
426 | ||
427 | static struct itemplate instrux_FADDP[] = { | |
428 | {I_FADDP, 1, {FPUREG,0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU}, | |
429 | {I_FADDP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC0", IF_8086|IF_FPU}, | |
430 | {-1} | |
431 | }; | |
432 | ||
433 | static struct itemplate instrux_FBLD[] = { | |
434 | {I_FBLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU}, | |
435 | {I_FBLD, 1, {MEMORY,0,0}, "\300\1\xDF\204", IF_8086|IF_FPU}, | |
436 | {-1} | |
437 | }; | |
438 | ||
439 | static struct itemplate instrux_FBSTP[] = { | |
440 | {I_FBSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU}, | |
441 | {I_FBSTP, 1, {MEMORY,0,0}, "\300\1\xDF\206", IF_8086|IF_FPU}, | |
442 | {-1} | |
443 | }; | |
444 | ||
445 | static struct itemplate instrux_FCHS[] = { | |
446 | {I_FCHS, 0, {0,0,0}, "\2\xD9\xE0", IF_8086|IF_FPU}, | |
447 | {-1} | |
448 | }; | |
449 | ||
450 | static struct itemplate instrux_FCLEX[] = { | |
451 | {I_FCLEX, 0, {0,0,0}, "\3\x9B\xDB\xE2", IF_8086|IF_FPU}, | |
452 | {-1} | |
453 | }; | |
454 | ||
455 | static struct itemplate instrux_FCMOVB[] = { | |
456 | {I_FCMOVB, 1, {FPUREG,0,0}, "\1\xDA\10\xC0", IF_P6|IF_FPU}, | |
457 | {I_FCMOVB, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC0", IF_P6|IF_FPU}, | |
458 | {-1} | |
459 | }; | |
460 | ||
461 | static struct itemplate instrux_FCMOVBE[] = { | |
462 | {I_FCMOVBE, 1, {FPUREG,0,0}, "\1\xDA\10\xD0", IF_P6|IF_FPU}, | |
463 | {I_FCMOVBE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD0", IF_P6|IF_FPU}, | |
464 | {-1} | |
465 | }; | |
466 | ||
467 | static struct itemplate instrux_FCMOVE[] = { | |
468 | {I_FCMOVE, 1, {FPUREG,0,0}, "\1\xDA\10\xC8", IF_P6|IF_FPU}, | |
469 | {I_FCMOVE, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xC8", IF_P6|IF_FPU}, | |
470 | {-1} | |
471 | }; | |
472 | ||
473 | static struct itemplate instrux_FCMOVNB[] = { | |
474 | {I_FCMOVNB, 1, {FPUREG,0,0}, "\1\xDB\10\xC0", IF_P6|IF_FPU}, | |
475 | {I_FCMOVNB, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC0", IF_P6|IF_FPU}, | |
476 | {-1} | |
477 | }; | |
478 | ||
479 | static struct itemplate instrux_FCMOVNBE[] = { | |
480 | {I_FCMOVNBE, 1, {FPUREG,0,0}, "\1\xDB\10\xD0", IF_P6|IF_FPU}, | |
481 | {I_FCMOVNBE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD0", IF_P6|IF_FPU}, | |
482 | {-1} | |
483 | }; | |
484 | ||
485 | static struct itemplate instrux_FCMOVNE[] = { | |
486 | {I_FCMOVNE, 1, {FPUREG,0,0}, "\1\xDB\10\xC8", IF_P6|IF_FPU}, | |
487 | {I_FCMOVNE, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xC8", IF_P6|IF_FPU}, | |
488 | {-1} | |
489 | }; | |
490 | ||
491 | static struct itemplate instrux_FCMOVNU[] = { | |
492 | {I_FCMOVNU, 1, {FPUREG,0,0}, "\1\xDB\10\xD8", IF_P6|IF_FPU}, | |
493 | {I_FCMOVNU, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xD8", IF_P6|IF_FPU}, | |
494 | {-1} | |
495 | }; | |
496 | ||
497 | static struct itemplate instrux_FCMOVU[] = { | |
498 | {I_FCMOVU, 1, {FPUREG,0,0}, "\1\xDA\10\xD8", IF_P6|IF_FPU}, | |
499 | {I_FCMOVU, 2, {FPU0,FPUREG,0}, "\1\xDA\11\xD8", IF_P6|IF_FPU}, | |
500 | {-1} | |
501 | }; | |
502 | ||
503 | static struct itemplate instrux_FCOM[] = { | |
504 | {I_FCOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\202", IF_8086|IF_FPU}, | |
505 | {I_FCOM, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\202", IF_8086|IF_FPU}, | |
506 | {I_FCOM, 1, {FPUREG,0,0}, "\1\xD8\10\xD0", IF_8086|IF_FPU}, | |
507 | {I_FCOM, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD0", IF_8086|IF_FPU}, | |
508 | {-1} | |
509 | }; | |
510 | ||
511 | static struct itemplate instrux_FCOMI[] = { | |
512 | {I_FCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xF0", IF_P6|IF_FPU}, | |
513 | {I_FCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xF0", IF_P6|IF_FPU}, | |
514 | {-1} | |
515 | }; | |
516 | ||
517 | static struct itemplate instrux_FCOMIP[] = { | |
518 | {I_FCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xF0", IF_P6|IF_FPU}, | |
519 | {I_FCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xF0", IF_P6|IF_FPU}, | |
520 | {-1} | |
521 | }; | |
522 | ||
523 | static struct itemplate instrux_FCOMP[] = { | |
524 | {I_FCOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\203", IF_8086|IF_FPU}, | |
525 | {I_FCOMP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\203", IF_8086|IF_FPU}, | |
526 | {I_FCOMP, 1, {FPUREG,0,0}, "\1\xD8\10\xD8", IF_8086|IF_FPU}, | |
527 | {I_FCOMP, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xD8", IF_8086|IF_FPU}, | |
528 | {-1} | |
529 | }; | |
530 | ||
531 | static struct itemplate instrux_FCOMPP[] = { | |
532 | {I_FCOMPP, 0, {0,0,0}, "\2\xDE\xD9", IF_8086|IF_FPU}, | |
533 | {-1} | |
534 | }; | |
535 | ||
536 | static struct itemplate instrux_FCOS[] = { | |
537 | {I_FCOS, 0, {0,0,0}, "\2\xD9\xFF", IF_386|IF_FPU}, | |
538 | {-1} | |
539 | }; | |
540 | ||
541 | static struct itemplate instrux_FDECSTP[] = { | |
542 | {I_FDECSTP, 0, {0,0,0}, "\2\xD9\xF6", IF_8086|IF_FPU}, | |
543 | {-1} | |
544 | }; | |
545 | ||
546 | static struct itemplate instrux_FDISI[] = { | |
547 | {I_FDISI, 0, {0,0,0}, "\3\x9B\xDB\xE1", IF_8086|IF_FPU}, | |
548 | {-1} | |
549 | }; | |
550 | ||
551 | static struct itemplate instrux_FDIV[] = { | |
552 | {I_FDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\206", IF_8086|IF_FPU}, | |
553 | {I_FDIV, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\206", IF_8086|IF_FPU}, | |
554 | {I_FDIV, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU}, | |
555 | {I_FDIV, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF8", IF_8086|IF_FPU}, | |
556 | {I_FDIV, 1, {FPUREG,0,0}, "\1\xD8\10\xF0", IF_8086|IF_FPU}, | |
557 | {I_FDIV, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF0", IF_8086|IF_FPU}, | |
558 | {-1} | |
559 | }; | |
560 | ||
561 | static struct itemplate instrux_FDIVP[] = { | |
562 | {I_FDIVP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU}, | |
563 | {I_FDIVP, 1, {FPUREG,0,0}, "\1\xDE\10\xF8", IF_8086|IF_FPU}, | |
564 | {-1} | |
565 | }; | |
566 | ||
567 | static struct itemplate instrux_FDIVR[] = { | |
568 | {I_FDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\207", IF_8086|IF_FPU}, | |
569 | {I_FDIVR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\207", IF_8086|IF_FPU}, | |
570 | {I_FDIVR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU}, | |
571 | {I_FDIVR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xF0", IF_8086|IF_FPU}, | |
572 | {I_FDIVR, 1, {FPUREG,0,0}, "\1\xD8\10\xF8", IF_8086|IF_FPU}, | |
573 | {I_FDIVR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xF8", IF_8086|IF_FPU}, | |
574 | {-1} | |
575 | }; | |
576 | ||
577 | static struct itemplate instrux_FDIVRP[] = { | |
578 | {I_FDIVRP, 1, {FPUREG,0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU}, | |
579 | {I_FDIVRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xF0", IF_8086|IF_FPU}, | |
580 | {-1} | |
581 | }; | |
582 | ||
583 | static struct itemplate instrux_FENI[] = { | |
584 | {I_FENI, 0, {0,0,0}, "\3\x9B\xDB\xE0", IF_8086|IF_FPU}, | |
585 | {-1} | |
586 | }; | |
587 | ||
588 | static struct itemplate instrux_FFREE[] = { | |
589 | {I_FFREE, 1, {FPUREG,0,0}, "\1\xDD\10\xC0", IF_8086|IF_FPU}, | |
590 | {-1} | |
591 | }; | |
592 | ||
593 | static struct itemplate instrux_FIADD[] = { | |
594 | {I_FIADD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\200", IF_8086|IF_FPU}, | |
595 | {I_FIADD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\200", IF_8086|IF_FPU}, | |
596 | {-1} | |
597 | }; | |
598 | ||
599 | static struct itemplate instrux_FICOM[] = { | |
600 | {I_FICOM, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\202", IF_8086|IF_FPU}, | |
601 | {I_FICOM, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\202", IF_8086|IF_FPU}, | |
602 | {-1} | |
603 | }; | |
604 | ||
605 | static struct itemplate instrux_FICOMP[] = { | |
606 | {I_FICOMP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\203", IF_8086|IF_FPU}, | |
607 | {I_FICOMP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\203", IF_8086|IF_FPU}, | |
608 | {-1} | |
609 | }; | |
610 | ||
611 | static struct itemplate instrux_FIDIV[] = { | |
612 | {I_FIDIV, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\206", IF_8086|IF_FPU}, | |
613 | {I_FIDIV, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\206", IF_8086|IF_FPU}, | |
614 | {-1} | |
615 | }; | |
616 | ||
617 | static struct itemplate instrux_FIDIVR[] = { | |
618 | {I_FIDIVR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\207", IF_8086|IF_FPU}, | |
619 | {I_FIDIVR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\207", IF_8086|IF_FPU}, | |
620 | {-1} | |
621 | }; | |
622 | ||
623 | static struct itemplate instrux_FILD[] = { | |
624 | {I_FILD, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\200", IF_8086|IF_FPU}, | |
625 | {I_FILD, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\200", IF_8086|IF_FPU}, | |
626 | {I_FILD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\205", IF_8086|IF_FPU}, | |
627 | {-1} | |
628 | }; | |
629 | ||
630 | static struct itemplate instrux_FIMUL[] = { | |
631 | {I_FIMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\201", IF_8086|IF_FPU}, | |
632 | {I_FIMUL, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\201", IF_8086|IF_FPU}, | |
633 | {-1} | |
634 | }; | |
635 | ||
636 | static struct itemplate instrux_FINCSTP[] = { | |
637 | {I_FINCSTP, 0, {0,0,0}, "\2\xD9\xF7", IF_8086|IF_FPU}, | |
638 | {-1} | |
639 | }; | |
640 | ||
641 | static struct itemplate instrux_FINIT[] = { | |
642 | {I_FINIT, 0, {0,0,0}, "\3\x9B\xDB\xE3", IF_8086|IF_FPU}, | |
643 | {-1} | |
644 | }; | |
645 | ||
646 | static struct itemplate instrux_FIST[] = { | |
647 | {I_FIST, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\202", IF_8086|IF_FPU}, | |
648 | {I_FIST, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\202", IF_8086|IF_FPU}, | |
649 | {-1} | |
650 | }; | |
651 | ||
652 | static struct itemplate instrux_FISTP[] = { | |
653 | {I_FISTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xDB\203", IF_8086|IF_FPU}, | |
654 | {I_FISTP, 1, {MEMORY|BITS16,0,0}, "\300\1\xDF\203", IF_8086|IF_FPU}, | |
655 | {I_FISTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDF\207", IF_8086|IF_FPU}, | |
656 | {-1} | |
657 | }; | |
658 | ||
659 | static struct itemplate instrux_FISUB[] = { | |
660 | {I_FISUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\204", IF_8086|IF_FPU}, | |
661 | {I_FISUB, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\204", IF_8086|IF_FPU}, | |
662 | {-1} | |
663 | }; | |
664 | ||
665 | static struct itemplate instrux_FISUBR[] = { | |
666 | {I_FISUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xDA\205", IF_8086|IF_FPU}, | |
667 | {I_FISUBR, 1, {MEMORY|BITS16,0,0}, "\300\1\xDE\205", IF_8086|IF_FPU}, | |
668 | {-1} | |
669 | }; | |
670 | ||
671 | static struct itemplate instrux_FLD[] = { | |
672 | {I_FLD, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\200", IF_8086|IF_FPU}, | |
673 | {I_FLD, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\200", IF_8086|IF_FPU}, | |
674 | {I_FLD, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\205", IF_8086|IF_FPU}, | |
675 | {I_FLD, 1, {FPUREG,0,0}, "\1\xD9\10\xC0", IF_8086|IF_FPU}, | |
676 | {-1} | |
677 | }; | |
678 | ||
679 | static struct itemplate instrux_FLD1[] = { | |
680 | {I_FLD1, 0, {0,0,0}, "\2\xD9\xE8", IF_8086|IF_FPU}, | |
681 | {-1} | |
682 | }; | |
683 | ||
684 | static struct itemplate instrux_FLDCW[] = { | |
685 | {I_FLDCW, 1, {MEMORY,0,0}, "\300\1\xD9\205", IF_8086|IF_FPU|IF_SW}, | |
686 | {-1} | |
687 | }; | |
688 | ||
689 | static struct itemplate instrux_FLDENV[] = { | |
690 | {I_FLDENV, 1, {MEMORY,0,0}, "\300\1\xD9\204", IF_8086|IF_FPU}, | |
691 | {-1} | |
692 | }; | |
693 | ||
694 | static struct itemplate instrux_FLDL2E[] = { | |
695 | {I_FLDL2E, 0, {0,0,0}, "\2\xD9\xEA", IF_8086|IF_FPU}, | |
696 | {-1} | |
697 | }; | |
698 | ||
699 | static struct itemplate instrux_FLDL2T[] = { | |
700 | {I_FLDL2T, 0, {0,0,0}, "\2\xD9\xE9", IF_8086|IF_FPU}, | |
701 | {-1} | |
702 | }; | |
703 | ||
704 | static struct itemplate instrux_FLDLG2[] = { | |
705 | {I_FLDLG2, 0, {0,0,0}, "\2\xD9\xEC", IF_8086|IF_FPU}, | |
706 | {-1} | |
707 | }; | |
708 | ||
709 | static struct itemplate instrux_FLDLN2[] = { | |
710 | {I_FLDLN2, 0, {0,0,0}, "\2\xD9\xED", IF_8086|IF_FPU}, | |
711 | {-1} | |
712 | }; | |
713 | ||
714 | static struct itemplate instrux_FLDPI[] = { | |
715 | {I_FLDPI, 0, {0,0,0}, "\2\xD9\xEB", IF_8086|IF_FPU}, | |
716 | {-1} | |
717 | }; | |
718 | ||
719 | static struct itemplate instrux_FLDZ[] = { | |
720 | {I_FLDZ, 0, {0,0,0}, "\2\xD9\xEE", IF_8086|IF_FPU}, | |
721 | {-1} | |
722 | }; | |
723 | ||
724 | static struct itemplate instrux_FMUL[] = { | |
725 | {I_FMUL, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\201", IF_8086|IF_FPU}, | |
726 | {I_FMUL, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\201", IF_8086|IF_FPU}, | |
727 | {I_FMUL, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU}, | |
728 | {I_FMUL, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xC8", IF_8086|IF_FPU}, | |
729 | {I_FMUL, 1, {FPUREG,0,0}, "\1\xD8\10\xC8", IF_8086|IF_FPU}, | |
730 | {I_FMUL, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xC8", IF_8086|IF_FPU}, | |
731 | {-1} | |
732 | }; | |
733 | ||
734 | static struct itemplate instrux_FMULP[] = { | |
735 | {I_FMULP, 1, {FPUREG,0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU}, | |
736 | {I_FMULP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xC8", IF_8086|IF_FPU}, | |
737 | {-1} | |
738 | }; | |
739 | ||
740 | static struct itemplate instrux_FNCLEX[] = { | |
741 | {I_FNCLEX, 0, {0,0,0}, "\2\xDB\xE2", IF_8086|IF_FPU}, | |
742 | {-1} | |
743 | }; | |
744 | ||
745 | static struct itemplate instrux_FNDISI[] = { | |
746 | {I_FNDISI, 0, {0,0,0}, "\2\xDB\xE1", IF_8086|IF_FPU}, | |
747 | {-1} | |
748 | }; | |
749 | ||
750 | static struct itemplate instrux_FNENI[] = { | |
751 | {I_FNENI, 0, {0,0,0}, "\2\xDB\xE0", IF_8086|IF_FPU}, | |
752 | {-1} | |
753 | }; | |
754 | ||
755 | static struct itemplate instrux_FNINIT[] = { | |
756 | {I_FNINIT, 0, {0,0,0}, "\2\xDB\xE3", IF_8086|IF_FPU}, | |
757 | {-1} | |
758 | }; | |
759 | ||
760 | static struct itemplate instrux_FNOP[] = { | |
761 | {I_FNOP, 0, {0,0,0}, "\2\xD9\xD0", IF_8086|IF_FPU}, | |
762 | {-1} | |
763 | }; | |
764 | ||
765 | static struct itemplate instrux_FNSAVE[] = { | |
766 | {I_FNSAVE, 1, {MEMORY,0,0}, "\300\1\xDD\206", IF_8086|IF_FPU}, | |
767 | {-1} | |
768 | }; | |
769 | ||
770 | static struct itemplate instrux_FNSTCW[] = { | |
771 | {I_FNSTCW, 1, {MEMORY,0,0}, "\300\1\xD9\207", IF_8086|IF_FPU|IF_SW}, | |
772 | {-1} | |
773 | }; | |
774 | ||
775 | static struct itemplate instrux_FNSTENV[] = { | |
776 | {I_FNSTENV, 1, {MEMORY,0,0}, "\300\1\xD9\206", IF_8086|IF_FPU}, | |
777 | {-1} | |
778 | }; | |
779 | ||
780 | static struct itemplate instrux_FNSTSW[] = { | |
781 | {I_FNSTSW, 1, {MEMORY,0,0}, "\300\1\xDD\207", IF_8086|IF_FPU|IF_SW}, | |
782 | {I_FNSTSW, 1, {REG_AX,0,0}, "\2\xDF\xE0", IF_286|IF_FPU}, | |
783 | {-1} | |
784 | }; | |
785 | ||
786 | static struct itemplate instrux_FPATAN[] = { | |
787 | {I_FPATAN, 0, {0,0,0}, "\2\xD9\xF3", IF_8086|IF_FPU}, | |
788 | {-1} | |
789 | }; | |
790 | ||
791 | static struct itemplate instrux_FPREM[] = { | |
792 | {I_FPREM, 0, {0,0,0}, "\2\xD9\xF8", IF_8086|IF_FPU}, | |
793 | {-1} | |
794 | }; | |
795 | ||
796 | static struct itemplate instrux_FPREM1[] = { | |
797 | {I_FPREM1, 0, {0,0,0}, "\2\xD9\xF5", IF_386|IF_FPU}, | |
798 | {-1} | |
799 | }; | |
800 | ||
801 | static struct itemplate instrux_FPTAN[] = { | |
802 | {I_FPTAN, 0, {0,0,0}, "\2\xD9\xF2", IF_8086|IF_FPU}, | |
803 | {-1} | |
804 | }; | |
805 | ||
806 | static struct itemplate instrux_FRNDINT[] = { | |
807 | {I_FRNDINT, 0, {0,0,0}, "\2\xD9\xFC", IF_8086|IF_FPU}, | |
808 | {-1} | |
809 | }; | |
810 | ||
811 | static struct itemplate instrux_FRSTOR[] = { | |
812 | {I_FRSTOR, 1, {MEMORY,0,0}, "\300\1\xDD\204", IF_8086|IF_FPU}, | |
813 | {-1} | |
814 | }; | |
815 | ||
816 | static struct itemplate instrux_FSAVE[] = { | |
817 | {I_FSAVE, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\206", IF_8086|IF_FPU}, | |
818 | {-1} | |
819 | }; | |
820 | ||
821 | static struct itemplate instrux_FSCALE[] = { | |
822 | {I_FSCALE, 0, {0,0,0}, "\2\xD9\xFD", IF_8086|IF_FPU}, | |
823 | {-1} | |
824 | }; | |
825 | ||
826 | static struct itemplate instrux_FSETPM[] = { | |
827 | {I_FSETPM, 0, {0,0,0}, "\2\xDB\xE4", IF_286|IF_FPU}, | |
828 | {-1} | |
829 | }; | |
830 | ||
831 | static struct itemplate instrux_FSIN[] = { | |
832 | {I_FSIN, 0, {0,0,0}, "\2\xD9\xFE", IF_386|IF_FPU}, | |
833 | {-1} | |
834 | }; | |
835 | ||
836 | static struct itemplate instrux_FSINCOS[] = { | |
837 | {I_FSINCOS, 0, {0,0,0}, "\2\xD9\xFB", IF_386|IF_FPU}, | |
838 | {-1} | |
839 | }; | |
840 | ||
841 | static struct itemplate instrux_FSQRT[] = { | |
842 | {I_FSQRT, 0, {0,0,0}, "\2\xD9\xFA", IF_8086|IF_FPU}, | |
843 | {-1} | |
844 | }; | |
845 | ||
846 | static struct itemplate instrux_FST[] = { | |
847 | {I_FST, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\202", IF_8086|IF_FPU}, | |
848 | {I_FST, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\202", IF_8086|IF_FPU}, | |
849 | {I_FST, 1, {FPUREG,0,0}, "\1\xDD\10\xD0", IF_8086|IF_FPU}, | |
850 | {-1} | |
851 | }; | |
852 | ||
853 | static struct itemplate instrux_FSTCW[] = { | |
854 | {I_FSTCW, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\207", IF_8086|IF_FPU|IF_SW}, | |
855 | {-1} | |
856 | }; | |
857 | ||
858 | static struct itemplate instrux_FSTENV[] = { | |
859 | {I_FSTENV, 1, {MEMORY,0,0}, "\300\2\x9B\xD9\206", IF_8086|IF_FPU}, | |
860 | {-1} | |
861 | }; | |
862 | ||
863 | static struct itemplate instrux_FSTP[] = { | |
864 | {I_FSTP, 1, {MEMORY|BITS32,0,0}, "\300\1\xD9\203", IF_8086|IF_FPU}, | |
865 | {I_FSTP, 1, {MEMORY|BITS64,0,0}, "\300\1\xDD\203", IF_8086|IF_FPU}, | |
866 | {I_FSTP, 1, {MEMORY|BITS80,0,0}, "\300\1\xDB\207", IF_8086|IF_FPU}, | |
867 | {I_FSTP, 1, {FPUREG,0,0}, "\1\xDD\10\xD8", IF_8086|IF_FPU}, | |
868 | {-1} | |
869 | }; | |
870 | ||
871 | static struct itemplate instrux_FSTSW[] = { | |
872 | {I_FSTSW, 1, {MEMORY,0,0}, "\300\2\x9B\xDD\207", IF_8086|IF_FPU|IF_SW}, | |
873 | {I_FSTSW, 1, {REG_AX,0,0}, "\3\x9B\xDF\xE0", IF_286|IF_FPU}, | |
874 | {-1} | |
875 | }; | |
876 | ||
877 | static struct itemplate instrux_FSUB[] = { | |
878 | {I_FSUB, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\204", IF_8086|IF_FPU}, | |
879 | {I_FSUB, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\204", IF_8086|IF_FPU}, | |
880 | {I_FSUB, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU}, | |
881 | {I_FSUB, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE8", IF_8086|IF_FPU}, | |
882 | {I_FSUB, 1, {FPUREG,0,0}, "\1\xD8\10\xE0", IF_8086|IF_FPU}, | |
883 | {I_FSUB, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE0", IF_8086|IF_FPU}, | |
884 | {-1} | |
885 | }; | |
886 | ||
887 | static struct itemplate instrux_FSUBP[] = { | |
888 | {I_FSUBP, 1, {FPUREG,0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU}, | |
889 | {I_FSUBP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE8", IF_8086|IF_FPU}, | |
890 | {-1} | |
891 | }; | |
892 | ||
893 | static struct itemplate instrux_FSUBR[] = { | |
894 | {I_FSUBR, 1, {MEMORY|BITS32,0,0}, "\300\1\xD8\205", IF_8086|IF_FPU}, | |
895 | {I_FSUBR, 1, {MEMORY|BITS64,0,0}, "\300\1\xDC\205", IF_8086|IF_FPU}, | |
896 | {I_FSUBR, 1, {FPUREG|TO,0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU}, | |
897 | {I_FSUBR, 2, {FPUREG,FPU0,0}, "\1\xDC\10\xE0", IF_8086|IF_FPU}, | |
898 | {I_FSUBR, 1, {FPUREG,0,0}, "\1\xD8\10\xE8", IF_8086|IF_FPU}, | |
899 | {I_FSUBR, 2, {FPU0,FPUREG,0}, "\1\xD8\11\xE8", IF_8086|IF_FPU}, | |
900 | {-1} | |
901 | }; | |
902 | ||
903 | static struct itemplate instrux_FSUBRP[] = { | |
904 | {I_FSUBRP, 1, {FPUREG,0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU}, | |
905 | {I_FSUBRP, 2, {FPUREG,FPU0,0}, "\1\xDE\10\xE0", IF_8086|IF_FPU}, | |
906 | {-1} | |
907 | }; | |
908 | ||
909 | static struct itemplate instrux_FTST[] = { | |
910 | {I_FTST, 0, {0,0,0}, "\2\xD9\xE4", IF_8086|IF_FPU}, | |
911 | {-1} | |
912 | }; | |
913 | ||
914 | static struct itemplate instrux_FUCOM[] = { | |
915 | {I_FUCOM, 1, {FPUREG,0,0}, "\1\xDD\10\xE0", IF_386|IF_FPU}, | |
916 | {I_FUCOM, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE0", IF_386|IF_FPU}, | |
917 | {-1} | |
918 | }; | |
919 | ||
920 | static struct itemplate instrux_FUCOMI[] = { | |
921 | {I_FUCOMI, 1, {FPUREG,0,0}, "\1\xDB\10\xE8", IF_P6|IF_FPU}, | |
922 | {I_FUCOMI, 2, {FPU0,FPUREG,0}, "\1\xDB\11\xE8", IF_P6|IF_FPU}, | |
923 | {-1} | |
924 | }; | |
925 | ||
926 | static struct itemplate instrux_FUCOMIP[] = { | |
927 | {I_FUCOMIP, 1, {FPUREG,0,0}, "\1\xDF\10\xE8", IF_P6|IF_FPU}, | |
928 | {I_FUCOMIP, 2, {FPU0,FPUREG,0}, "\1\xDF\11\xE8", IF_P6|IF_FPU}, | |
929 | {-1} | |
930 | }; | |
931 | ||
932 | static struct itemplate instrux_FUCOMP[] = { | |
933 | {I_FUCOMP, 1, {FPUREG,0,0}, "\1\xDD\10\xE8", IF_386|IF_FPU}, | |
934 | {I_FUCOMP, 2, {FPU0,FPUREG,0}, "\1\xDD\11\xE8", IF_386|IF_FPU}, | |
935 | {-1} | |
936 | }; | |
937 | ||
938 | static struct itemplate instrux_FUCOMPP[] = { | |
939 | {I_FUCOMPP, 0, {0,0,0}, "\2\xDA\xE9", IF_386|IF_FPU}, | |
940 | {-1} | |
941 | }; | |
942 | ||
943 | static struct itemplate instrux_FXAM[] = { | |
944 | {I_FXAM, 0, {0,0,0}, "\2\xD9\xE5", IF_8086|IF_FPU}, | |
945 | {-1} | |
946 | }; | |
947 | ||
948 | static struct itemplate instrux_FXCH[] = { | |
949 | {I_FXCH, 0, {0,0,0}, "\2\xD9\xC9", IF_8086|IF_FPU}, | |
950 | {I_FXCH, 1, {FPUREG,0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU}, | |
951 | {I_FXCH, 2, {FPUREG,FPU0,0}, "\1\xD9\10\xC8", IF_8086|IF_FPU}, | |
952 | {I_FXCH, 2, {FPU0,FPUREG,0}, "\1\xD9\11\xC8", IF_8086|IF_FPU}, | |
953 | {-1} | |
954 | }; | |
955 | ||
956 | static struct itemplate instrux_FXTRACT[] = { | |
957 | {I_FXTRACT, 0, {0,0,0}, "\2\xD9\xF4", IF_8086|IF_FPU}, | |
958 | {-1} | |
959 | }; | |
960 | ||
961 | static struct itemplate instrux_FYL2X[] = { | |
962 | {I_FYL2X, 0, {0,0,0}, "\2\xD9\xF1", IF_8086|IF_FPU}, | |
963 | {-1} | |
964 | }; | |
965 | ||
966 | static struct itemplate instrux_FYL2XP1[] = { | |
967 | {I_FYL2XP1, 0, {0,0,0}, "\2\xD9\xF9", IF_8086|IF_FPU}, | |
968 | {-1} | |
969 | }; | |
970 | ||
971 | static struct itemplate instrux_HLT[] = { | |
972 | {I_HLT, 0, {0,0,0}, "\1\xF4", IF_8086}, | |
973 | {-1} | |
974 | }; | |
975 | ||
976 | static struct itemplate instrux_IBTS[] = { | |
977 | {I_IBTS, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xA7\101", IF_386|IF_SW|IF_UNDOC}, | |
978 | {I_IBTS, 2, {REG16,REG16,0}, "\320\300\2\x0F\xA7\101", IF_386|IF_UNDOC}, | |
979 | {I_IBTS, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xA7\101", IF_386|IF_SD|IF_UNDOC}, | |
980 | {I_IBTS, 2, {REG32,REG32,0}, "\321\300\2\x0F\xA7\101", IF_386|IF_UNDOC}, | |
981 | {-1} | |
982 | }; | |
983 | ||
984 | static struct itemplate instrux_ICEBP[] = { | |
985 | {I_ICEBP, 0, {0,0,0}, "\1\xF1", IF_P6}, | |
986 | {-1} | |
987 | }; | |
988 | ||
989 | static struct itemplate instrux_IDIV[] = { | |
990 | {I_IDIV, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\207", IF_8086}, | |
991 | {I_IDIV, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\207", IF_8086}, | |
992 | {I_IDIV, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\207", IF_386}, | |
993 | {-1} | |
994 | }; | |
995 | ||
996 | static struct itemplate instrux_IMUL[] = { | |
997 | {I_IMUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\205", IF_8086}, | |
998 | {I_IMUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\205", IF_8086}, | |
999 | {I_IMUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\205", IF_386}, | |
1000 | {I_IMUL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xAF\110", IF_386|IF_SM}, | |
1001 | {I_IMUL, 2, {REG16,REG16,0}, "\320\301\2\x0F\xAF\110", IF_386}, | |
1002 | {I_IMUL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xAF\110", IF_386|IF_SM}, | |
1003 | {I_IMUL, 2, {REG32,REG32,0}, "\321\301\2\x0F\xAF\110", IF_386}, | |
1004 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE|BITS8}, "\320\301\1\x6B\110\16", IF_286|IF_SM}, | |
1005 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE|BITS8}, "\320\301\1\x6B\110\16", IF_286}, | |
1006 | {I_IMUL, 3, {REG16,MEMORY,IMMEDIATE}, "\320\301\1\x69\110\32", IF_286|IF_SM}, | |
1007 | {I_IMUL, 3, {REG16,REG16,IMMEDIATE}, "\320\301\1\x69\110\32", IF_286|IF_SM}, | |
1008 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE|BITS8}, "\321\301\1\x6B\110\16", IF_386|IF_SM}, | |
1009 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE|BITS8}, "\321\301\1\x6B\110\16", IF_386}, | |
1010 | {I_IMUL, 3, {REG32,MEMORY,IMMEDIATE}, "\321\301\1\x69\110\42", IF_386|IF_SM}, | |
1011 | {I_IMUL, 3, {REG32,REG32,IMMEDIATE}, "\321\301\1\x69\110\42", IF_386|IF_SM}, | |
1012 | {I_IMUL, 2, {REG16,IMMEDIATE|BITS8,0}, "\320\1\x6B\100\15", IF_286}, | |
1013 | {I_IMUL, 2, {REG16,IMMEDIATE,0}, "\320\1\x69\100\31", IF_286|IF_SM}, | |
1014 | {I_IMUL, 2, {REG32,IMMEDIATE|BITS8,0}, "\321\1\x6B\100\15", IF_386}, | |
1015 | {I_IMUL, 2, {REG32,IMMEDIATE,0}, "\321\1\x69\100\41", IF_386|IF_SM}, | |
1016 | {-1} | |
1017 | }; | |
1018 | ||
1019 | static struct itemplate instrux_IN[] = { | |
1020 | {I_IN, 2, {REG_AL,IMMEDIATE,0}, "\1\xE4\25", IF_8086}, | |
1021 | {I_IN, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xE5\25", IF_8086}, | |
1022 | {I_IN, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xE5\25", IF_386}, | |
1023 | {I_IN, 2, {REG_AL,REG_DX,0}, "\1\xEC", IF_8086}, | |
1024 | {I_IN, 2, {REG_AX,REG_DX,0}, "\320\1\xED", IF_8086}, | |
1025 | {I_IN, 2, {REG_EAX,REG_DX,0}, "\321\1\xED", IF_386}, | |
1026 | {-1} | |
1027 | }; | |
1028 | ||
1029 | static struct itemplate instrux_INC[] = { | |
1030 | {I_INC, 1, {REG16,0,0}, "\320\10\x40", IF_8086}, | |
1031 | {I_INC, 1, {REG32,0,0}, "\321\10\x40", IF_386}, | |
1032 | {I_INC, 1, {REGMEM|BITS8,0,0}, "\300\1\xFE\200", IF_8086}, | |
1033 | {I_INC, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\200", IF_8086}, | |
1034 | {I_INC, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\200", IF_386}, | |
1035 | {-1} | |
1036 | }; | |
1037 | ||
1038 | static struct itemplate instrux_INCBIN[] = { | |
1039 | {-1} | |
1040 | }; | |
1041 | ||
1042 | static struct itemplate instrux_INSB[] = { | |
1043 | {I_INSB, 0, {0,0,0}, "\1\x6C", IF_186}, | |
1044 | {-1} | |
1045 | }; | |
1046 | ||
1047 | static struct itemplate instrux_INSD[] = { | |
1048 | {I_INSD, 0, {0,0,0}, "\321\1\x6D", IF_386}, | |
1049 | {-1} | |
1050 | }; | |
1051 | ||
1052 | static struct itemplate instrux_INSW[] = { | |
1053 | {I_INSW, 0, {0,0,0}, "\320\1\x6D", IF_186}, | |
1054 | {-1} | |
1055 | }; | |
1056 | ||
1057 | static struct itemplate instrux_INT[] = { | |
1058 | {I_INT, 1, {IMMEDIATE,0,0}, "\1\xCD\24", IF_8086}, | |
1059 | {-1} | |
1060 | }; | |
1061 | ||
1062 | static struct itemplate instrux_INT01[] = { | |
1063 | {I_INT01, 0, {0,0,0}, "\1\xF1", IF_P6}, | |
1064 | {-1} | |
1065 | }; | |
1066 | ||
1067 | static struct itemplate instrux_INT1[] = { | |
1068 | {I_INT1, 0, {0,0,0}, "\1\xF1", IF_P6}, | |
1069 | {-1} | |
1070 | }; | |
1071 | ||
1072 | static struct itemplate instrux_INT3[] = { | |
1073 | {I_INT3, 0, {0,0,0}, "\1\xCC", IF_8086}, | |
1074 | {-1} | |
1075 | }; | |
1076 | ||
1077 | static struct itemplate instrux_INTO[] = { | |
1078 | {I_INTO, 0, {0,0,0}, "\1\xCE", IF_8086}, | |
1079 | {-1} | |
1080 | }; | |
1081 | ||
1082 | static struct itemplate instrux_INVD[] = { | |
1083 | {I_INVD, 0, {0,0,0}, "\2\x0F\x08", IF_486}, | |
1084 | {-1} | |
1085 | }; | |
1086 | ||
1087 | static struct itemplate instrux_INVLPG[] = { | |
1088 | {I_INVLPG, 1, {MEMORY,0,0}, "\300\2\x0F\x01\207", IF_486}, | |
1089 | {-1} | |
1090 | }; | |
1091 | ||
1092 | static struct itemplate instrux_IRET[] = { | |
1093 | {I_IRET, 0, {0,0,0}, "\322\1\xCF", IF_8086}, | |
1094 | {-1} | |
1095 | }; | |
1096 | ||
1097 | static struct itemplate instrux_IRETD[] = { | |
1098 | {I_IRETD, 0, {0,0,0}, "\321\1\xCF", IF_386}, | |
1099 | {-1} | |
1100 | }; | |
1101 | ||
1102 | static struct itemplate instrux_IRETW[] = { | |
1103 | {I_IRETW, 0, {0,0,0}, "\320\1\xCF", IF_8086}, | |
1104 | {-1} | |
1105 | }; | |
1106 | ||
1107 | static struct itemplate instrux_JCXZ[] = { | |
1108 | {I_JCXZ, 1, {IMMEDIATE,0,0}, "\320\1\xE3\50", IF_8086}, | |
1109 | {-1} | |
1110 | }; | |
1111 | ||
1112 | static struct itemplate instrux_JECXZ[] = { | |
1113 | {I_JECXZ, 1, {IMMEDIATE,0,0}, "\321\1\xE3\50", IF_386}, | |
1114 | {-1} | |
1115 | }; | |
1116 | ||
1117 | static struct itemplate instrux_JMP[] = { | |
1118 | {I_JMP, 1, {IMMEDIATE|SHORT,0,0}, "\1\xEB\50", IF_8086}, | |
1119 | {I_JMP, 1, {IMMEDIATE,0,0}, "\322\1\xE9\64", IF_8086}, | |
1120 | {I_JMP, 1, {IMMEDIATE|FAR,0,0}, "\322\1\xEA\34\37", IF_8086}, | |
1121 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0}, "\322\1\xEA\35\30", IF_8086}, | |
1122 | {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0}, "\320\1\xEA\31\30", IF_8086}, | |
1123 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0}, "\320\1\xEA\31\30", IF_8086}, | |
1124 | {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0}, "\321\1\xEA\41\30", IF_386}, | |
1125 | {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0}, "\321\1\xEA\41\30", IF_386}, | |
1126 | {I_JMP, 1, {MEMORY|FAR,0,0}, "\322\300\1\xFF\205", IF_8086}, | |
1127 | {I_JMP, 1, {MEMORY|BITS16|FAR,0,0}, "\320\300\1\xFF\205", IF_8086}, | |
1128 | {I_JMP, 1, {MEMORY|BITS32|FAR,0,0}, "\321\300\1\xFF\205", IF_386}, | |
1129 | {I_JMP, 1, {MEMORY|NEAR,0,0}, "\322\300\1\xFF\204", IF_8086}, | |
1130 | {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0}, "\320\300\1\xFF\204", IF_8086}, | |
1131 | {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0}, "\321\300\1\xFF\204", IF_386}, | |
1132 | {I_JMP, 1, {REG16,0,0}, "\320\300\1\xFF\204", IF_8086}, | |
1133 | {I_JMP, 1, {REG32,0,0}, "\321\300\1\xFF\204", IF_386}, | |
1134 | {I_JMP, 1, {MEMORY,0,0}, "\322\300\1\xFF\204", IF_8086}, | |
1135 | {I_JMP, 1, {MEMORY|BITS16,0,0}, "\320\300\1\xFF\204", IF_8086}, | |
1136 | {I_JMP, 1, {MEMORY|BITS32,0,0}, "\321\300\1\xFF\204", IF_386}, | |
1137 | {-1} | |
1138 | }; | |
1139 | ||
1140 | static struct itemplate instrux_LAHF[] = { | |
1141 | {I_LAHF, 0, {0,0,0}, "\1\x9F", IF_8086}, | |
1142 | {-1} | |
1143 | }; | |
1144 | ||
1145 | static struct itemplate instrux_LAR[] = { | |
1146 | {I_LAR, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x02\110", IF_286|IF_PRIV|IF_SM}, | |
1147 | {I_LAR, 2, {REG16,REG16,0}, "\320\301\2\x0F\x02\110", IF_286|IF_PRIV}, | |
1148 | {I_LAR, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x02\110", IF_286|IF_PRIV|IF_SM}, | |
1149 | {I_LAR, 2, {REG32,REG32,0}, "\321\301\2\x0F\x02\110", IF_286|IF_PRIV}, | |
1150 | {-1} | |
1151 | }; | |
1152 | ||
1153 | static struct itemplate instrux_LDS[] = { | |
1154 | {I_LDS, 2, {REG16,MEMORY,0}, "\320\301\1\xC5\110", IF_8086}, | |
1155 | {I_LDS, 2, {REG32,MEMORY,0}, "\321\301\1\xC5\110", IF_8086}, | |
1156 | {-1} | |
1157 | }; | |
1158 | ||
1159 | static struct itemplate instrux_LEA[] = { | |
1160 | {I_LEA, 2, {REG16,MEMORY,0}, "\320\301\1\x8D\110", IF_8086}, | |
1161 | {I_LEA, 2, {REG32,MEMORY,0}, "\321\301\1\x8D\110", IF_8086}, | |
1162 | {-1} | |
1163 | }; | |
1164 | ||
1165 | static struct itemplate instrux_LEAVE[] = { | |
1166 | {I_LEAVE, 0, {0,0,0}, "\1\xC9", IF_186}, | |
1167 | {-1} | |
1168 | }; | |
1169 | ||
1170 | static struct itemplate instrux_LES[] = { | |
1171 | {I_LES, 2, {REG16,MEMORY,0}, "\320\301\1\xC4\110", IF_8086}, | |
1172 | {I_LES, 2, {REG32,MEMORY,0}, "\321\301\1\xC4\110", IF_8086}, | |
1173 | {-1} | |
1174 | }; | |
1175 | ||
1176 | static struct itemplate instrux_LFS[] = { | |
1177 | {I_LFS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB4\110", IF_386}, | |
1178 | {I_LFS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB4\110", IF_386}, | |
1179 | {-1} | |
1180 | }; | |
1181 | ||
1182 | static struct itemplate instrux_LGDT[] = { | |
1183 | {I_LGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\202", IF_286|IF_PRIV}, | |
1184 | {-1} | |
1185 | }; | |
1186 | ||
1187 | static struct itemplate instrux_LGS[] = { | |
1188 | {I_LGS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB5\110", IF_386}, | |
1189 | {I_LGS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB5\110", IF_386}, | |
1190 | {-1} | |
1191 | }; | |
1192 | ||
1193 | static struct itemplate instrux_LIDT[] = { | |
1194 | {I_LIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\203", IF_286|IF_PRIV}, | |
1195 | {-1} | |
1196 | }; | |
1197 | ||
1198 | static struct itemplate instrux_LLDT[] = { | |
1199 | {I_LLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\202", IF_286|IF_PRIV}, | |
1200 | {I_LLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\202", IF_286|IF_PRIV}, | |
1201 | {I_LLDT, 1, {REG16,0,0}, "\300\1\x0F\17\202", IF_286|IF_PRIV}, | |
1202 | {-1} | |
1203 | }; | |
1204 | ||
1205 | static struct itemplate instrux_LMSW[] = { | |
1206 | {I_LMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV}, | |
1207 | {I_LMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV}, | |
1208 | {I_LMSW, 1, {REG16,0,0}, "\300\2\x0F\x01\206", IF_286|IF_PRIV}, | |
1209 | {-1} | |
1210 | }; | |
1211 | ||
1212 | static struct itemplate instrux_LOADALL[] = { | |
1213 | {I_LOADALL, 0, {0,0,0}, "\2\x0F\x07", IF_386|IF_UNDOC}, | |
1214 | {-1} | |
1215 | }; | |
1216 | ||
1217 | static struct itemplate instrux_LOADALL286[] = { | |
1218 | {I_LOADALL286, 0, {0,0,0}, "\2\x0F\x05", IF_286|IF_UNDOC}, | |
1219 | {-1} | |
1220 | }; | |
1221 | ||
1222 | static struct itemplate instrux_LODSB[] = { | |
1223 | {I_LODSB, 0, {0,0,0}, "\1\xAC", IF_8086}, | |
1224 | {-1} | |
1225 | }; | |
1226 | ||
1227 | static struct itemplate instrux_LODSD[] = { | |
1228 | {I_LODSD, 0, {0,0,0}, "\321\1\xAD", IF_386}, | |
1229 | {-1} | |
1230 | }; | |
1231 | ||
1232 | static struct itemplate instrux_LODSW[] = { | |
1233 | {I_LODSW, 0, {0,0,0}, "\320\1\xAD", IF_8086}, | |
1234 | {-1} | |
1235 | }; | |
1236 | ||
1237 | static struct itemplate instrux_LOOP[] = { | |
1238 | {I_LOOP, 1, {IMMEDIATE,0,0}, "\312\1\xE2\50", IF_8086}, | |
1239 | {I_LOOP, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE2\50", IF_8086}, | |
1240 | {I_LOOP, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE2\50", IF_386}, | |
1241 | {-1} | |
1242 | }; | |
1243 | ||
1244 | static struct itemplate instrux_LOOPE[] = { | |
1245 | {I_LOOPE, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086}, | |
1246 | {I_LOOPE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086}, | |
1247 | {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386}, | |
1248 | {-1} | |
1249 | }; | |
1250 | ||
1251 | static struct itemplate instrux_LOOPNE[] = { | |
1252 | {I_LOOPNE, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086}, | |
1253 | {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086}, | |
1254 | {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386}, | |
1255 | {-1} | |
1256 | }; | |
1257 | ||
1258 | static struct itemplate instrux_LOOPNZ[] = { | |
1259 | {I_LOOPNZ, 1, {IMMEDIATE,0,0}, "\312\1\xE0\50", IF_8086}, | |
1260 | {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE0\50", IF_8086}, | |
1261 | {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE0\50", IF_386}, | |
1262 | {-1} | |
1263 | }; | |
1264 | ||
1265 | static struct itemplate instrux_LOOPZ[] = { | |
1266 | {I_LOOPZ, 1, {IMMEDIATE,0,0}, "\312\1\xE1\50", IF_8086}, | |
1267 | {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0}, "\310\1\xE1\50", IF_8086}, | |
1268 | {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0}, "\311\1\xE1\50", IF_386}, | |
1269 | {-1} | |
1270 | }; | |
1271 | ||
1272 | static struct itemplate instrux_LSL[] = { | |
1273 | {I_LSL, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x03\110", IF_286|IF_PRIV|IF_SM}, | |
1274 | {I_LSL, 2, {REG16,REG16,0}, "\320\301\2\x0F\x03\110", IF_286|IF_PRIV}, | |
1275 | {I_LSL, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x03\110", IF_286|IF_PRIV|IF_SM}, | |
1276 | {I_LSL, 2, {REG32,REG32,0}, "\321\301\2\x0F\x03\110", IF_286|IF_PRIV}, | |
1277 | {-1} | |
1278 | }; | |
1279 | ||
1280 | static struct itemplate instrux_LSS[] = { | |
1281 | {I_LSS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB2\110", IF_386}, | |
1282 | {I_LSS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xB2\110", IF_386}, | |
1283 | {-1} | |
1284 | }; | |
1285 | ||
1286 | static struct itemplate instrux_LTR[] = { | |
1287 | {I_LTR, 1, {MEMORY,0,0}, "\300\1\x0F\17\203", IF_286|IF_PRIV}, | |
1288 | {I_LTR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\203", IF_286|IF_PRIV}, | |
1289 | {I_LTR, 1, {REG16,0,0}, "\300\1\x0F\17\203", IF_286|IF_PRIV}, | |
1290 | {-1} | |
1291 | }; | |
1292 | ||
1293 | static struct itemplate instrux_MOV[] = { | |
1294 | {I_MOV, 2, {MEMORY,REG_CS,0}, "\320\300\1\x8C\201", IF_8086|IF_SM}, | |
1295 | {I_MOV, 2, {MEMORY,REG_DESS,0}, "\320\300\1\x8C\101", IF_8086|IF_SM}, | |
1296 | {I_MOV, 2, {MEMORY,REG_FSGS,0}, "\320\300\1\x8C\101", IF_386|IF_SM}, | |
1297 | {I_MOV, 2, {REG16,REG_CS,0}, "\320\300\1\x8C\201", IF_8086}, | |
1298 | {I_MOV, 2, {REG16,REG_DESS,0}, "\320\300\1\x8C\101", IF_8086}, | |
1299 | {I_MOV, 2, {REG16,REG_FSGS,0}, "\320\300\1\x8C\101", IF_386}, | |
1300 | {I_MOV, 2, {REGMEM|BITS32,REG_CS,0}, "\321\300\1\x8C\201", IF_8086}, | |
1301 | {I_MOV, 2, {REGMEM|BITS32,REG_DESS,0}, "\321\300\1\x8C\101", IF_8086}, | |
1302 | {I_MOV, 2, {REGMEM|BITS32,REG_FSGS,0}, "\321\300\1\x8C\101", IF_386}, | |
1303 | {I_MOV, 2, {REG_DESS,MEMORY,0}, "\320\301\1\x8E\110", IF_8086|IF_SM}, | |
1304 | {I_MOV, 2, {REG_FSGS,MEMORY,0}, "\320\301\1\x8E\110", IF_386|IF_SM}, | |
1305 | {I_MOV, 2, {REG_DESS,REG16,0}, "\320\301\1\x8E\110", IF_8086}, | |
1306 | {I_MOV, 2, {REG_FSGS,REG16,0}, "\320\301\1\x8E\110", IF_386}, | |
1307 | {I_MOV, 2, {REG_DESS,REGMEM|BITS32,0}, "\321\301\1\x8E\110", IF_8086}, | |
1308 | {I_MOV, 2, {REG_FSGS,REGMEM|BITS32,0}, "\321\301\1\x8E\110", IF_386}, | |
1309 | {I_MOV, 2, {REG_AL,MEM_OFFS,0}, "\301\1\xA0\35", IF_8086|IF_SM}, | |
1310 | {I_MOV, 2, {REG_AX,MEM_OFFS,0}, "\301\320\1\xA1\35", IF_8086|IF_SM}, | |
1311 | {I_MOV, 2, {REG_EAX,MEM_OFFS,0}, "\301\321\1\xA1\35", IF_386|IF_SM}, | |
1312 | {I_MOV, 2, {MEM_OFFS,REG_AL,0}, "\300\1\xA2\34", IF_8086|IF_SM}, | |
1313 | {I_MOV, 2, {MEM_OFFS,REG_AX,0}, "\300\320\1\xA3\34", IF_8086|IF_SM}, | |
1314 | {I_MOV, 2, {MEM_OFFS,REG_EAX,0}, "\300\321\1\xA3\34", IF_386|IF_SM}, | |
1315 | {I_MOV, 2, {REG32,REG_CR4,0}, "\2\x0F\x20\204", IF_PENT}, | |
1316 | {I_MOV, 2, {REG32,REG_CREG,0}, "\2\x0F\x20\101", IF_386}, | |
1317 | {I_MOV, 2, {REG32,REG_DREG,0}, "\2\x0F\x21\101", IF_386}, | |
1318 | {I_MOV, 2, {REG32,REG_TREG,0}, "\2\x0F\x24\101", IF_386}, | |
1319 | {I_MOV, 2, {REG_CR4,REG32,0}, "\2\x0F\x22\214", IF_PENT}, | |
1320 | {I_MOV, 2, {REG_CREG,REG32,0}, "\2\x0F\x22\110", IF_386}, | |
1321 | {I_MOV, 2, {REG_DREG,REG32,0}, "\2\x0F\x23\110", IF_386}, | |
1322 | {I_MOV, 2, {REG_TREG,REG32,0}, "\2\x0F\x26\110", IF_386}, | |
1323 | {I_MOV, 2, {MEMORY,REG8,0}, "\300\1\x88\101", IF_8086|IF_SM}, | |
1324 | {I_MOV, 2, {REG8,REG8,0}, "\300\1\x88\101", IF_8086}, | |
1325 | {I_MOV, 2, {MEMORY,REG16,0}, "\320\300\1\x89\101", IF_8086|IF_SM}, | |
1326 | {I_MOV, 2, {REG16,REG16,0}, "\320\300\1\x89\101", IF_8086}, | |
1327 | {I_MOV, 2, {MEMORY,REG32,0}, "\321\300\1\x89\101", IF_386|IF_SM}, | |
1328 | {I_MOV, 2, {REG32,REG32,0}, "\321\300\1\x89\101", IF_386}, | |
1329 | {I_MOV, 2, {REG8,MEMORY,0}, "\301\1\x8A\110", IF_8086|IF_SM}, | |
1330 | {I_MOV, 2, {REG8,REG8,0}, "\301\1\x8A\110", IF_8086}, | |
1331 | {I_MOV, 2, {REG16,MEMORY,0}, "\320\301\1\x8B\110", IF_8086|IF_SM}, | |
1332 | {I_MOV, 2, {REG16,REG16,0}, "\320\301\1\x8B\110", IF_8086}, | |
1333 | {I_MOV, 2, {REG32,MEMORY,0}, "\321\301\1\x8B\110", IF_386|IF_SM}, | |
1334 | {I_MOV, 2, {REG32,REG32,0}, "\321\301\1\x8B\110", IF_386}, | |
1335 | {I_MOV, 2, {REG8,IMMEDIATE,0}, "\10\xB0\21", IF_8086|IF_SM}, | |
1336 | {I_MOV, 2, {REG16,IMMEDIATE,0}, "\320\10\xB8\31", IF_8086|IF_SM}, | |
1337 | {I_MOV, 2, {REG32,IMMEDIATE,0}, "\321\10\xB8\41", IF_386|IF_SM}, | |
1338 | {I_MOV, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC6\200\21", IF_8086|IF_SM}, | |
1339 | {I_MOV, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM}, | |
1340 | {I_MOV, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM}, | |
1341 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xC6\200\21", IF_8086|IF_SM}, | |
1342 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xC7\200\31", IF_8086|IF_SM}, | |
1343 | {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xC7\200\41", IF_386|IF_SM}, | |
1344 | {-1} | |
1345 | }; | |
1346 | ||
1347 | static struct itemplate instrux_MOVD[] = { | |
1348 | {I_MOVD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6E\110", IF_PENT|IF_MMX|IF_SD}, | |
1349 | {I_MOVD, 2, {MMXREG,REG32,0}, "\2\x0F\x6E\110", IF_PENT|IF_MMX}, | |
1350 | {I_MOVD, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7E\101", IF_PENT|IF_MMX|IF_SD}, | |
1351 | {I_MOVD, 2, {REG32,MMXREG,0}, "\2\x0F\x7E\101", IF_PENT|IF_MMX}, | |
1352 | {-1} | |
1353 | }; | |
1354 | ||
1355 | static struct itemplate instrux_MOVQ[] = { | |
1356 | {I_MOVQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6F\110", IF_PENT|IF_MMX|IF_SM}, | |
1357 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6F\110", IF_PENT|IF_MMX}, | |
1358 | {I_MOVQ, 2, {MEMORY,MMXREG,0}, "\300\2\x0F\x7F\101", IF_PENT|IF_MMX|IF_SM}, | |
1359 | {I_MOVQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x7F\101", IF_PENT|IF_MMX}, | |
1360 | {-1} | |
1361 | }; | |
1362 | ||
1363 | static struct itemplate instrux_MOVSB[] = { | |
1364 | {I_MOVSB, 0, {0,0,0}, "\1\xA4", IF_8086}, | |
1365 | {-1} | |
1366 | }; | |
1367 | ||
1368 | static struct itemplate instrux_MOVSD[] = { | |
1369 | {I_MOVSD, 0, {0,0,0}, "\321\1\xA5", IF_386}, | |
1370 | {-1} | |
1371 | }; | |
1372 | ||
1373 | static struct itemplate instrux_MOVSW[] = { | |
1374 | {I_MOVSW, 0, {0,0,0}, "\320\1\xA5", IF_8086}, | |
1375 | {-1} | |
1376 | }; | |
1377 | ||
1378 | static struct itemplate instrux_MOVSX[] = { | |
1379 | {I_MOVSX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xBE\110", IF_386|IF_SB}, | |
1380 | {I_MOVSX, 2, {REG16,REG8,0}, "\320\301\2\x0F\xBE\110", IF_386}, | |
1381 | {I_MOVSX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xBE\110", IF_386}, | |
1382 | {I_MOVSX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xBF\110", IF_386}, | |
1383 | {-1} | |
1384 | }; | |
1385 | ||
1386 | static struct itemplate instrux_MOVZX[] = { | |
1387 | {I_MOVZX, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xB6\110", IF_386|IF_SB}, | |
1388 | {I_MOVZX, 2, {REG16,REG8,0}, "\320\301\2\x0F\xB6\110", IF_386}, | |
1389 | {I_MOVZX, 2, {REG32,REGMEM|BITS8,0}, "\321\301\2\x0F\xB6\110", IF_386}, | |
1390 | {I_MOVZX, 2, {REG32,REGMEM|BITS16,0}, "\321\301\2\x0F\xB7\110", IF_386}, | |
1391 | {-1} | |
1392 | }; | |
1393 | ||
1394 | static struct itemplate instrux_MUL[] = { | |
1395 | {I_MUL, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\204", IF_8086}, | |
1396 | {I_MUL, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\204", IF_8086}, | |
1397 | {I_MUL, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\204", IF_386}, | |
1398 | {-1} | |
1399 | }; | |
1400 | ||
1401 | static struct itemplate instrux_NEG[] = { | |
1402 | {I_NEG, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\203", IF_8086}, | |
1403 | {I_NEG, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\203", IF_8086}, | |
1404 | {I_NEG, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\203", IF_386}, | |
1405 | {-1} | |
1406 | }; | |
1407 | ||
1408 | static struct itemplate instrux_NOP[] = { | |
1409 | {I_NOP, 0, {0,0,0}, "\1\x90", IF_8086}, | |
1410 | {-1} | |
1411 | }; | |
1412 | ||
1413 | static struct itemplate instrux_NOT[] = { | |
1414 | {I_NOT, 1, {REGMEM|BITS8,0,0}, "\300\1\xF6\202", IF_8086}, | |
1415 | {I_NOT, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xF7\202", IF_8086}, | |
1416 | {I_NOT, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xF7\202", IF_386}, | |
1417 | {-1} | |
1418 | }; | |
1419 | ||
1420 | static struct itemplate instrux_OR[] = { | |
1421 | {I_OR, 2, {MEMORY,REG8,0}, "\300\1\x08\101", IF_8086|IF_SM}, | |
1422 | {I_OR, 2, {REG8,REG8,0}, "\300\1\x08\101", IF_8086}, | |
1423 | {I_OR, 2, {MEMORY,REG16,0}, "\320\300\1\x09\101", IF_8086|IF_SM}, | |
1424 | {I_OR, 2, {REG16,REG16,0}, "\320\300\1\x09\101", IF_8086}, | |
1425 | {I_OR, 2, {MEMORY,REG32,0}, "\321\300\1\x09\101", IF_386|IF_SM}, | |
1426 | {I_OR, 2, {REG32,REG32,0}, "\321\300\1\x09\101", IF_386}, | |
1427 | {I_OR, 2, {REG8,MEMORY,0}, "\301\1\x0A\110", IF_8086|IF_SM}, | |
1428 | {I_OR, 2, {REG8,REG8,0}, "\301\1\x0A\110", IF_8086}, | |
1429 | {I_OR, 2, {REG16,MEMORY,0}, "\320\301\1\x0B\110", IF_8086|IF_SM}, | |
1430 | {I_OR, 2, {REG16,REG16,0}, "\320\301\1\x0B\110", IF_8086}, | |
1431 | {I_OR, 2, {REG32,MEMORY,0}, "\321\301\1\x0B\110", IF_386|IF_SM}, | |
1432 | {I_OR, 2, {REG32,REG32,0}, "\321\301\1\x0B\110", IF_386}, | |
1433 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\201\15", IF_8086}, | |
1434 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\201\15", IF_386}, | |
1435 | {I_OR, 2, {REG_AL,IMMEDIATE,0}, "\1\x0C\21", IF_8086|IF_SM}, | |
1436 | {I_OR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x0D\31", IF_8086|IF_SM}, | |
1437 | {I_OR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x0D\41", IF_386|IF_SM}, | |
1438 | {I_OR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\201\21", IF_8086|IF_SM}, | |
1439 | {I_OR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\201\31", IF_8086|IF_SM}, | |
1440 | {I_OR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\201\41", IF_386|IF_SM}, | |
1441 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\201\21", IF_8086|IF_SM}, | |
1442 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\201\31", IF_8086|IF_SM}, | |
1443 | {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\201\41", IF_386|IF_SM}, | |
1444 | {-1} | |
1445 | }; | |
1446 | ||
1447 | static struct itemplate instrux_OUT[] = { | |
1448 | {I_OUT, 2, {IMMEDIATE,REG_AL,0}, "\1\xE6\24", IF_8086}, | |
1449 | {I_OUT, 2, {IMMEDIATE,REG_AX,0}, "\320\1\xE7\24", IF_8086}, | |
1450 | {I_OUT, 2, {IMMEDIATE,REG_EAX,0}, "\321\1\xE7\24", IF_386}, | |
1451 | {I_OUT, 2, {REG_DX,REG_AL,0}, "\1\xEE", IF_8086}, | |
1452 | {I_OUT, 2, {REG_DX,REG_AX,0}, "\320\1\xEF", IF_8086}, | |
1453 | {I_OUT, 2, {REG_DX,REG_EAX,0}, "\321\1\xEF", IF_386}, | |
1454 | {-1} | |
1455 | }; | |
1456 | ||
1457 | static struct itemplate instrux_OUTSB[] = { | |
1458 | {I_OUTSB, 0, {0,0,0}, "\1\x6E", IF_186}, | |
1459 | {-1} | |
1460 | }; | |
1461 | ||
1462 | static struct itemplate instrux_OUTSD[] = { | |
1463 | {I_OUTSD, 0, {0,0,0}, "\321\1\x6F", IF_386}, | |
1464 | {-1} | |
1465 | }; | |
1466 | ||
1467 | static struct itemplate instrux_OUTSW[] = { | |
1468 | {I_OUTSW, 0, {0,0,0}, "\320\1\x6F", IF_186}, | |
1469 | {-1} | |
1470 | }; | |
1471 | ||
1472 | static struct itemplate instrux_PACKSSDW[] = { | |
1473 | {I_PACKSSDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6B\110", IF_PENT|IF_MMX|IF_SM}, | |
1474 | {I_PACKSSDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6B\110", IF_PENT|IF_MMX}, | |
1475 | {-1} | |
1476 | }; | |
1477 | ||
1478 | static struct itemplate instrux_PACKSSWB[] = { | |
1479 | {I_PACKSSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x63\110", IF_PENT|IF_MMX|IF_SM}, | |
1480 | {I_PACKSSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x63\110", IF_PENT|IF_MMX}, | |
1481 | {-1} | |
1482 | }; | |
1483 | ||
1484 | static struct itemplate instrux_PACKUSWB[] = { | |
1485 | {I_PACKUSWB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x67\110", IF_PENT|IF_MMX|IF_SM}, | |
1486 | {I_PACKUSWB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x67\110", IF_PENT|IF_MMX}, | |
1487 | {-1} | |
1488 | }; | |
1489 | ||
1490 | static struct itemplate instrux_PADDB[] = { | |
1491 | {I_PADDB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFC\110", IF_PENT|IF_MMX|IF_SM}, | |
1492 | {I_PADDB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFC\110", IF_PENT|IF_MMX}, | |
1493 | {-1} | |
1494 | }; | |
1495 | ||
1496 | static struct itemplate instrux_PADDD[] = { | |
1497 | {I_PADDD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFE\110", IF_PENT|IF_MMX|IF_SM}, | |
1498 | {I_PADDD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFE\110", IF_PENT|IF_MMX}, | |
1499 | {-1} | |
1500 | }; | |
1501 | ||
1502 | static struct itemplate instrux_PADDSB[] = { | |
1503 | {I_PADDSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEC\110", IF_PENT|IF_MMX|IF_SM}, | |
1504 | {I_PADDSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEC\110", IF_PENT|IF_MMX}, | |
1505 | {-1} | |
1506 | }; | |
1507 | ||
1508 | static struct itemplate instrux_PADDSIW[] = { | |
1509 | {I_PADDSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x51\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1510 | {I_PADDSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x51\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1511 | {-1} | |
1512 | }; | |
1513 | ||
1514 | static struct itemplate instrux_PADDSW[] = { | |
1515 | {I_PADDSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xED\110", IF_PENT|IF_MMX|IF_SM}, | |
1516 | {I_PADDSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xED\110", IF_PENT|IF_MMX}, | |
1517 | {-1} | |
1518 | }; | |
1519 | ||
1520 | static struct itemplate instrux_PADDUSB[] = { | |
1521 | {I_PADDUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDC\110", IF_PENT|IF_MMX|IF_SM}, | |
1522 | {I_PADDUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDC\110", IF_PENT|IF_MMX}, | |
1523 | {-1} | |
1524 | }; | |
1525 | ||
1526 | static struct itemplate instrux_PADDUSW[] = { | |
1527 | {I_PADDUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDD\110", IF_PENT|IF_MMX|IF_SM}, | |
1528 | {I_PADDUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDD\110", IF_PENT|IF_MMX}, | |
1529 | {-1} | |
1530 | }; | |
1531 | ||
1532 | static struct itemplate instrux_PADDW[] = { | |
1533 | {I_PADDW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFD\110", IF_PENT|IF_MMX|IF_SM}, | |
1534 | {I_PADDW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFD\110", IF_PENT|IF_MMX}, | |
1535 | {-1} | |
1536 | }; | |
1537 | ||
1538 | static struct itemplate instrux_PAND[] = { | |
1539 | {I_PAND, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDB\110", IF_PENT|IF_MMX|IF_SM}, | |
1540 | {I_PAND, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDB\110", IF_PENT|IF_MMX}, | |
1541 | {-1} | |
1542 | }; | |
1543 | ||
1544 | static struct itemplate instrux_PANDN[] = { | |
1545 | {I_PANDN, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xDF\110", IF_PENT|IF_MMX|IF_SM}, | |
1546 | {I_PANDN, 2, {MMXREG,MMXREG,0}, "\2\x0F\xDF\110", IF_PENT|IF_MMX}, | |
1547 | {-1} | |
1548 | }; | |
1549 | ||
1550 | static struct itemplate instrux_PAVEB[] = { | |
1551 | {I_PAVEB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x50\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1552 | {I_PAVEB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x50\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1553 | {-1} | |
1554 | }; | |
1555 | ||
1556 | static struct itemplate instrux_PCMPEQB[] = { | |
1557 | {I_PCMPEQB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x74\110", IF_PENT|IF_MMX|IF_SM}, | |
1558 | {I_PCMPEQB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x74\110", IF_PENT|IF_MMX}, | |
1559 | {-1} | |
1560 | }; | |
1561 | ||
1562 | static struct itemplate instrux_PCMPEQD[] = { | |
1563 | {I_PCMPEQD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x76\110", IF_PENT|IF_MMX|IF_SM}, | |
1564 | {I_PCMPEQD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x76\110", IF_PENT|IF_MMX}, | |
1565 | {-1} | |
1566 | }; | |
1567 | ||
1568 | static struct itemplate instrux_PCMPEQW[] = { | |
1569 | {I_PCMPEQW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x75\110", IF_PENT|IF_MMX|IF_SM}, | |
1570 | {I_PCMPEQW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x75\110", IF_PENT|IF_MMX}, | |
1571 | {-1} | |
1572 | }; | |
1573 | ||
1574 | static struct itemplate instrux_PCMPGTB[] = { | |
1575 | {I_PCMPGTB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x64\110", IF_PENT|IF_MMX|IF_SM}, | |
1576 | {I_PCMPGTB, 2, {MMXREG,MMXREG,0}, "\2\x0F\x64\110", IF_PENT|IF_MMX}, | |
1577 | {-1} | |
1578 | }; | |
1579 | ||
1580 | static struct itemplate instrux_PCMPGTD[] = { | |
1581 | {I_PCMPGTD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x66\110", IF_PENT|IF_MMX|IF_SM}, | |
1582 | {I_PCMPGTD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x66\110", IF_PENT|IF_MMX}, | |
1583 | {-1} | |
1584 | }; | |
1585 | ||
1586 | static struct itemplate instrux_PCMPGTW[] = { | |
1587 | {I_PCMPGTW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x65\110", IF_PENT|IF_MMX|IF_SM}, | |
1588 | {I_PCMPGTW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x65\110", IF_PENT|IF_MMX}, | |
1589 | {-1} | |
1590 | }; | |
1591 | ||
1592 | static struct itemplate instrux_PDISTIB[] = { | |
1593 | {I_PDISTIB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x54\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1594 | {-1} | |
1595 | }; | |
1596 | ||
1597 | static struct itemplate instrux_PMACHRIW[] = { | |
1598 | {I_PMACHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5E\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1599 | {-1} | |
1600 | }; | |
1601 | ||
1602 | static struct itemplate instrux_PMADDWD[] = { | |
1603 | {I_PMADDWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF5\110", IF_PENT|IF_MMX|IF_SM}, | |
1604 | {I_PMADDWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF5\110", IF_PENT|IF_MMX}, | |
1605 | {-1} | |
1606 | }; | |
1607 | ||
1608 | static struct itemplate instrux_PMAGW[] = { | |
1609 | {I_PMAGW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x52\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1610 | {I_PMAGW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x52\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1611 | {-1} | |
1612 | }; | |
1613 | ||
1614 | static struct itemplate instrux_PMULHRW[] = { | |
1615 | {I_PMULHRW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x59\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1616 | {I_PMULHRW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x59\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1617 | {-1} | |
1618 | }; | |
1619 | ||
1620 | static struct itemplate instrux_PMULHRIW[] = { | |
1621 | {I_PMULHRIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1622 | {I_PMULHRIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x5D\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1623 | {-1} | |
1624 | }; | |
1625 | ||
1626 | static struct itemplate instrux_PMULHW[] = { | |
1627 | {I_PMULHW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE5\110", IF_PENT|IF_MMX|IF_SM}, | |
1628 | {I_PMULHW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE5\110", IF_PENT|IF_MMX}, | |
1629 | {-1} | |
1630 | }; | |
1631 | ||
1632 | static struct itemplate instrux_PMULLW[] = { | |
1633 | {I_PMULLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD5\110", IF_PENT|IF_MMX|IF_SM}, | |
1634 | {I_PMULLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD5\110", IF_PENT|IF_MMX}, | |
1635 | {-1} | |
1636 | }; | |
1637 | ||
1638 | static struct itemplate instrux_PMVGEZB[] = { | |
1639 | {I_PMVGEZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5C\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1640 | {-1} | |
1641 | }; | |
1642 | ||
1643 | static struct itemplate instrux_PMVLZB[] = { | |
1644 | {I_PMVLZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5B\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1645 | {-1} | |
1646 | }; | |
1647 | ||
1648 | static struct itemplate instrux_PMVNZB[] = { | |
1649 | {I_PMVNZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x5A\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1650 | {-1} | |
1651 | }; | |
1652 | ||
1653 | static struct itemplate instrux_PMVZB[] = { | |
1654 | {I_PMVZB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x58\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1655 | {-1} | |
1656 | }; | |
1657 | ||
1658 | static struct itemplate instrux_POP[] = { | |
1659 | {I_POP, 1, {REG16,0,0}, "\320\10\x58", IF_8086}, | |
1660 | {I_POP, 1, {REG32,0,0}, "\321\10\x58", IF_386}, | |
1661 | {I_POP, 1, {REGMEM|BITS16,0,0}, "\320\300\1\x8F\200", IF_8086}, | |
1662 | {I_POP, 1, {REGMEM|BITS32,0,0}, "\321\300\1\x8F\200", IF_386}, | |
1663 | {I_POP, 1, {REG_CS,0,0}, "\1\x0F", IF_8086|IF_UNDOC}, | |
1664 | {I_POP, 1, {REG_DESS,0,0}, "\4", IF_8086}, | |
1665 | {I_POP, 1, {REG_FSGS,0,0}, "\1\x0F\5", IF_386}, | |
1666 | {-1} | |
1667 | }; | |
1668 | ||
1669 | static struct itemplate instrux_POPA[] = { | |
1670 | {I_POPA, 0, {0,0,0}, "\322\1\x61", IF_186}, | |
1671 | {-1} | |
1672 | }; | |
1673 | ||
1674 | static struct itemplate instrux_POPAD[] = { | |
1675 | {I_POPAD, 0, {0,0,0}, "\321\1\x61", IF_386}, | |
1676 | {-1} | |
1677 | }; | |
1678 | ||
1679 | static struct itemplate instrux_POPAW[] = { | |
1680 | {I_POPAW, 0, {0,0,0}, "\320\1\x61", IF_186}, | |
1681 | {-1} | |
1682 | }; | |
1683 | ||
1684 | static struct itemplate instrux_POPF[] = { | |
1685 | {I_POPF, 0, {0,0,0}, "\322\1\x9D", IF_186}, | |
1686 | {-1} | |
1687 | }; | |
1688 | ||
1689 | static struct itemplate instrux_POPFD[] = { | |
1690 | {I_POPFD, 0, {0,0,0}, "\321\1\x9D", IF_386}, | |
1691 | {-1} | |
1692 | }; | |
1693 | ||
1694 | static struct itemplate instrux_POPFW[] = { | |
1695 | {I_POPFW, 0, {0,0,0}, "\320\1\x9D", IF_186}, | |
1696 | {-1} | |
1697 | }; | |
1698 | ||
1699 | static struct itemplate instrux_POR[] = { | |
1700 | {I_POR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEB\110", IF_PENT|IF_MMX|IF_SM}, | |
1701 | {I_POR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEB\110", IF_PENT|IF_MMX}, | |
1702 | {-1} | |
1703 | }; | |
1704 | ||
1705 | static struct itemplate instrux_PSLLD[] = { | |
1706 | {I_PSLLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF2\110", IF_PENT|IF_MMX|IF_SM}, | |
1707 | {I_PSLLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF2\110", IF_PENT|IF_MMX}, | |
1708 | {I_PSLLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\206\25", IF_PENT|IF_MMX}, | |
1709 | {-1} | |
1710 | }; | |
1711 | ||
1712 | static struct itemplate instrux_PSLLQ[] = { | |
1713 | {I_PSLLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF3\110", IF_PENT|IF_MMX|IF_SM}, | |
1714 | {I_PSLLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF3\110", IF_PENT|IF_MMX}, | |
1715 | {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\206\25", IF_PENT|IF_MMX}, | |
1716 | {-1} | |
1717 | }; | |
1718 | ||
1719 | static struct itemplate instrux_PSLLW[] = { | |
1720 | {I_PSLLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF1\110", IF_PENT|IF_MMX|IF_SM}, | |
1721 | {I_PSLLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF1\110", IF_PENT|IF_MMX}, | |
1722 | {I_PSLLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\206\25", IF_PENT|IF_MMX}, | |
1723 | {-1} | |
1724 | }; | |
1725 | ||
1726 | static struct itemplate instrux_PSRAD[] = { | |
1727 | {I_PSRAD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE2\110", IF_PENT|IF_MMX|IF_SM}, | |
1728 | {I_PSRAD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE2\110", IF_PENT|IF_MMX}, | |
1729 | {I_PSRAD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\204\25", IF_PENT|IF_MMX}, | |
1730 | {-1} | |
1731 | }; | |
1732 | ||
1733 | static struct itemplate instrux_PSRAW[] = { | |
1734 | {I_PSRAW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE1\110", IF_PENT|IF_MMX|IF_SM}, | |
1735 | {I_PSRAW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE1\110", IF_PENT|IF_MMX}, | |
1736 | {I_PSRAW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\204\25", IF_PENT|IF_MMX}, | |
1737 | {-1} | |
1738 | }; | |
1739 | ||
1740 | static struct itemplate instrux_PSRLD[] = { | |
1741 | {I_PSRLD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD2\110", IF_PENT|IF_MMX|IF_SM}, | |
1742 | {I_PSRLD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD2\110", IF_PENT|IF_MMX}, | |
1743 | {I_PSRLD, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x72\202\25", IF_PENT|IF_MMX}, | |
1744 | {-1} | |
1745 | }; | |
1746 | ||
1747 | static struct itemplate instrux_PSRLQ[] = { | |
1748 | {I_PSRLQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD3\110", IF_PENT|IF_MMX|IF_SM}, | |
1749 | {I_PSRLQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD3\110", IF_PENT|IF_MMX}, | |
1750 | {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x73\202\25", IF_PENT|IF_MMX}, | |
1751 | {-1} | |
1752 | }; | |
1753 | ||
1754 | static struct itemplate instrux_PSRLW[] = { | |
1755 | {I_PSRLW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD1\110", IF_PENT|IF_MMX|IF_SM}, | |
1756 | {I_PSRLW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD1\110", IF_PENT|IF_MMX}, | |
1757 | {I_PSRLW, 2, {MMXREG,IMMEDIATE,0}, "\2\x0F\x71\202\25", IF_PENT|IF_MMX}, | |
1758 | {-1} | |
1759 | }; | |
1760 | ||
1761 | static struct itemplate instrux_PSUBB[] = { | |
1762 | {I_PSUBB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF8\110", IF_PENT|IF_MMX|IF_SM}, | |
1763 | {I_PSUBB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF8\110", IF_PENT|IF_MMX}, | |
1764 | {-1} | |
1765 | }; | |
1766 | ||
1767 | static struct itemplate instrux_PSUBD[] = { | |
1768 | {I_PSUBD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xFA\110", IF_PENT|IF_MMX|IF_SM}, | |
1769 | {I_PSUBD, 2, {MMXREG,MMXREG,0}, "\2\x0F\xFA\110", IF_PENT|IF_MMX}, | |
1770 | {-1} | |
1771 | }; | |
1772 | ||
1773 | static struct itemplate instrux_PSUBSB[] = { | |
1774 | {I_PSUBSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE8\110", IF_PENT|IF_MMX|IF_SM}, | |
1775 | {I_PSUBSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE8\110", IF_PENT|IF_MMX}, | |
1776 | {-1} | |
1777 | }; | |
1778 | ||
1779 | static struct itemplate instrux_PSUBSIW[] = { | |
1780 | {I_PSUBSIW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x55\110", IF_PENT|IF_MMX|IF_SM|IF_CYRIX}, | |
1781 | {I_PSUBSIW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x55\110", IF_PENT|IF_MMX|IF_CYRIX}, | |
1782 | {-1} | |
1783 | }; | |
1784 | ||
1785 | static struct itemplate instrux_PSUBSW[] = { | |
1786 | {I_PSUBSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xE9\110", IF_PENT|IF_MMX|IF_SM}, | |
1787 | {I_PSUBSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xE9\110", IF_PENT|IF_MMX}, | |
1788 | {-1} | |
1789 | }; | |
1790 | ||
1791 | static struct itemplate instrux_PSUBUSB[] = { | |
1792 | {I_PSUBUSB, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD8\110", IF_PENT|IF_MMX|IF_SM}, | |
1793 | {I_PSUBUSB, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD8\110", IF_PENT|IF_MMX}, | |
1794 | {-1} | |
1795 | }; | |
1796 | ||
1797 | static struct itemplate instrux_PSUBUSW[] = { | |
1798 | {I_PSUBUSW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xD9\110", IF_PENT|IF_MMX|IF_SM}, | |
1799 | {I_PSUBUSW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xD9\110", IF_PENT|IF_MMX}, | |
1800 | {-1} | |
1801 | }; | |
1802 | ||
1803 | static struct itemplate instrux_PSUBW[] = { | |
1804 | {I_PSUBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xF9\110", IF_PENT|IF_MMX|IF_SM}, | |
1805 | {I_PSUBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\xF9\110", IF_PENT|IF_MMX}, | |
1806 | {-1} | |
1807 | }; | |
1808 | ||
1809 | static struct itemplate instrux_PUNPCKHBW[] = { | |
1810 | {I_PUNPCKHBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x68\110", IF_PENT|IF_MMX|IF_SM}, | |
1811 | {I_PUNPCKHBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x68\110", IF_PENT|IF_MMX}, | |
1812 | {-1} | |
1813 | }; | |
1814 | ||
1815 | static struct itemplate instrux_PUNPCKHDQ[] = { | |
1816 | {I_PUNPCKHDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x6A\110", IF_PENT|IF_MMX|IF_SM}, | |
1817 | {I_PUNPCKHDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x6A\110", IF_PENT|IF_MMX}, | |
1818 | {-1} | |
1819 | }; | |
1820 | ||
1821 | static struct itemplate instrux_PUNPCKHWD[] = { | |
1822 | {I_PUNPCKHWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x69\110", IF_PENT|IF_MMX|IF_SM}, | |
1823 | {I_PUNPCKHWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x69\110", IF_PENT|IF_MMX}, | |
1824 | {-1} | |
1825 | }; | |
1826 | ||
1827 | static struct itemplate instrux_PUNPCKLBW[] = { | |
1828 | {I_PUNPCKLBW, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x60\110", IF_PENT|IF_MMX|IF_SM}, | |
1829 | {I_PUNPCKLBW, 2, {MMXREG,MMXREG,0}, "\2\x0F\x60\110", IF_PENT|IF_MMX}, | |
1830 | {-1} | |
1831 | }; | |
1832 | ||
1833 | static struct itemplate instrux_PUNPCKLDQ[] = { | |
1834 | {I_PUNPCKLDQ, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x62\110", IF_PENT|IF_MMX|IF_SM}, | |
1835 | {I_PUNPCKLDQ, 2, {MMXREG,MMXREG,0}, "\2\x0F\x62\110", IF_PENT|IF_MMX}, | |
1836 | {-1} | |
1837 | }; | |
1838 | ||
1839 | static struct itemplate instrux_PUNPCKLWD[] = { | |
1840 | {I_PUNPCKLWD, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\x61\110", IF_PENT|IF_MMX|IF_SM}, | |
1841 | {I_PUNPCKLWD, 2, {MMXREG,MMXREG,0}, "\2\x0F\x61\110", IF_PENT|IF_MMX}, | |
1842 | {-1} | |
1843 | }; | |
1844 | ||
1845 | static struct itemplate instrux_PUSH[] = { | |
1846 | {I_PUSH, 1, {REG16,0,0}, "\320\10\x50", IF_8086}, | |
1847 | {I_PUSH, 1, {REG32,0,0}, "\321\10\x50", IF_386}, | |
1848 | {I_PUSH, 1, {REGMEM|BITS16,0,0}, "\320\300\1\xFF\206", IF_8086}, | |
1849 | {I_PUSH, 1, {REGMEM|BITS32,0,0}, "\321\300\1\xFF\206", IF_386}, | |
1850 | {I_PUSH, 1, {REG_FSGS,0,0}, "\1\x0F\7", IF_386}, | |
1851 | {I_PUSH, 1, {REG_SREG,0,0}, "\6", IF_8086}, | |
1852 | {I_PUSH, 1, {IMMEDIATE|BITS8,0,0}, "\1\x6A\14", IF_286}, | |
1853 | {I_PUSH, 1, {IMMEDIATE|BITS16,0,0}, "\320\1\x68\30", IF_286}, | |
1854 | {I_PUSH, 1, {IMMEDIATE|BITS32,0,0}, "\321\1\x68\40", IF_386}, | |
1855 | {-1} | |
1856 | }; | |
1857 | ||
1858 | static struct itemplate instrux_PUSHA[] = { | |
1859 | {I_PUSHA, 0, {0,0,0}, "\322\1\x60", IF_186}, | |
1860 | {-1} | |
1861 | }; | |
1862 | ||
1863 | static struct itemplate instrux_PUSHAD[] = { | |
1864 | {I_PUSHAD, 0, {0,0,0}, "\321\1\x60", IF_386}, | |
1865 | {-1} | |
1866 | }; | |
1867 | ||
1868 | static struct itemplate instrux_PUSHAW[] = { | |
1869 | {I_PUSHAW, 0, {0,0,0}, "\320\1\x60", IF_186}, | |
1870 | {-1} | |
1871 | }; | |
1872 | ||
1873 | static struct itemplate instrux_PUSHF[] = { | |
1874 | {I_PUSHF, 0, {0,0,0}, "\322\1\x9C", IF_186}, | |
1875 | {-1} | |
1876 | }; | |
1877 | ||
1878 | static struct itemplate instrux_PUSHFD[] = { | |
1879 | {I_PUSHFD, 0, {0,0,0}, "\321\1\x9C", IF_386}, | |
1880 | {-1} | |
1881 | }; | |
1882 | ||
1883 | static struct itemplate instrux_PUSHFW[] = { | |
1884 | {I_PUSHFW, 0, {0,0,0}, "\320\1\x9C", IF_186}, | |
1885 | {-1} | |
1886 | }; | |
1887 | ||
1888 | static struct itemplate instrux_PXOR[] = { | |
1889 | {I_PXOR, 2, {MMXREG,MEMORY,0}, "\301\2\x0F\xEF\110", IF_PENT|IF_MMX|IF_SM}, | |
1890 | {I_PXOR, 2, {MMXREG,MMXREG,0}, "\2\x0F\xEF\110", IF_PENT|IF_MMX}, | |
1891 | {-1} | |
1892 | }; | |
1893 | ||
1894 | static struct itemplate instrux_RCL[] = { | |
1895 | {I_RCL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\202", IF_8086}, | |
1896 | {I_RCL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\202", IF_8086}, | |
1897 | {I_RCL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\202\25", IF_286|IF_SB}, | |
1898 | {I_RCL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\202", IF_8086}, | |
1899 | {I_RCL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\202", IF_8086}, | |
1900 | {I_RCL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\202\25", IF_286|IF_SB}, | |
1901 | {I_RCL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\202", IF_386}, | |
1902 | {I_RCL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\202", IF_386}, | |
1903 | {I_RCL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\202\25", IF_386|IF_SB}, | |
1904 | {-1} | |
1905 | }; | |
1906 | ||
1907 | static struct itemplate instrux_RCR[] = { | |
1908 | {I_RCR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\203", IF_8086}, | |
1909 | {I_RCR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\203", IF_8086}, | |
1910 | {I_RCR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\203\25", IF_286|IF_SB}, | |
1911 | {I_RCR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\203", IF_8086}, | |
1912 | {I_RCR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\203", IF_8086}, | |
1913 | {I_RCR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\203\25", IF_286|IF_SB}, | |
1914 | {I_RCR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\203", IF_386}, | |
1915 | {I_RCR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\203", IF_386}, | |
1916 | {I_RCR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\203\25", IF_386|IF_SB}, | |
1917 | {-1} | |
1918 | }; | |
1919 | ||
1920 | static struct itemplate instrux_RDMSR[] = { | |
1921 | {I_RDMSR, 0, {0,0,0}, "\2\x0F\x32", IF_PENT}, | |
1922 | {-1} | |
1923 | }; | |
1924 | ||
1925 | static struct itemplate instrux_RDPMC[] = { | |
1926 | {I_RDPMC, 0, {0,0,0}, "\2\x0F\x33", IF_P6}, | |
1927 | {-1} | |
1928 | }; | |
1929 | ||
1930 | static struct itemplate instrux_RDTSC[] = { | |
1931 | {I_RDTSC, 0, {0,0,0}, "\2\x0F\x31", IF_PENT}, | |
1932 | {-1} | |
1933 | }; | |
1934 | ||
1935 | static struct itemplate instrux_RESB[] = { | |
1936 | {I_RESB, 1, {IMMEDIATE,0,0}, "\340", IF_8086}, | |
1937 | {-1} | |
1938 | }; | |
1939 | ||
1940 | static struct itemplate instrux_RESD[] = { | |
1941 | {-1} | |
1942 | }; | |
1943 | ||
1944 | static struct itemplate instrux_RESQ[] = { | |
1945 | {-1} | |
1946 | }; | |
1947 | ||
1948 | static struct itemplate instrux_REST[] = { | |
1949 | {-1} | |
1950 | }; | |
1951 | ||
1952 | static struct itemplate instrux_RESW[] = { | |
1953 | {-1} | |
1954 | }; | |
1955 | ||
1956 | static struct itemplate instrux_RET[] = { | |
1957 | {I_RET, 0, {0,0,0}, "\1\xC3", IF_8086}, | |
1958 | {I_RET, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086}, | |
1959 | {-1} | |
1960 | }; | |
1961 | ||
1962 | static struct itemplate instrux_RETF[] = { | |
1963 | {I_RETF, 0, {0,0,0}, "\1\xCB", IF_8086}, | |
1964 | {I_RETF, 1, {IMMEDIATE,0,0}, "\1\xCA\30", IF_8086}, | |
1965 | {-1} | |
1966 | }; | |
1967 | ||
1968 | static struct itemplate instrux_RETN[] = { | |
1969 | {I_RETN, 0, {0,0,0}, "\1\xC3", IF_8086}, | |
1970 | {I_RETN, 1, {IMMEDIATE,0,0}, "\1\xC2\30", IF_8086}, | |
1971 | {-1} | |
1972 | }; | |
1973 | ||
1974 | static struct itemplate instrux_ROL[] = { | |
1975 | {I_ROL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\200", IF_8086}, | |
1976 | {I_ROL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\200", IF_8086}, | |
1977 | {I_ROL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\200\25", IF_286|IF_SB}, | |
1978 | {I_ROL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\200", IF_8086}, | |
1979 | {I_ROL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\200", IF_8086}, | |
1980 | {I_ROL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\200\25", IF_286|IF_SB}, | |
1981 | {I_ROL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\200", IF_386}, | |
1982 | {I_ROL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\200", IF_386}, | |
1983 | {I_ROL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\200\25", IF_386|IF_SB}, | |
1984 | {-1} | |
1985 | }; | |
1986 | ||
1987 | static struct itemplate instrux_ROR[] = { | |
1988 | {I_ROR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\201", IF_8086}, | |
1989 | {I_ROR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\201", IF_8086}, | |
1990 | {I_ROR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\201\25", IF_286|IF_SB}, | |
1991 | {I_ROR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\201", IF_8086}, | |
1992 | {I_ROR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\201", IF_8086}, | |
1993 | {I_ROR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\201\25", IF_286|IF_SB}, | |
1994 | {I_ROR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\201", IF_386}, | |
1995 | {I_ROR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\201", IF_386}, | |
1996 | {I_ROR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\201\25", IF_386|IF_SB}, | |
1997 | {-1} | |
1998 | }; | |
1999 | ||
2000 | static struct itemplate instrux_RSM[] = { | |
2001 | {I_RSM, 0, {0,0,0}, "\2\x0F\xAA", IF_PENT}, | |
2002 | {-1} | |
2003 | }; | |
2004 | ||
2005 | static struct itemplate instrux_SAHF[] = { | |
2006 | {I_SAHF, 0, {0,0,0}, "\1\x9E", IF_8086}, | |
2007 | {-1} | |
2008 | }; | |
2009 | ||
2010 | static struct itemplate instrux_SAL[] = { | |
2011 | {I_SAL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086}, | |
2012 | {I_SAL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086}, | |
2013 | {I_SAL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_286|IF_SB}, | |
2014 | {I_SAL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086}, | |
2015 | {I_SAL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086}, | |
2016 | {I_SAL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_286|IF_SB}, | |
2017 | {I_SAL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386}, | |
2018 | {I_SAL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386}, | |
2019 | {I_SAL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB}, | |
2020 | {-1} | |
2021 | }; | |
2022 | ||
2023 | static struct itemplate instrux_SALC[] = { | |
2024 | {I_SALC, 0, {0,0,0}, "\1\xD6", IF_8086|IF_UNDOC}, | |
2025 | {-1} | |
2026 | }; | |
2027 | ||
2028 | static struct itemplate instrux_SAR[] = { | |
2029 | {I_SAR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\207", IF_8086}, | |
2030 | {I_SAR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\207", IF_8086}, | |
2031 | {I_SAR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\207\25", IF_286|IF_SB}, | |
2032 | {I_SAR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\207", IF_8086}, | |
2033 | {I_SAR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\207", IF_8086}, | |
2034 | {I_SAR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\207\25", IF_286|IF_SB}, | |
2035 | {I_SAR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\207", IF_386}, | |
2036 | {I_SAR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\207", IF_386}, | |
2037 | {I_SAR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\207\25", IF_386|IF_SB}, | |
2038 | {-1} | |
2039 | }; | |
2040 | ||
2041 | static struct itemplate instrux_SBB[] = { | |
2042 | {I_SBB, 2, {MEMORY,REG8,0}, "\300\1\x18\101", IF_8086|IF_SM}, | |
2043 | {I_SBB, 2, {REG8,REG8,0}, "\300\1\x18\101", IF_8086}, | |
2044 | {I_SBB, 2, {MEMORY,REG16,0}, "\320\300\1\x19\101", IF_8086|IF_SM}, | |
2045 | {I_SBB, 2, {REG16,REG16,0}, "\320\300\1\x19\101", IF_8086}, | |
2046 | {I_SBB, 2, {MEMORY,REG32,0}, "\321\300\1\x19\101", IF_386|IF_SM}, | |
2047 | {I_SBB, 2, {REG32,REG32,0}, "\321\300\1\x19\101", IF_386}, | |
2048 | {I_SBB, 2, {REG8,MEMORY,0}, "\301\1\x1A\110", IF_8086|IF_SM}, | |
2049 | {I_SBB, 2, {REG8,REG8,0}, "\301\1\x1A\110", IF_8086}, | |
2050 | {I_SBB, 2, {REG16,MEMORY,0}, "\320\301\1\x1B\110", IF_8086|IF_SM}, | |
2051 | {I_SBB, 2, {REG16,REG16,0}, "\320\301\1\x1B\110", IF_8086}, | |
2052 | {I_SBB, 2, {REG32,MEMORY,0}, "\321\301\1\x1B\110", IF_386|IF_SM}, | |
2053 | {I_SBB, 2, {REG32,REG32,0}, "\321\301\1\x1B\110", IF_386}, | |
2054 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\203\15", IF_8086}, | |
2055 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\203\15", IF_8086}, | |
2056 | {I_SBB, 2, {REG_AL,IMMEDIATE,0}, "\1\x1C\21", IF_8086|IF_SM}, | |
2057 | {I_SBB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x1D\31", IF_8086|IF_SM}, | |
2058 | {I_SBB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x1D\41", IF_386|IF_SM}, | |
2059 | {I_SBB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\203\21", IF_8086|IF_SM}, | |
2060 | {I_SBB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\203\31", IF_8086|IF_SM}, | |
2061 | {I_SBB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\203\41", IF_386|IF_SM}, | |
2062 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\203\21", IF_8086|IF_SM}, | |
2063 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\203\31", IF_8086|IF_SM}, | |
2064 | {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\203\41", IF_386|IF_SM}, | |
2065 | {-1} | |
2066 | }; | |
2067 | ||
2068 | static struct itemplate instrux_SCASB[] = { | |
2069 | {I_SCASB, 0, {0,0,0}, "\1\xAE", IF_8086}, | |
2070 | {-1} | |
2071 | }; | |
2072 | ||
2073 | static struct itemplate instrux_SCASD[] = { | |
2074 | {I_SCASD, 0, {0,0,0}, "\321\1\xAF", IF_386}, | |
2075 | {-1} | |
2076 | }; | |
2077 | ||
2078 | static struct itemplate instrux_SCASW[] = { | |
2079 | {I_SCASW, 0, {0,0,0}, "\320\1\xAF", IF_8086}, | |
2080 | {-1} | |
2081 | }; | |
2082 | ||
2083 | static struct itemplate instrux_SGDT[] = { | |
2084 | {I_SGDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\200", IF_286|IF_PRIV}, | |
2085 | {-1} | |
2086 | }; | |
2087 | ||
2088 | static struct itemplate instrux_SHL[] = { | |
2089 | {I_SHL, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\204", IF_8086}, | |
2090 | {I_SHL, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\204", IF_8086}, | |
2091 | {I_SHL, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\204\25", IF_286|IF_SB}, | |
2092 | {I_SHL, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\204", IF_8086}, | |
2093 | {I_SHL, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\204", IF_8086}, | |
2094 | {I_SHL, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\204\25", IF_286|IF_SB}, | |
2095 | {I_SHL, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\204", IF_386}, | |
2096 | {I_SHL, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\204", IF_386}, | |
2097 | {I_SHL, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\204\25", IF_386|IF_SB}, | |
2098 | {-1} | |
2099 | }; | |
2100 | ||
2101 | static struct itemplate instrux_SHLD[] = { | |
2102 | {I_SHLD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xA4\101\26", IF_386|IF_SM2}, | |
2103 | {I_SHLD, 3, {REG16,REG16,IMMEDIATE}, "\300\320\2\x0F\xA4\101\26", IF_386|IF_SM2}, | |
2104 | {I_SHLD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xA4\101\26", IF_386|IF_SM2}, | |
2105 | {I_SHLD, 3, {REG32,REG32,IMMEDIATE}, "\300\321\2\x0F\xA4\101\26", IF_386|IF_SM2}, | |
2106 | {I_SHLD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xA5\101", IF_386|IF_SM}, | |
2107 | {I_SHLD, 3, {REG16,REG16,REG_CL}, "\300\320\2\x0F\xA5\101", IF_386}, | |
2108 | {I_SHLD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xA5\101", IF_386|IF_SM}, | |
2109 | {I_SHLD, 3, {REG32,REG32,REG_CL}, "\300\321\2\x0F\xA5\101", IF_386}, | |
2110 | {-1} | |
2111 | }; | |
2112 | ||
2113 | static struct itemplate instrux_SHR[] = { | |
2114 | {I_SHR, 2, {REGMEM|BITS8,UNITY,0}, "\300\1\xD0\205", IF_8086}, | |
2115 | {I_SHR, 2, {REGMEM|BITS8,REG_CL,0}, "\300\1\xD2\205", IF_8086}, | |
2116 | {I_SHR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xC0\205\25", IF_286|IF_SB}, | |
2117 | {I_SHR, 2, {REGMEM|BITS16,UNITY,0}, "\320\300\1\xD1\205", IF_8086}, | |
2118 | {I_SHR, 2, {REGMEM|BITS16,REG_CL,0}, "\320\300\1\xD3\205", IF_8086}, | |
2119 | {I_SHR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xC1\205\25", IF_286|IF_SB}, | |
2120 | {I_SHR, 2, {REGMEM|BITS32,UNITY,0}, "\321\300\1\xD1\205", IF_386}, | |
2121 | {I_SHR, 2, {REGMEM|BITS32,REG_CL,0}, "\321\300\1\xD3\205", IF_386}, | |
2122 | {I_SHR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xC1\205\25", IF_386|IF_SB}, | |
2123 | {-1} | |
2124 | }; | |
2125 | ||
2126 | static struct itemplate instrux_SHRD[] = { | |
2127 | {I_SHRD, 3, {MEMORY,REG16,IMMEDIATE}, "\300\320\2\x0F\xAC\101\26", IF_386|IF_SM2}, | |
2128 | {I_SHRD, 3, {REG16,REG16,IMMEDIATE}, "\300\320\2\x0F\xAC\101\26", IF_386|IF_SM2}, | |
2129 | {I_SHRD, 3, {MEMORY,REG32,IMMEDIATE}, "\300\321\2\x0F\xAC\101\26", IF_386|IF_SM2}, | |
2130 | {I_SHRD, 3, {REG32,REG32,IMMEDIATE}, "\300\321\2\x0F\xAC\101\26", IF_386|IF_SM2}, | |
2131 | {I_SHRD, 3, {MEMORY,REG16,REG_CL}, "\300\320\2\x0F\xAD\101", IF_386|IF_SM}, | |
2132 | {I_SHRD, 3, {REG16,REG16,REG_CL}, "\300\320\2\x0F\xAD\101", IF_386}, | |
2133 | {I_SHRD, 3, {MEMORY,REG32,REG_CL}, "\300\321\2\x0F\xAD\101", IF_386|IF_SM}, | |
2134 | {I_SHRD, 3, {REG32,REG32,REG_CL}, "\300\321\2\x0F\xAD\101", IF_386}, | |
2135 | {-1} | |
2136 | }; | |
2137 | ||
2138 | static struct itemplate instrux_SIDT[] = { | |
2139 | {I_SIDT, 1, {MEMORY,0,0}, "\300\2\x0F\x01\201", IF_286|IF_PRIV}, | |
2140 | {-1} | |
2141 | }; | |
2142 | ||
2143 | static struct itemplate instrux_SLDT[] = { | |
2144 | {I_SLDT, 1, {MEMORY,0,0}, "\300\1\x0F\17\200", IF_286|IF_PRIV}, | |
2145 | {I_SLDT, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\200", IF_286|IF_PRIV}, | |
2146 | {I_SLDT, 1, {REG16,0,0}, "\300\1\x0F\17\200", IF_286|IF_PRIV}, | |
2147 | {-1} | |
2148 | }; | |
2149 | ||
2150 | static struct itemplate instrux_SMI[] = { | |
2151 | {I_SMI, 0, {0,0,0}, "\1\xF1", IF_386|IF_UNDOC}, | |
2152 | {-1} | |
2153 | }; | |
2154 | ||
2155 | static struct itemplate instrux_SMSW[] = { | |
2156 | {I_SMSW, 1, {MEMORY,0,0}, "\300\2\x0F\x01\204", IF_286|IF_PRIV}, | |
2157 | {I_SMSW, 1, {MEMORY|BITS16,0,0}, "\300\2\x0F\x01\204", IF_286|IF_PRIV}, | |
2158 | {I_SMSW, 1, {REG16,0,0}, "\300\2\x0F\x01\204", IF_286|IF_PRIV}, | |
2159 | {-1} | |
2160 | }; | |
2161 | ||
2162 | static struct itemplate instrux_STC[] = { | |
2163 | {I_STC, 0, {0,0,0}, "\1\xF9", IF_8086}, | |
2164 | {-1} | |
2165 | }; | |
2166 | ||
2167 | static struct itemplate instrux_STD[] = { | |
2168 | {I_STD, 0, {0,0,0}, "\1\xFD", IF_8086}, | |
2169 | {-1} | |
2170 | }; | |
2171 | ||
2172 | static struct itemplate instrux_STI[] = { | |
2173 | {I_STI, 0, {0,0,0}, "\1\xFB", IF_8086}, | |
2174 | {-1} | |
2175 | }; | |
2176 | ||
2177 | static struct itemplate instrux_STOSB[] = { | |
2178 | {I_STOSB, 0, {0,0,0}, "\1\xAA", IF_8086}, | |
2179 | {-1} | |
2180 | }; | |
2181 | ||
2182 | static struct itemplate instrux_STOSD[] = { | |
2183 | {I_STOSD, 0, {0,0,0}, "\321\1\xAB", IF_386}, | |
2184 | {-1} | |
2185 | }; | |
2186 | ||
2187 | static struct itemplate instrux_STOSW[] = { | |
2188 | {I_STOSW, 0, {0,0,0}, "\320\1\xAB", IF_8086}, | |
2189 | {-1} | |
2190 | }; | |
2191 | ||
2192 | static struct itemplate instrux_STR[] = { | |
2193 | {I_STR, 1, {MEMORY,0,0}, "\300\1\x0F\17\201", IF_286|IF_PRIV}, | |
2194 | {I_STR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\201", IF_286|IF_PRIV}, | |
2195 | {I_STR, 1, {REG16,0,0}, "\300\1\x0F\17\201", IF_286|IF_PRIV}, | |
2196 | {-1} | |
2197 | }; | |
2198 | ||
2199 | static struct itemplate instrux_SUB[] = { | |
2200 | {I_SUB, 2, {MEMORY,REG8,0}, "\300\1\x28\101", IF_8086|IF_SM}, | |
2201 | {I_SUB, 2, {REG8,REG8,0}, "\300\1\x28\101", IF_8086}, | |
2202 | {I_SUB, 2, {MEMORY,REG16,0}, "\320\300\1\x29\101", IF_8086|IF_SM}, | |
2203 | {I_SUB, 2, {REG16,REG16,0}, "\320\300\1\x29\101", IF_8086}, | |
2204 | {I_SUB, 2, {MEMORY,REG32,0}, "\321\300\1\x29\101", IF_386|IF_SM}, | |
2205 | {I_SUB, 2, {REG32,REG32,0}, "\321\300\1\x29\101", IF_386}, | |
2206 | {I_SUB, 2, {REG8,MEMORY,0}, "\301\1\x2A\110", IF_8086|IF_SM}, | |
2207 | {I_SUB, 2, {REG8,REG8,0}, "\301\1\x2A\110", IF_8086}, | |
2208 | {I_SUB, 2, {REG16,MEMORY,0}, "\320\301\1\x2B\110", IF_8086|IF_SM}, | |
2209 | {I_SUB, 2, {REG16,REG16,0}, "\320\301\1\x2B\110", IF_8086}, | |
2210 | {I_SUB, 2, {REG32,MEMORY,0}, "\321\301\1\x2B\110", IF_386|IF_SM}, | |
2211 | {I_SUB, 2, {REG32,REG32,0}, "\321\301\1\x2B\110", IF_386}, | |
2212 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\205\15", IF_8086}, | |
2213 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\205\15", IF_386}, | |
2214 | {I_SUB, 2, {REG_AL,IMMEDIATE,0}, "\1\x2C\21", IF_8086|IF_SM}, | |
2215 | {I_SUB, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x2D\31", IF_8086|IF_SM}, | |
2216 | {I_SUB, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x2D\41", IF_386|IF_SM}, | |
2217 | {I_SUB, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\205\21", IF_8086|IF_SM}, | |
2218 | {I_SUB, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\205\31", IF_8086|IF_SM}, | |
2219 | {I_SUB, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\205\41", IF_386|IF_SM}, | |
2220 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\205\21", IF_8086|IF_SM}, | |
2221 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\205\31", IF_8086|IF_SM}, | |
2222 | {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\205\41", IF_386|IF_SM}, | |
2223 | {-1} | |
2224 | }; | |
2225 | ||
2226 | static struct itemplate instrux_TEST[] = { | |
2227 | {I_TEST, 2, {MEMORY,REG8,0}, "\300\1\x84\101", IF_8086|IF_SM}, | |
2228 | {I_TEST, 2, {REG8,REG8,0}, "\300\1\x84\101", IF_8086}, | |
2229 | {I_TEST, 2, {MEMORY,REG16,0}, "\320\300\1\x85\101", IF_8086|IF_SM}, | |
2230 | {I_TEST, 2, {REG16,REG16,0}, "\320\300\1\x85\101", IF_8086}, | |
2231 | {I_TEST, 2, {MEMORY,REG32,0}, "\321\300\1\x85\101", IF_386|IF_SM}, | |
2232 | {I_TEST, 2, {REG32,REG32,0}, "\321\300\1\x85\101", IF_386}, | |
2233 | {I_TEST, 2, {REG_AL,IMMEDIATE,0}, "\1\xA8\21", IF_8086|IF_SM}, | |
2234 | {I_TEST, 2, {REG_AX,IMMEDIATE,0}, "\320\1\xA9\31", IF_8086|IF_SM}, | |
2235 | {I_TEST, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\xA9\41", IF_386|IF_SM}, | |
2236 | {I_TEST, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\xF6\200\21", IF_8086|IF_SM}, | |
2237 | {I_TEST, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM}, | |
2238 | {I_TEST, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM}, | |
2239 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\xF6\200\21", IF_8086|IF_SM}, | |
2240 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\xF7\200\31", IF_8086|IF_SM}, | |
2241 | {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\xF7\200\41", IF_386|IF_SM}, | |
2242 | {-1} | |
2243 | }; | |
2244 | ||
2245 | static struct itemplate instrux_UMOV[] = { | |
2246 | {I_UMOV, 2, {MEMORY,REG8,0}, "\300\2\x0F\x10\101", IF_386|IF_UNDOC|IF_SM}, | |
2247 | {I_UMOV, 2, {REG8,REG8,0}, "\300\2\x0F\x10\101", IF_386|IF_UNDOC}, | |
2248 | {I_UMOV, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM}, | |
2249 | {I_UMOV, 2, {REG16,REG16,0}, "\320\300\2\x0F\x11\101", IF_386|IF_UNDOC}, | |
2250 | {I_UMOV, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\x11\101", IF_386|IF_UNDOC|IF_SM}, | |
2251 | {I_UMOV, 2, {REG32,REG32,0}, "\321\300\2\x0F\x11\101", IF_386|IF_UNDOC}, | |
2252 | {I_UMOV, 2, {REG8,MEMORY,0}, "\301\2\x0F\x12\110", IF_386|IF_UNDOC|IF_SM}, | |
2253 | {I_UMOV, 2, {REG8,REG8,0}, "\301\2\x0F\x12\110", IF_386|IF_UNDOC}, | |
2254 | {I_UMOV, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM}, | |
2255 | {I_UMOV, 2, {REG16,REG16,0}, "\320\301\2\x0F\x13\110", IF_386|IF_UNDOC}, | |
2256 | {I_UMOV, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\x13\110", IF_386|IF_UNDOC|IF_SM}, | |
2257 | {I_UMOV, 2, {REG32,REG32,0}, "\321\301\2\x0F\x13\110", IF_386|IF_UNDOC}, | |
2258 | {-1} | |
2259 | }; | |
2260 | ||
2261 | static struct itemplate instrux_VERR[] = { | |
2262 | {I_VERR, 1, {MEMORY,0,0}, "\300\1\x0F\17\204", IF_286|IF_PRIV}, | |
2263 | {I_VERR, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\204", IF_286|IF_PRIV}, | |
2264 | {I_VERR, 1, {REG16,0,0}, "\300\1\x0F\17\204", IF_286|IF_PRIV}, | |
2265 | {-1} | |
2266 | }; | |
2267 | ||
2268 | static struct itemplate instrux_VERW[] = { | |
2269 | {I_VERW, 1, {MEMORY,0,0}, "\300\1\x0F\17\205", IF_286|IF_PRIV}, | |
2270 | {I_VERW, 1, {MEMORY|BITS16,0,0}, "\300\1\x0F\17\205", IF_286|IF_PRIV}, | |
2271 | {I_VERW, 1, {REG16,0,0}, "\300\1\x0F\17\205", IF_286|IF_PRIV}, | |
2272 | {-1} | |
2273 | }; | |
2274 | ||
2275 | static struct itemplate instrux_WAIT[] = { | |
2276 | {I_WAIT, 0, {0,0,0}, "\1\x9B", IF_8086}, | |
2277 | {-1} | |
2278 | }; | |
2279 | ||
2280 | static struct itemplate instrux_WBINVD[] = { | |
2281 | {I_WBINVD, 0, {0,0,0}, "\2\x0F\x09", IF_486}, | |
2282 | {-1} | |
2283 | }; | |
2284 | ||
2285 | static struct itemplate instrux_WRMSR[] = { | |
2286 | {I_WRMSR, 0, {0,0,0}, "\2\x0F\x30", IF_PENT}, | |
2287 | {-1} | |
2288 | }; | |
2289 | ||
2290 | static struct itemplate instrux_XADD[] = { | |
2291 | {I_XADD, 2, {MEMORY,REG8,0}, "\300\2\x0F\xC0\101", IF_486|IF_SM}, | |
2292 | {I_XADD, 2, {REG8,REG8,0}, "\300\2\x0F\xC0\101", IF_486}, | |
2293 | {I_XADD, 2, {MEMORY,REG16,0}, "\320\300\2\x0F\xC1\101", IF_486|IF_SM}, | |
2294 | {I_XADD, 2, {REG16,REG16,0}, "\320\300\2\x0F\xC1\101", IF_486}, | |
2295 | {I_XADD, 2, {MEMORY,REG32,0}, "\321\300\2\x0F\xC1\101", IF_486|IF_SM}, | |
2296 | {I_XADD, 2, {REG32,REG32,0}, "\321\300\2\x0F\xC1\101", IF_486}, | |
2297 | {-1} | |
2298 | }; | |
2299 | ||
2300 | static struct itemplate instrux_XBTS[] = { | |
2301 | {I_XBTS, 2, {REG16,MEMORY,0}, "\320\301\2\x0F\xA6\110", IF_386|IF_SW|IF_UNDOC}, | |
2302 | {I_XBTS, 2, {REG16,REG16,0}, "\320\301\2\x0F\xA6\110", IF_386|IF_UNDOC}, | |
2303 | {I_XBTS, 2, {REG32,MEMORY,0}, "\321\301\2\x0F\xA6\110", IF_386|IF_SD|IF_UNDOC}, | |
2304 | {I_XBTS, 2, {REG32,REG32,0}, "\321\301\2\x0F\xA6\110", IF_386|IF_UNDOC}, | |
2305 | {-1} | |
2306 | }; | |
2307 | ||
2308 | static struct itemplate instrux_XCHG[] = { | |
2309 | {I_XCHG, 2, {REG_AX,REG16,0}, "\320\11\x90", IF_8086}, | |
2310 | {I_XCHG, 2, {REG_EAX,REG32,0}, "\321\11\x90", IF_386}, | |
2311 | {I_XCHG, 2, {REG16,REG_AX,0}, "\320\10\x90", IF_8086}, | |
2312 | {I_XCHG, 2, {REG32,REG_EAX,0}, "\321\10\x90", IF_386}, | |
2313 | {I_XCHG, 2, {REG8,MEMORY,0}, "\301\1\x86\110", IF_8086|IF_SM}, | |
2314 | {I_XCHG, 2, {REG8,REG8,0}, "\301\1\x86\110", IF_8086}, | |
2315 | {I_XCHG, 2, {REG16,MEMORY,0}, "\320\301\1\x87\110", IF_8086|IF_SM}, | |
2316 | {I_XCHG, 2, {REG16,REG16,0}, "\320\301\1\x87\110", IF_8086}, | |
2317 | {I_XCHG, 2, {REG32,MEMORY,0}, "\321\301\1\x87\110", IF_386|IF_SM}, | |
2318 | {I_XCHG, 2, {REG32,REG32,0}, "\321\301\1\x87\110", IF_386}, | |
2319 | {I_XCHG, 2, {MEMORY,REG8,0}, "\300\1\x86\101", IF_8086|IF_SM}, | |
2320 | {I_XCHG, 2, {REG8,REG8,0}, "\300\1\x86\101", IF_8086}, | |
2321 | {I_XCHG, 2, {MEMORY,REG16,0}, "\320\300\1\x87\101", IF_8086|IF_SM}, | |
2322 | {I_XCHG, 2, {REG16,REG16,0}, "\320\300\1\x87\101", IF_8086}, | |
2323 | {I_XCHG, 2, {MEMORY,REG32,0}, "\321\300\1\x87\101", IF_386|IF_SM}, | |
2324 | {I_XCHG, 2, {REG32,REG32,0}, "\321\300\1\x87\101", IF_386}, | |
2325 | {-1} | |
2326 | }; | |
2327 | ||
2328 | static struct itemplate instrux_XLATB[] = { | |
2329 | {I_XLATB, 0, {0,0,0}, "\1\xD7", IF_8086}, | |
2330 | {-1} | |
2331 | }; | |
2332 | ||
2333 | static struct itemplate instrux_XOR[] = { | |
2334 | {I_XOR, 2, {MEMORY,REG8,0}, "\300\1\x30\101", IF_8086|IF_SM}, | |
2335 | {I_XOR, 2, {REG8,REG8,0}, "\300\1\x30\101", IF_8086}, | |
2336 | {I_XOR, 2, {MEMORY,REG16,0}, "\320\300\1\x31\101", IF_8086|IF_SM}, | |
2337 | {I_XOR, 2, {REG16,REG16,0}, "\320\300\1\x31\101", IF_8086}, | |
2338 | {I_XOR, 2, {MEMORY,REG32,0}, "\321\300\1\x31\101", IF_386|IF_SM}, | |
2339 | {I_XOR, 2, {REG32,REG32,0}, "\321\300\1\x31\101", IF_386}, | |
2340 | {I_XOR, 2, {REG8,MEMORY,0}, "\301\1\x32\110", IF_8086|IF_SM}, | |
2341 | {I_XOR, 2, {REG8,REG8,0}, "\301\1\x32\110", IF_8086}, | |
2342 | {I_XOR, 2, {REG16,MEMORY,0}, "\320\301\1\x33\110", IF_8086|IF_SM}, | |
2343 | {I_XOR, 2, {REG16,REG16,0}, "\320\301\1\x33\110", IF_8086}, | |
2344 | {I_XOR, 2, {REG32,MEMORY,0}, "\321\301\1\x33\110", IF_386|IF_SM}, | |
2345 | {I_XOR, 2, {REG32,REG32,0}, "\321\301\1\x33\110", IF_386}, | |
2346 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE|BITS8,0}, "\320\300\1\x83\206\15", IF_8086}, | |
2347 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE|BITS8,0}, "\321\300\1\x83\206\15", IF_386}, | |
2348 | {I_XOR, 2, {REG_AL,IMMEDIATE,0}, "\1\x34\21", IF_8086|IF_SM}, | |
2349 | {I_XOR, 2, {REG_AX,IMMEDIATE,0}, "\320\1\x35\31", IF_8086|IF_SM}, | |
2350 | {I_XOR, 2, {REG_EAX,IMMEDIATE,0}, "\321\1\x35\41", IF_386|IF_SM}, | |
2351 | {I_XOR, 2, {REGMEM|BITS8,IMMEDIATE,0}, "\300\1\x80\206\21", IF_8086|IF_SM}, | |
2352 | {I_XOR, 2, {REGMEM|BITS16,IMMEDIATE,0}, "\320\300\1\x81\206\31", IF_8086|IF_SM}, | |
2353 | {I_XOR, 2, {REGMEM|BITS32,IMMEDIATE,0}, "\321\300\1\x81\206\41", IF_386|IF_SM}, | |
2354 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0}, "\300\1\x80\206\21", IF_8086|IF_SM}, | |
2355 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0}, "\320\300\1\x81\206\31", IF_8086|IF_SM}, | |
2356 | {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0}, "\321\300\1\x81\206\41", IF_386|IF_SM}, | |
2357 | {-1} | |
2358 | }; | |
2359 | ||
2360 | static struct itemplate instrux_CMOVcc[] = { | |
2361 | {I_CMOVcc, 2, {REG16,MEMORY,0}, "\320\301\1\x0F\330\x40\110", IF_P6|IF_SM}, | |
2362 | {I_CMOVcc, 2, {REG16,REG16,0}, "\320\301\1\x0F\330\x40\110", IF_P6}, | |
2363 | {I_CMOVcc, 2, {REG32,MEMORY,0}, "\321\301\1\x0F\330\x40\110", IF_P6|IF_SM}, | |
2364 | {I_CMOVcc, 2, {REG32,REG32,0}, "\321\301\1\x0F\330\x40\110", IF_P6}, | |
2365 | {-1} | |
2366 | }; | |
2367 | ||
2368 | static struct itemplate instrux_Jcc[] = { | |
2369 | {I_Jcc, 1, {IMMEDIATE|NEAR,0,0}, "\322\1\x0F\330\x80\64", IF_386}, | |
2370 | {I_Jcc, 1, {IMMEDIATE,0,0}, "\330\x70\50", IF_8086}, | |
2371 | {I_Jcc, 1, {IMMEDIATE|SHORT,0,0}, "\330\x70\50", IF_8086}, | |
2372 | {-1} | |
2373 | }; | |
2374 | ||
2375 | static struct itemplate instrux_SETcc[] = { | |
2376 | {I_SETcc, 1, {MEMORY,0,0}, "\300\1\x0F\330\x90\200", IF_386|IF_SB}, | |
2377 | {I_SETcc, 1, {REG8,0,0}, "\300\1\x0F\330\x90\200", IF_386}, | |
2378 | {-1} | |
2379 | }; | |
2380 | ||
2381 | struct itemplate *nasm_instructions[] = { | |
2382 | instrux_AAA, | |
2383 | instrux_AAD, | |
2384 | instrux_AAM, | |
2385 | instrux_AAS, | |
2386 | instrux_ADC, | |
2387 | instrux_ADD, | |
2388 | instrux_AND, | |
2389 | instrux_ARPL, | |
2390 | instrux_BOUND, | |
2391 | instrux_BSF, | |
2392 | instrux_BSR, | |
2393 | instrux_BSWAP, | |
2394 | instrux_BT, | |
2395 | instrux_BTC, | |
2396 | instrux_BTR, | |
2397 | instrux_BTS, | |
2398 | instrux_CALL, | |
2399 | instrux_CBW, | |
2400 | instrux_CDQ, | |
2401 | instrux_CLC, | |
2402 | instrux_CLD, | |
2403 | instrux_CLI, | |
2404 | instrux_CLTS, | |
2405 | instrux_CMC, | |
2406 | instrux_CMP, | |
2407 | instrux_CMPSB, | |
2408 | instrux_CMPSD, | |
2409 | instrux_CMPSW, | |
2410 | instrux_CMPXCHG, | |
2411 | instrux_CMPXCHG486, | |
2412 | instrux_CMPXCHG8B, | |
2413 | instrux_CPUID, | |
2414 | instrux_CWD, | |
2415 | instrux_CWDE, | |
2416 | instrux_DAA, | |
2417 | instrux_DAS, | |
2418 | instrux_DB, | |
2419 | instrux_DD, | |
2420 | instrux_DEC, | |
2421 | instrux_DIV, | |
2422 | instrux_DQ, | |
2423 | instrux_DT, | |
2424 | instrux_DW, | |
2425 | instrux_EMMS, | |
2426 | instrux_ENTER, | |
2427 | instrux_EQU, | |
2428 | instrux_F2XM1, | |
2429 | instrux_FABS, | |
2430 | instrux_FADD, | |
2431 | instrux_FADDP, | |
2432 | instrux_FBLD, | |
2433 | instrux_FBSTP, | |
2434 | instrux_FCHS, | |
2435 | instrux_FCLEX, | |
2436 | instrux_FCMOVB, | |
2437 | instrux_FCMOVBE, | |
2438 | instrux_FCMOVE, | |
2439 | instrux_FCMOVNB, | |
2440 | instrux_FCMOVNBE, | |
2441 | instrux_FCMOVNE, | |
2442 | instrux_FCMOVNU, | |
2443 | instrux_FCMOVU, | |
2444 | instrux_FCOM, | |
2445 | instrux_FCOMI, | |
2446 | instrux_FCOMIP, | |
2447 | instrux_FCOMP, | |
2448 | instrux_FCOMPP, | |
2449 | instrux_FCOS, | |
2450 | instrux_FDECSTP, | |
2451 | instrux_FDISI, | |
2452 | instrux_FDIV, | |
2453 | instrux_FDIVP, | |
2454 | instrux_FDIVR, | |
2455 | instrux_FDIVRP, | |
2456 | instrux_FENI, | |
2457 | instrux_FFREE, | |
2458 | instrux_FIADD, | |
2459 | instrux_FICOM, | |
2460 | instrux_FICOMP, | |
2461 | instrux_FIDIV, | |
2462 | instrux_FIDIVR, | |
2463 | instrux_FILD, | |
2464 | instrux_FIMUL, | |
2465 | instrux_FINCSTP, | |
2466 | instrux_FINIT, | |
2467 | instrux_FIST, | |
2468 | instrux_FISTP, | |
2469 | instrux_FISUB, | |
2470 | instrux_FISUBR, | |
2471 | instrux_FLD, | |
2472 | instrux_FLD1, | |
2473 | instrux_FLDCW, | |
2474 | instrux_FLDENV, | |
2475 | instrux_FLDL2E, | |
2476 | instrux_FLDL2T, | |
2477 | instrux_FLDLG2, | |
2478 | instrux_FLDLN2, | |
2479 | instrux_FLDPI, | |
2480 | instrux_FLDZ, | |
2481 | instrux_FMUL, | |
2482 | instrux_FMULP, | |
2483 | instrux_FNCLEX, | |
2484 | instrux_FNDISI, | |
2485 | instrux_FNENI, | |
2486 | instrux_FNINIT, | |
2487 | instrux_FNOP, | |
2488 | instrux_FNSAVE, | |
2489 | instrux_FNSTCW, | |
2490 | instrux_FNSTENV, | |
2491 | instrux_FNSTSW, | |
2492 | instrux_FPATAN, | |
2493 | instrux_FPREM, | |
2494 | instrux_FPREM1, | |
2495 | instrux_FPTAN, | |
2496 | instrux_FRNDINT, | |
2497 | instrux_FRSTOR, | |
2498 | instrux_FSAVE, | |
2499 | instrux_FSCALE, | |
2500 | instrux_FSETPM, | |
2501 | instrux_FSIN, | |
2502 | instrux_FSINCOS, | |
2503 | instrux_FSQRT, | |
2504 | instrux_FST, | |
2505 | instrux_FSTCW, | |
2506 | instrux_FSTENV, | |
2507 | instrux_FSTP, | |
2508 | instrux_FSTSW, | |
2509 | instrux_FSUB, | |
2510 | instrux_FSUBP, | |
2511 | instrux_FSUBR, | |
2512 | instrux_FSUBRP, | |
2513 | instrux_FTST, | |
2514 | instrux_FUCOM, | |
2515 | instrux_FUCOMI, | |
2516 | instrux_FUCOMIP, | |
2517 | instrux_FUCOMP, | |
2518 | instrux_FUCOMPP, | |
2519 | instrux_FXAM, | |
2520 | instrux_FXCH, | |
2521 | instrux_FXTRACT, | |
2522 | instrux_FYL2X, | |
2523 | instrux_FYL2XP1, | |
2524 | instrux_HLT, | |
2525 | instrux_IBTS, | |
2526 | instrux_ICEBP, | |
2527 | instrux_IDIV, | |
2528 | instrux_IMUL, | |
2529 | instrux_IN, | |
2530 | instrux_INC, | |
2531 | instrux_INCBIN, | |
2532 | instrux_INSB, | |
2533 | instrux_INSD, | |
2534 | instrux_INSW, | |
2535 | instrux_INT, | |
2536 | instrux_INT01, | |
2537 | instrux_INT1, | |
2538 | instrux_INT3, | |
2539 | instrux_INTO, | |
2540 | instrux_INVD, | |
2541 | instrux_INVLPG, | |
2542 | instrux_IRET, | |
2543 | instrux_IRETD, | |
2544 | instrux_IRETW, | |
2545 | instrux_JCXZ, | |
2546 | instrux_JECXZ, | |
2547 | instrux_JMP, | |
2548 | instrux_LAHF, | |
2549 | instrux_LAR, | |
2550 | instrux_LDS, | |
2551 | instrux_LEA, | |
2552 | instrux_LEAVE, | |
2553 | instrux_LES, | |
2554 | instrux_LFS, | |
2555 | instrux_LGDT, | |
2556 | instrux_LGS, | |
2557 | instrux_LIDT, | |
2558 | instrux_LLDT, | |
2559 | instrux_LMSW, | |
2560 | instrux_LOADALL, | |
2561 | instrux_LOADALL286, | |
2562 | instrux_LODSB, | |
2563 | instrux_LODSD, | |
2564 | instrux_LODSW, | |
2565 | instrux_LOOP, | |
2566 | instrux_LOOPE, | |
2567 | instrux_LOOPNE, | |
2568 | instrux_LOOPNZ, | |
2569 | instrux_LOOPZ, | |
2570 | instrux_LSL, | |
2571 | instrux_LSS, | |
2572 | instrux_LTR, | |
2573 | instrux_MOV, | |
2574 | instrux_MOVD, | |
2575 | instrux_MOVQ, | |
2576 | instrux_MOVSB, | |
2577 | instrux_MOVSD, | |
2578 | instrux_MOVSW, | |
2579 | instrux_MOVSX, | |
2580 | instrux_MOVZX, | |
2581 | instrux_MUL, | |
2582 | instrux_NEG, | |
2583 | instrux_NOP, | |
2584 | instrux_NOT, | |
2585 | instrux_OR, | |
2586 | instrux_OUT, | |
2587 | instrux_OUTSB, | |
2588 | instrux_OUTSD, | |
2589 | instrux_OUTSW, | |
2590 | instrux_PACKSSDW, | |
2591 | instrux_PACKSSWB, | |
2592 | instrux_PACKUSWB, | |
2593 | instrux_PADDB, | |
2594 | instrux_PADDD, | |
2595 | instrux_PADDSB, | |
2596 | instrux_PADDSIW, | |
2597 | instrux_PADDSW, | |
2598 | instrux_PADDUSB, | |
2599 | instrux_PADDUSW, | |
2600 | instrux_PADDW, | |
2601 | instrux_PAND, | |
2602 | instrux_PANDN, | |
2603 | instrux_PAVEB, | |
2604 | instrux_PCMPEQB, | |
2605 | instrux_PCMPEQD, | |
2606 | instrux_PCMPEQW, | |
2607 | instrux_PCMPGTB, | |
2608 | instrux_PCMPGTD, | |
2609 | instrux_PCMPGTW, | |
2610 | instrux_PDISTIB, | |
2611 | instrux_PMACHRIW, | |
2612 | instrux_PMADDWD, | |
2613 | instrux_PMAGW, | |
2614 | instrux_PMULHRW, | |
2615 | instrux_PMULHRIW, | |
2616 | instrux_PMULHW, | |
2617 | instrux_PMULLW, | |
2618 | instrux_PMVGEZB, | |
2619 | instrux_PMVLZB, | |
2620 | instrux_PMVNZB, | |
2621 | instrux_PMVZB, | |
2622 | instrux_POP, | |
2623 | instrux_POPA, | |
2624 | instrux_POPAD, | |
2625 | instrux_POPAW, | |
2626 | instrux_POPF, | |
2627 | instrux_POPFD, | |
2628 | instrux_POPFW, | |
2629 | instrux_POR, | |
2630 | instrux_PSLLD, | |
2631 | instrux_PSLLQ, | |
2632 | instrux_PSLLW, | |
2633 | instrux_PSRAD, | |
2634 | instrux_PSRAW, | |
2635 | instrux_PSRLD, | |
2636 | instrux_PSRLQ, | |
2637 | instrux_PSRLW, | |
2638 | instrux_PSUBB, | |
2639 | instrux_PSUBD, | |
2640 | instrux_PSUBSB, | |
2641 | instrux_PSUBSIW, | |
2642 | instrux_PSUBSW, | |
2643 | instrux_PSUBUSB, | |
2644 | instrux_PSUBUSW, | |
2645 | instrux_PSUBW, | |
2646 | instrux_PUNPCKHBW, | |
2647 | instrux_PUNPCKHDQ, | |
2648 | instrux_PUNPCKHWD, | |
2649 | instrux_PUNPCKLBW, | |
2650 | instrux_PUNPCKLDQ, | |
2651 | instrux_PUNPCKLWD, | |
2652 | instrux_PUSH, | |
2653 | instrux_PUSHA, | |
2654 | instrux_PUSHAD, | |
2655 | instrux_PUSHAW, | |
2656 | instrux_PUSHF, | |
2657 | instrux_PUSHFD, | |
2658 | instrux_PUSHFW, | |
2659 | instrux_PXOR, | |
2660 | instrux_RCL, | |
2661 | instrux_RCR, | |
2662 | instrux_RDMSR, | |
2663 | instrux_RDPMC, | |
2664 | instrux_RDTSC, | |
2665 | instrux_RESB, | |
2666 | instrux_RESD, | |
2667 | instrux_RESQ, | |
2668 | instrux_REST, | |
2669 | instrux_RESW, | |
2670 | instrux_RET, | |
2671 | instrux_RETF, | |
2672 | instrux_RETN, | |
2673 | instrux_ROL, | |
2674 | instrux_ROR, | |
2675 | instrux_RSM, | |
2676 | instrux_SAHF, | |
2677 | instrux_SAL, | |
2678 | instrux_SALC, | |
2679 | instrux_SAR, | |
2680 | instrux_SBB, | |
2681 | instrux_SCASB, | |
2682 | instrux_SCASD, | |
2683 | instrux_SCASW, | |
2684 | instrux_SGDT, | |
2685 | instrux_SHL, | |
2686 | instrux_SHLD, | |
2687 | instrux_SHR, | |
2688 | instrux_SHRD, | |
2689 | instrux_SIDT, | |
2690 | instrux_SLDT, | |
2691 | instrux_SMI, | |
2692 | instrux_SMSW, | |
2693 | instrux_STC, | |
2694 | instrux_STD, | |
2695 | instrux_STI, | |
2696 | instrux_STOSB, | |
2697 | instrux_STOSD, | |
2698 | instrux_STOSW, | |
2699 | instrux_STR, | |
2700 | instrux_SUB, | |
2701 | instrux_TEST, | |
2702 | instrux_UMOV, | |
2703 | instrux_VERR, | |
2704 | instrux_VERW, | |
2705 | instrux_WAIT, | |
2706 | instrux_WBINVD, | |
2707 | instrux_WRMSR, | |
2708 | instrux_XADD, | |
2709 | instrux_XBTS, | |
2710 | instrux_XCHG, | |
2711 | instrux_XLATB, | |
2712 | instrux_XOR, | |
2713 | instrux_CMOVcc, | |
2714 | instrux_Jcc, | |
2715 | instrux_SETcc, | |
2716 | }; |